CN109683968B - Switch quick start method, switch and storage medium - Google Patents
Switch quick start method, switch and storage medium Download PDFInfo
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- CN109683968B CN109683968B CN201811550289.9A CN201811550289A CN109683968B CN 109683968 B CN109683968 B CN 109683968B CN 201811550289 A CN201811550289 A CN 201811550289A CN 109683968 B CN109683968 B CN 109683968B
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- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
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- G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
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Abstract
The embodiment of the invention discloses a method for quickly starting a switch, the switch and a storage medium. The method comprises the following steps: after a switch is powered on, a main processor in the switch executes hardware initialization operation, and a coprocessor in the switch executes decompression operation of a software package; after the main processor finishes hardware initialization operation, software codes for decompressing the software package are obtained from the coprocessor; the main processor runs the software code. The method for quickly starting the switch provided by the embodiment can obviously reduce the time consumption for starting and improve the starting speed of the switch.
Description
Technical Field
The embodiment of the invention relates to a communication technology, in particular to a method for quickly starting a switch, the switch and a storage medium.
Background
A Switch (meaning "Switch") is a network device for forwarding electrical signals that provides an exclusive electrical signal path for any two network nodes accessing the Switch. The startup rate of the switch directly affects the communication rate between the network nodes.
At present, the starting process of the switch is as follows: after the switch is powered on, a main processor of the switch first loads a boot loader (bootloader) to perform hardware initialization. After hardware initialization is completed, the main processor decompresses the switch software package into software codes. Finally, the main processor runs the software code. It can be seen that the startup duration of the switch is the sum of the hardware initialization duration T1, the software packet decompression duration T2, and the software code running duration T3.
As the demand for the start-up rate of the communication network in practical applications is higher, the demand for the start-up rate of the switch is higher. At present, the starting time of the switch is long, and the requirement of the starting speed of the communication network is difficult to meet.
Disclosure of Invention
The embodiment of the invention provides a method for quickly starting a switch, the switch and a storage medium, so as to improve the starting speed of the switch.
In a first aspect, an embodiment of the present invention provides a method for quickly starting a switch, including:
after a switch is powered on, a main processor in the switch executes hardware initialization operation, and a coprocessor in the switch executes decompression operation of a software package;
after the main processor finishes hardware initialization operation, software codes for decompressing the software package are obtained from the coprocessor;
the main processor runs the software code.
In a second aspect, an embodiment of the present invention further provides a switch, including: (ii) a
The main processor is used for executing hardware initialization operation after the switch is powered on;
the coprocessor is used for executing the decompression operation of the software package after the switch is powered on;
the main processor is also used for acquiring a software code obtained after the software package is decompressed from the coprocessor; and running the software code.
In a third aspect, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the switch fast boot method according to any embodiment.
In the embodiment of the invention, a main processor executes hardware initialization operation, and meanwhile, a coprocessor executes decompression operation of a software package; after the main processor completes the hardware initialization operation, the main processor obtains the software code after decompressing the software package from the coprocessor, and it can be seen that in this embodiment, the decompression operation of the software package originally completed by the main processor is completed by the coprocessor, and the coprocessor and the main processor are mutually independent and can perform hardware initialization and software package decompression in parallel, so the startup time of the switch is: the sum of the hardware initialization time and the software packet decompression time, the software code acquisition time and the software code execution time is longer, and the software code acquisition time in the embodiment is relatively shorter and can be ignored, so that compared with the prior art, the method for quickly starting the switch provided by the embodiment can obviously reduce the starting time and improve the starting speed of the switch.
Drawings
Fig. 1 is a flowchart of a method for quickly starting a switch according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for quickly starting a switch according to a second embodiment of the present invention;
fig. 3 is a flowchart of a method for quickly starting a switch according to a third embodiment of the present invention;
fig. 4a is a flowchart of a method for quickly starting a switch according to a fourth embodiment of the present invention;
fig. 4b is a schematic diagram of a message format of a private asynchronous data communication protocol according to a fourth embodiment of the present invention;
fig. 5a is a schematic structural diagram of a switch according to a fifth embodiment of the present invention;
fig. 5b is a schematic structural diagram of another switch according to the fifth embodiment of the present invention;
fig. 5c is a schematic structural diagram of another switch according to a sixth embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
In this embodiment, a coprocessor is newly added to an existing switch as a slave processor of the main processor. The main processor and the coprocessor cooperate to complete the startup of the switch. Fig. 1 is a flowchart of a method for quickly starting a switch according to an embodiment of the present invention, where the method is applicable to a case of starting a switch, and the method may be executed by a main processor and a coprocessor, and in combination with fig. 1, the method provided in this embodiment specifically includes the following operations:
s110, after the switch is powered on, the main processor in the switch executes hardware initialization operation, and the coprocessor in the switch executes decompression operation of the software package.
Optionally, the main processor is a Central Processing Unit (CPU) or a Micro Control Unit (MCU) and is configured to process all functional items of the switch. The coprocessor is a Field-Programmable Gate Array (FPGA). The data is exchanged between the main processor and the coprocessor through the bus, and the main processor accesses the coprocessor through the bus. Buses include, but are not limited to, a Peripheral Component Interconnect (PCI) bus, a PCI Express bus, and a PCI-X bus.
In this embodiment, after the switch is powered on, the hardware device in the switch: the main processor and coprocessor are also powered up. After the main processor is powered on, hardware initialization operations, such as initializing each hardware in the main processor, initializing a memory connected to the main processor, and initializing a file system connected to the main processor, are started to be executed. And after the coprocessor is powered on, the decompression operation of the software package is started to be executed. Most of the existing switch software packages include an operating system and switch software, for example, the operating system of the switch is integrated in the switch software. The coprocessor decompresses the software package into software code, which includes switch software code and operating system code.
The coprocessor and the main processor respectively form two independent small systems, the hardware initialization operation of the main processor and the decompression operation of the coprocessor do not influence each other, and the hardware initialization operation and the decompression operation of the coprocessor can be processed in parallel.
And S120, after the main processor finishes the hardware initialization operation, acquiring the software code for decompressing the software package from the coprocessor.
And the main processor acquires the software code obtained by decompressing the software package from the coprocessor through the bus.
In a first optional implementation, after the main processor completes the hardware initialization operation, and after the coprocessor completes the decompression of the software packet, the complete software code is obtained.
For the first alternative embodiment, the completion flag is generated after the coprocessor completes the decompression operation on the software package. And after the main processor finishes the hardware initialization operation and monitors the finish identification in the coprocessor, acquiring the software code for decompressing the software package from the coprocessor. The completion identifier is an identifier, such as a character, pre-agreed by the main processor and the coprocessor and used for indicating that the software package is completely decompressed. Specifically, the host processor periodically accesses the coprocessor via the bus to monitor the completion flag. In some cases, after the main processor completes the hardware initialization operation, the coprocessor completes the decompression operation and generates a completion identifier, and then the main processor can immediately monitor the completion identifier and acquire a software code; in other cases, after the main processor completes the hardware initialization operation, the coprocessor does not complete the decompression operation, the completion identifier is periodically monitored, and when the completion identifier is monitored, the complete software code is acquired.
In a second optional implementation manner, after the main processor completes the hardware initialization operation, and the coprocessor does not complete the decompression operation yet, the decompressed software codes are periodically acquired in the process of the coprocessor executing the decompression operation. Only the software code that is once decomposed is acquired each time the software code is acquired, so as to avoid repeated acquisition of the software code.
S130, the main processor runs the software codes.
And after the main processor acquires all the decompressed software codes, operating the software codes so as to complete the starting of the switch.
In the embodiment of the invention, a main processor executes hardware initialization operation, and meanwhile, a coprocessor executes decompression operation of a software package; after the main processor completes the hardware initialization operation, the main processor obtains the software code after decompressing the software package from the coprocessor, and it can be seen that in this embodiment, the decompression operation of the software package originally completed by the main processor is completed by the coprocessor, and the coprocessor and the main processor are mutually independent and can perform hardware initialization and software package decompression in parallel, so the startup time of the switch is: the sum of the hardware initialization time and the software packet decompression time, the software code acquisition time and the software code execution time is longer, and the software code acquisition time in the embodiment is relatively shorter and can be ignored, so that compared with the prior art, the method for quickly starting the switch provided by the embodiment can obviously reduce the starting time and improve the starting speed of the switch.
Example two
In this embodiment, a first memory, a second memory, a third memory, and a fourth memory are added to the switch, and the execution processes of the coprocessor and the main processor are described in detail. Optionally, the coprocessor in the switch performs decompression operations of the software packet, including: the coprocessor in the switch decompresses the software package to obtain a software code, and stores the software code into a first memory connected with the coprocessor. Correspondingly, after the main processor completes the hardware initialization operation, the software code obtained after the software package is decompressed is obtained from the coprocessor, and the method comprises the following steps: after the main processor finishes the hardware initialization operation, the software codes stored in the first memory are copied to a second memory connected with the main processor. Optionally, after the switch is powered on, the main processor in the switch performs a hardware initialization operation, and the coprocessor in the switch performs a software packet decompression operation, including: and after the switch is powered on, the main processor in the switch loads a boot loader from the third memory connected with the main processor and executes hardware initialization operation, and the coprocessor in the switch reads the software package from the fourth memory connected with the coprocessor and executes decompression operation of the software package.
Fig. 2 is a flowchart of a method for quickly starting a switch according to a second embodiment of the present invention, and as shown in fig. 2, the method specifically includes the following operations:
s210, after the switch is powered on, the main processor in the switch executes hardware initialization operation, the coprocessor in the switch decompresses the software package to obtain software codes, and the software codes are stored in a first memory connected with the coprocessor.
In this embodiment, the coprocessor is connected to the first memory and the fourth memory, and the main processor is connected to the second memory and the third memory. The fourth memory stores the software package in advance, and the third memory stores a boot loader (bootloader) in advance.
And after the switch is powered on, the main processor loads the bootloader from the third memory connected with the main processor and executes hardware initialization operation. For example, each hardware in the main processor is initialized, a memory connected to the main processor is initialized, and a file system connected to the main processor is initialized. And after the switch is powered on, the coprocessor reads the software package from the fourth memory connected with the coprocessor and performs decompression operation of the software package.
In this embodiment, the software package and the boot loader need to be saved after the switch is powered off, so that the switch is started next time, and therefore the third memory and the fourth memory are nonvolatile memories. Optionally, in some cases, if the software package and/or bootloader needs to be upgraded, after the main processor runs the software code, the main processor performs an upgrade operation on the software package in the fourth memory; and/or the main processor carries out upgrading operation on the bootloader in the third memory. For example, the main processor writes a new software package into the fourth memory through the bus between the main processor and the coprocessor; the host processor writes the new bootloader into the fourth memory. It can be seen that the main processor is controllable to both the third memory and the fourth memory. In order to realize the upgrade of the software package and bootloader, the third memory and the fourth memory should be readable and writable memories. In summary, the third Memory and the fourth Memory are preferably readable and writable nonvolatile memories, such as Non-Volatile Random Access Memory (NVRAM) and Flash Memory (Flash Memory).
Optionally, the coprocessor performs decompression operations of the software package, including: the coprocessor decompresses the software package to obtain the software code, and stores the software code into the first memory. Because the data volume of the software codes is large, the software codes are stored in the first memory in the decompression process, and the requirement on the storage speed of the memory is high. Based on this, the first Memory is a Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM).
And S220, after the main processor finishes the hardware initialization operation, copying the software codes stored in the first memory into a second memory connected with the main processor.
Optionally, the main processor reads the software code stored in the first memory through the bus, and copies the software code; the copied software code is then stored in the second memory.
S230, the main processor runs the software code.
After copying the software codes into the second memory, the main processor jumps to the software codes and runs the software codes in the second memory. Due to the large amount of data of the software code, the storage speed of the memory is required to be high in the process of storing the copied software code into the second memory and running the software code. Based on this, the second memory also selects DDR SDRAM.
The switch startup duration after the method provided by this embodiment is described in detail in a specific implementation manner.
By adopting the method provided by the embodiment, compared with the background art, the main processor is still responsible for loading the bootloader and completing the hardware initialization, and the hardware initialization duration is T11, which is basically the same as T1 in the background art. Meanwhile, the coprocessor completes decompression of the switch software package from the Flash Memory to the DDR and generates a completion identifier, the software package decompression time length and the identifier generation time length are T22, and the T22 can be smaller than or equal to the T2 by adjusting the operating frequency of the Flash Memory. After the hardware initialization of the main processor is completed, copying the decompressed software codes from the DDR of the coprocessor to the DDR of the main processor through the PCIE, wherein the time length for copying the software codes is T44. Since the transmission rate of PCIE is much greater than the operation rate of Flash Memory, T44 occupies a small proportion and can be ignored with respect to T11 and T22. Finally, the main processor jumps to the software code and executes the software code, and the time duration is marked as T33, which is the same as the software code running time duration T3 in the background art. At this time, the starting time of the whole switch is as follows: t ═ MAX (T11, T22) + T33+ T44 ≈ MAX (T11, T22) + T3, that is, the start-up time of the entire switch is shortened to the sum of the greater one between T11 and T22 and the software code running time T3, which is much smaller than T1+ T2+ T3 in the background art, so that the start-up performance of the switch is greatly improved.
In the embodiment of the invention, after the switch is powered on, the main processor loads the bootloader from the third memory to perform hardware initialization, and meanwhile, the coprocessor reads the software package from the fourth memory and decompresses the software package into the first memory, so that the hardware initialization and the decompression of the software package are performed simultaneously; after the main processor completes hardware initialization operation, the software codes stored in the first memory are copied into a second memory connected with the main processor, so that the software codes are directly acquired without the need of the main processor for decompression again, the time consumption for copying the software codes is short and can be almost ignored, and the time consumption for starting the switch can be effectively reduced; upgrading the software package in the fourth memory through the main processor; and/or the main processor performs an upgrade operation on the bootloader in the third memory, and further realizes the upgrade function of the software package and/or the bootloader on the basis of the method provided by the embodiment.
EXAMPLE III
In the prior art, after the switch is powered on, a main processor of the switch completes hardware initialization operation, and then a Software Development Kit (SDK) provided by a switch manufacturer needs to be loaded, a configuration item of the switch chip is obtained by running the SDK, and then the configuration item is configured into the switch chip, so that the switch chip is started, and the switch is started as a whole. In order to solve the technical problem that the starting of the conventional switch chip consumes a long time, this embodiment provides a method for quickly starting a switch based on the above embodiments. In this embodiment, the switch further includes a switch chip connected to the coprocessor and the main processor, and the starting of the switch further includes starting of the switch chip. After the switch is powered on, the coprocessor performs pre-configuration on the switching chip, so that the switching chip is quickly started, and the quick start of the switch is integrally realized. Fig. 3 is a flowchart of a method for quickly starting a switch according to a third embodiment of the present invention, which specifically includes the following operations:
and S300, powering on the switch, and continuing to execute S310, S320 and S330.
S310, the main processor in the switch executes hardware initialization operation. Execution continues with S340.
And S320, the coprocessor in the switch executes the decompression operation of the software package.
S330, the coprocessor in the exchanger acquires the access authority of the exchange chip. Execution continues with S331.
The coprocessor is powered on and initializes the clock of the coprocessor, the bus connector and the like, and the initialization operation is completed. Then, the decompression operation of the software package and the configuration operation of the switch chip are simultaneously performed. The configuration operation of the switch chip includes S330, S331, S332, and S333. The hardware initialization operation of the main processor, the software package decompression operation of the coprocessor and the operation of the coprocessor configuration exchange chip are carried out simultaneously. Optionally, the coprocessor is a processing unit (e.g., a CPU) of the coprocessor, and the access right to the switch chip is acquired by the processing unit of the coprocessor, that is, the connection between the switch chip and the coprocessor is realized; and meanwhile, the connection between the exchange chip and the main processor is disconnected.
S331, the coprocessor reads the configuration items required for starting the switch. Execution continues with S332.
S332, the coprocessor configures the configuration items into the exchange chip. Execution continues with S333.
In this embodiment, the coprocessor (e.g., FPGA or single chip microcomputer) has a characteristic of fast initialization with respect to the main processor (e.g., MCU or CPU). Based on this, compared with the main processor executing the configuration operation on the switch chip, in the embodiment, the coprocessor with a faster initialization process executes the configuration operation on the switch chip, so as to save the starting time.
Alternatively, the configuration item required for starting the switch may be a configuration item of the two-layer switch function, and may also be a configuration item of the three-layer switch function. Specifically, the configuration item required for starting the switch at least includes one of a Port rate duplex configuration item, a Port-base Virtual Local Area Network ID (PVID) configuration item of a Port, a Virtual Local Area Network VLAN (VLAN) member configuration item, an aggregation Port configuration item, a Spanning Tree Protocol (STP) configuration item, a Serial Peripheral Interface (SPI) communication control configuration item, and a configuration item corresponding to a dynamic event of the switch.
The above configuration items may be stored in advance in a fourth memory to which the coprocessor is connected. The configuration items can be directly configured in the exchange chip without the processes of state judgment and the like. Optionally, the coprocessor directly configures the read configuration items into the switch chip via a bus between the coprocessor and the switch chip. At this point, the coprocessor completes the configuration operation of the switch chip.
S333, the coprocessor releases the access authority of the exchange chip so that the main processor can access the exchange chip.
After the coprocessor completes the configuration operation of the exchange chip, the exchange chip is not subjected to other configurations, but the access authority of the exchange chip is transferred to the main processor, and the main processor accesses the exchange chip. Based on this, the coprocessor disconnects the exchange chip and connects the exchange chip and the main processor.
Optionally, the main processor accesses the already configured switch chip via a bus with the switch chip. To this end, the switch completes the startup as a whole.
In summary, compared with the prior art, at least two parts of time are saved in the embodiment, namely the initialization time of the host processor and the time for the host processor to run the SDK to obtain the configuration item. Multiple tests prove that the method can ensure that the switch finishes starting within 5s, can realize normal two-layer communication and three-layer communication, and has basic virtual local area network setting, aggregation setting, spanning tree protocol support, port rate duplex setting and the like.
And S340, after the main processor finishes the hardware initialization operation, acquiring the software code obtained after the software package is decompressed from the coprocessor, and continuously executing S350.
And S350, the main processor runs the software codes.
In the embodiment, after the coprocessor is initialized, the access authority of the exchange chip is acquired, so that the exchange chip is configured by initializing the coprocessor faster; reading a configuration item which is stored in advance and is required for starting the switch; the configuration item is configured in the exchange chip, the access authority of the exchange chip is released, so that the main processor accesses the exchange chip, the pre-stored configuration item is directly configured in the exchange chip, the configuration item of the exchange chip is not required to be obtained by operating the SDK, and the exchange chip can be configured without waiting for a series of processes such as state judgment in the SDK; in addition, in the process of configuring the exchange chip by the coprocessor, the participation of a main processor is not needed, and the process of initializing hardware of the main processor, the process of decompressing a software package by the coprocessor and the process of configuring the exchange chip by the coprocessor are simultaneously carried out, so that the switch is quickly started. In the embodiment of the invention, the coprocessor starts to configure the switching chip when the switch is powered on, the coprocessor and the main processor are mutually independent, and the coprocessor does not need the participation of the main processor in any operation of the switching chip, so that the switching chip is quickly started. In the prior art, the configuration item of the switch is stored in the configuration file, after the CPU of the switch decompresses the software package, the SDK in the configuration file is read from the file system and operated, and the configuration item of the switch chip is obtained by operating the SDK.
In some embodiments, the configuration items configured by the coprocessor are only related to the startup of the switch, and the switch chip can realize two-layer communication and three-layer communication after being configured. If the switching chip is enabled to realize the complete function, the SDK is required to be operated and the operation result of the SDK is configured in the switching chip. Based on the above, the main processor runs the modified SDK after initialization; configuring the operation result of the SDK to a switching chip; and deleting or skipping the program corresponding to the configuration item in the SDK provided by the switch manufacturer.
Because the coprocessor already configures the configuration items into the switching chip, the main processor does not need to perform the same configuration any more, so that the coprocessor and the main processor are prevented from repeatedly configuring the switching chip, network cut-off is avoided, and network cut-off occurs.
Example four
In this embodiment, a bus connector is added to the switch. The coprocessor acquires, releases and endows the bus control right by issuing the bus control parameters to the bus connector. Fig. 4a is a flowchart of a method for quickly starting a switch according to a fourth embodiment of the present invention, and as shown in fig. 4a, the method specifically includes the following steps:
s400, the switch is powered on, and S410, S420 and S430 are continuously executed.
S410, the main processor in the switch executes hardware initialization operation. Execution continues with S440.
And S420, the coprocessor in the switch executes the decompression operation of the software package.
S430, the coprocessor issues a first bus control parameter to the bus connector connected with the coprocessor. Execution continues with S431.
The bus connector is respectively connected with the coprocessor and the switching chip, the first bus control parameter is used for controlling the bus connector to be connected with the coprocessor and the switching chip, and optionally, the first bus control parameter is also used for disconnecting the main processor from the switching chip.
The bus connector is used for connecting the coprocessor and the switching chip according to the first bus control parameter and disconnecting the connection between the main processor and the switching chip.
S431, the coprocessor reads the configuration items required for starting the switch, which are saved in advance.
S432, the coprocessor configures the configuration items into the exchange chip through a bus between the coprocessor and the exchange chip.
And S433, the coprocessor issues a second bus control parameter to the bus connector so that the main processor accesses the switching chip through a bus between the main processor and the switching chip.
And S440, after the main processor finishes the hardware initialization operation, acquiring the software code obtained after the software package is decompressed from the coprocessor, and continuing to execute S450.
S450, the main processor runs the software codes.
The bus connector is also connected with a main processor, and the second bus control parameter is used for controlling the bus connector to be connected with the main processor and the switching chip and disconnecting the coprocessor and the switching chip.
It should be noted that the present embodiment implements access right control through the hardware of the configurable bus connector, but is not limited thereto. Any software and/or hardware method capable of implementing bus control is within the scope of the present embodiments.
It should be noted that when the coprocessor configures the switch chip, the bus between the main processor and the switch chip is cut off, and at this time, the main processor completes the power-on and initialization processes, and does not access the switch chip in the initialization process. The coprocessor takes 2-3 seconds to complete the configuration of the exchange chip. In most cases, the initialization process of the main processor is longer than the configuration process of the switch chip, and after 2-3 seconds, the main processor completes the initialization process and is connected with the switch chip through the bus connector to access the switch chip, so that network communication is realized. Based on the above analysis, the host processor will not perceive the operation of the bus connector nor the connection or disconnection to the switch chip.
In the embodiment, a bus connector is added in the switch, and the coprocessor sends bus control parameters to the bus connector to realize the acquisition and release of access rights, so that a bus basis is provided for the coprocessor to configure the switching chip and the main processor to access the switching chip after the configuration is completed; meanwhile, the coprocessor and the main processor can independently operate the exchange chip in different time intervals by acquiring and releasing the access authority; further, the connection or disconnection to the switching chip is not perceived by the main processor, and thus has little effect on the main processor.
In the above embodiment, the configuration items have at least 2 sources: 1. before the switch is started or in the running process, configuration items configured by a user; 2. and configuration items corresponding to switch events generated by protocols or physical states in the running process of the switch.
Optionally, before the switch is started, the coprocessor periodically receives and stores the configuration items required for starting the switch, which are sent by the main processor.
Before the switch is started, the user configures the main processor with configuration items required for starting the switch. The main processor periodically transmits the configuration items configured by the user to the coprocessor. The coprocessor then writes the received configuration item into a fourth memory to which the coprocessor is connected.
It should be noted that, in order to ensure that the switch can be started quickly when being started for the first time, the configuration item is written in the coprocessor before the switch is started for the first time, so that the configuration item stored in advance can be directly configured in the switch chip when the switch is started for the first time and started subsequently, and quick start is realized. Of course, the configuration item configured by the user and/or the configuration item corresponding to the switch event may be saved after the switch is started, instead of writing the configuration item into the switch before the switch is started for the first time.
In some embodiments, after the coprocessor releases the access right to the switch chip, the coprocessor operates in a polling state and receives a configuration item which is sent by the main processor and is required for starting the switch through a bus between the coprocessor and the main processor, and the configuration item is packaged in a message sent by the main processor. In the running process of the switch, the coprocessor receives and stores configuration items corresponding to the dynamic events of the switch, which are sent by the main processor, in real time; and/or the coprocessor periodically receives and stores the configuration items of the user configuration sent by the main processor.
It is worth to be noted that, in the running process of the switch, the coprocessor only has the function of receiving and storing the configuration items and does not have the access right of the switch chip, and the main processor has the access right of the switch chip.
The dynamic event of the switch at least comprises one of port downtime, a spanning tree protocol forwarding state and a link state. The configuration items configured by the user at least comprise one of port rate duplex configuration items, port virtual local area network serial number configuration items, virtual local area network member configuration items, aggregation port configuration items, spanning tree protocol configuration items and serial peripheral interface communication control configuration items.
In some embodiments, during the operation of the switch, some configuration items are generated by dynamic events, that is, the configuration items of the switch are generated by events such as port down, STP forwarding state, LINK (connection) state, etc., and the main processor needs to send the corresponding configuration items to the coprocessor and save the configuration items in real time; some configuration items are configured by a user, for example, VLAN state, port aggregation, pvid setting, VLAN member setting, STP setting, port rate setting, etc., and the main processor may periodically send the corresponding configuration items to the coprocessor and save them. The coprocessor enables the configuration items corresponding to the switch events in the coprocessor to be consistent with the configuration protection of the switch chip by storing the configuration items corresponding to the switch events. Then, when the switch is restarted next time, the coprocessor can reconfigure the configuration items which are saved before the restart and are consistent with the configuration condition of the switch chip into the switch chip so as to ensure that the configuration condition of the switch chip after the restart is the same as that before the restart.
In some embodiments, a proprietary asynchronous data communication protocol is employed between the host processor and the coprocessor. Correspondingly, the coprocessor receives a configuration item which is sent by the main processor and is required for starting the switch, and the configuration item comprises the following steps: the coprocessor receives a message based on a private asynchronous data communication protocol sent by a main processor, wherein the message comprises a configuration item; the coprocessor analyzes the configuration items from the message and stores the configuration items.
Figure 4b shows the message format of the proprietary asynchronous data communication protocol. The message adds a special character, for example, 0x40, as a start identifier at the start position of the user information frame, and adds a special character, for example, 0x24, as an end identifier at the end position of the user information frame. The start and end flags each take 1 byte. The first byte of the user information frame is the length of the user information frame. The second byte of the user information frame is a reserved byte and is set to 0. The third byte of the user information frame is a command byte, and the command classification comprises: 0x 01: responding to the message; 0x 11: port rate duplex setting; 0x 21: PVID setting; 0x 31: VLAN member setting; 0x 41: setting a polymerization port; 0x 51: STP setting; 0x 61: and (5) controlling SPI communication. The next n bytes of the user information frame are configuration items that match the command bytes.
After receiving the message, the coprocessor verifies the length of the start identifier, the end identifier and the user information frame, and if the verification is legal, the coprocessor analyzes the configuration item from the message and stores the configuration item into a fourth memory. Optionally, after the coprocessor configuration item is saved, a response message is replied to the main processor to inform the main processor of the configuration result, for example, whether the message is received, which configuration item is parsed, which configuration item is saved, and an address is saved.
During the normal operation of the switch, if a network failure occurs to cause the switch to restart, the coprocessor still stores the previous configuration items at the moment. Then, continuing to execute step S320 and subsequent steps, after the coprocessor in the switch is initialized, obtaining the access right to the switch chip, and reading the configuration items required by the switch startup, which are stored in advance; and configuring the configuration items into the switch chip, thereby realizing the quick start of the switch.
In this embodiment, on one hand, the coprocessor periodically receives and stores the configuration items configured by the user before the switch is started and in the running process of the switch, and receives and stores the configuration items of the switch event sent by the main processor in the running process of the switch, so that the switch can be quickly started according to the configuration items configured by the user and the configuration items corresponding to the switch event, and meanwhile, the configuration items corresponding to the switch event in the coprocessor and the configuration condition of the switch chip are protected to be consistent by storing the configuration items corresponding to the switch event. Then, when the switch is restarted next time, the coprocessor can reconfigure the configuration items which are saved before the restart and are consistent with the configuration condition of the switch chip into the switch chip so as to ensure that the configuration condition of the switch chip after the restart is the same as that before the restart.
On the other hand, the processing capacity of the main processor is stronger than that of the coprocessor, the coprocessor utilizes the stronger processing capacity of the main processor to acquire information related to configuration in the running process of the switch, such as information configured by users for the switch, such as VLAN state, port aggregation, pvid, VLAN members, STP (spanning Tree protocol) and port rate, and switch events, such as port downtime, STP forwarding state, connection state and the like, and stores the information into a fourth memory as configuration items of a switch chip, so that the coprocessor can directly read the configuration items from the local for configuration without acquiring the configuration items when the switch chip is configured by the coprocessor, and the starting time of the switch is further saved; in addition, since the coprocessor configures the switch chip, the main processor is not required to configure the switch chip accordingly, and thus, the configuration pressure of the main processor is shared by using the configuration time and the configuration function of the coprocessor.
EXAMPLE five
Fig. 5a is a schematic structural diagram of a switch according to a fifth embodiment of the present invention. As shown in fig. 5a, the switch comprises: a main processor 51 and a co-processor 52 connected to each other.
The main processor 51 is used for executing hardware initialization operation after the switch is powered on;
the coprocessor 52 is used for executing the decompression operation of the software package after the switch is powered on;
the main processor 51 is further configured to obtain a software code obtained by decompressing the software package from the coprocessor 52; and running the software code.
In the embodiment of the present invention, the main processor 51 executes hardware initialization operation, and at the same time, the coprocessor 52 executes decompression operation of a software package; after the main processor 51 completes the hardware initialization operation, the software code obtained by decompressing the software packet is obtained from the coprocessor 52, and it can be seen that, in this embodiment, the decompression operation of the software packet originally completed by the main processor 51 is completed by the coprocessor 52, and the coprocessor 52 and the main processor 51 are independent from each other, and can perform the hardware initialization and the software packet decompression in parallel, so the startup duration of the switch is: the sum of the hardware initialization time and the software packet decompression time, the software code acquisition time and the software code execution time is longer, and the software code acquisition time in the embodiment is relatively shorter and can be ignored, so that compared with the prior art, the method for quickly starting the switch provided by the embodiment can obviously reduce the starting time and improve the starting speed of the switch.
Optionally, the coprocessor 52 is further configured to generate a completion identifier after completing the decompression operation on the software package; accordingly, when the main processor 51 obtains the software code obtained by decompressing the software package from the coprocessor 52 after the hardware initialization operation is completed, the following steps are specifically performed: after the hardware initialization operation is completed, when the completion identifier in the coprocessor 52 is monitored, the software code obtained by decompressing the software package is acquired from the coprocessor 52.
Fig. 5b is a schematic structural diagram of another switch according to the fifth embodiment of the present invention. As shown in fig. 5b, the switch further comprises: a first memory 53 and a fourth memory 56 connected to the coprocessor 52, and a second memory 54 and a third memory 55 connected to the main processor 51.
When the main processor 51 executes the hardware initialization operation after the switch is powered on, specifically, after the switch is powered on, the main processor is configured to load the boot loader from the third memory 55 connected thereto, and execute the hardware initialization operation.
The coprocessor 52 is specifically configured to, after the switch is powered on, read the software package from the fourth memory 56 connected thereto, and perform the decompression operation of the software package when the decompression operation of the software package is performed after the switch is powered on.
The coprocessor 52, when performing the decompression operation of the software package, is specifically configured to: the software package is decompressed to obtain software code and the software code is stored in a first memory 53 to which the co-processor 52 is connected.
After the hardware initialization operation is completed, when the main processor 51 acquires the software code obtained by decompressing the software package from the coprocessor 52, the following steps are specifically performed: after the hardware initialization operation is completed, the software code stored in the first memory 53 is copied to the second memory 54 connected to the main processor 51.
Optionally, after running the software code, the main processor 51 is further configured to: performing an upgrade operation on the software package in the fourth memory 56; and/or performing an upgrade operation on the boot loader in the third memory 55.
Fig. 5c is a schematic structural diagram of another switch according to the fifth embodiment of the present invention. As shown in fig. 5c, the switch further comprises: and a switching chip 57 connected to the main processor 51 and the coprocessor 52, respectively.
The coprocessor 52 is also used for acquiring the access right to the switching chip 57 after the switch is powered on; reading a configuration item which is stored in advance and is required for starting the switch; and configuring the configuration items into the switch chip 57; the access right to the switch chip 57 is released to allow the main processor 51 to access the switch chip 57.
The main processor 51 is further configured to access the switch chip 57 after the coprocessor 52 releases the access right to the switch chip 57.
In an alternative embodiment, the main processor 51 is further configured to run the modified software development kit after initialization; configuring the modified operation result of the software development kit to the switch chip 57; the modified software development kit is obtained by deleting or skipping the programs corresponding to the configuration items in the software development kit provided by the switch manufacturer.
Optionally, as shown in fig. 5c, the switch further includes: a bus connector 58; the bus connector 58 is connected to the switch chip 57, the coprocessor 52 and the main processor 51, respectively.
The switch includes a switch board 50 and a backplane 60, the backplane 60 also being referred to as a master board in the switch. The exchange board 50 is snapped onto the base board 60 by means of a connector 70. The switch board 50 is provided with a switch chip 57 bus connector 58 and a coprocessor 52, and the backplane 60 is provided with a main processor 51. For convenience of description and distinction, in fig. 5c, a bus between the coprocessor 52 and the main processor 51 is referred to as a bus 1, and a bus between the coprocessor 52 and the main processor 51 and the switch chip 57 is referred to as a bus.
Optionally, a network card interface 59 is further disposed on the bottom board 60, and the switching chip 57 is connected to the network card interface 59 through the bus 3.
The coprocessor 52 is configured to issue the first bus control parameter or the second bus control parameter to the bus connector 58.
A bus connector 58 for connecting the coprocessor 52 and the switch chip 57 and disconnecting the main processor 51 from the switch chip 57 according to a first bus control parameter; or, according to the second bus control parameter, connecting the main processor 51 and the switch chip 57, and disconnecting the coprocessor 52 and the switch chip 57.
In an optional embodiment, the coprocessor 52 is further configured to receive and store, in real time, a configuration item corresponding to a dynamic event of the switch, which is sent by the main processor 51, in the switch operation process; and/or before the switch is started or in the running process, the coprocessor 52 periodically receives and stores the configuration items of the user configuration sent by the main processor 51;
the dynamic event of the switch at least comprises one of port downtime, a spanning tree protocol forwarding state and a link state; the configuration items configured by the user at least comprise one of port rate duplex configuration items, port virtual local area network serial number configuration items, virtual local area network member configuration items, aggregation port configuration items, spanning tree protocol configuration items and serial peripheral interface communication control configuration items.
In an alternative embodiment, a proprietary asynchronous data communication protocol is used between coprocessor 52 and host processor 51; correspondingly, when receiving the configuration item required to start the switch, sent by the main processor 51, the coprocessor 52 is specifically configured to: receiving a message based on a private asynchronous data communication protocol sent by the main processor 51, wherein the message includes a configuration item; and analyzing the configuration items from the message and storing the configuration items in a memory.
EXAMPLE six
An embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, where the computer program is used to execute a method for fast booting a switch when executed by a coprocessor and a main processor, and the method includes:
after the switch is powered on, a main processor in the switch executes hardware initialization operation, and a coprocessor in the switch executes decompression operation of a software package;
after the main processor finishes hardware initialization operation, software codes for decompressing the software package are obtained from the coprocessor;
the main processor runs the software code.
Of course, the computer program provided in the embodiments of the present invention is not limited to the above method operations, and may also perform related operations in the switch fast boot method provided in any embodiment of the present invention.
From the above description of the embodiments, it is obvious for those skilled in the art that the present invention can be implemented by software and necessary general hardware, and certainly, can also be implemented by hardware, but the former is a better embodiment in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which can be stored in a computer-readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute the methods of the embodiments of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments illustrated herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (9)
1. A method for quickly starting a switch is characterized by comprising the following steps:
after a switch is powered on, a main processor in the switch executes hardware initialization operation, and a coprocessor in the switch executes decompression operation of a software package;
after the main processor finishes hardware initialization operation, software codes for decompressing the software package are obtained from the coprocessor;
the main processor running the software code;
the coprocessor and the main processor respectively form two independent systems, the hardware initialization operation of the main processor and the decompression operation of the coprocessor are not influenced mutually and are processed in parallel;
after the main processor completes the hardware initialization operation, before the software code obtained by decompressing the software package is obtained from the coprocessor, the method further comprises the following steps:
after the coprocessor completes the decompression operation of the software package, a completion identifier is generated;
correspondingly, after the main processor completes the hardware initialization operation, the method for acquiring the software code after the software package is decompressed from the coprocessor comprises the following steps:
in the process of the coprocessor executing decompression operation, periodically acquiring decompressed software codes; only the software code that is once decomposed is acquired each time the software code is acquired, so as to avoid repeated acquisition of the software code.
2. The method of claim 1, wherein the coprocessor in the switch performs decompression operations of the software package, comprising:
a coprocessor in the switch decompresses a software package to obtain a software code, and stores the software code into a first memory connected with the coprocessor;
correspondingly, after the main processor completes the hardware initialization operation, the method for acquiring the software code after the software package is decompressed from the coprocessor comprises the following steps:
and after the main processor finishes the hardware initialization operation, copying the software codes stored in the first memory into a second memory connected with the main processor.
3. The method of claim 1, wherein after the switch is powered on, a main processor in the switch performs a hardware initialization operation, and a coprocessor in the switch performs a software packet decompression operation, comprising:
and after the switch is powered on, the main processor in the switch loads a boot loader from a third memory connected with the main processor and executes hardware initialization operation, and the coprocessor in the switch reads a software package from a fourth memory connected with the coprocessor and executes decompression operation of the software package.
4. The method of claim 3, after the main processor runs the software code, further comprising:
the main processor carries out upgrading operation on the software package in the fourth memory; and/or the presence of a gas in the gas,
and the main processor carries out upgrading operation on the boot loader in the third memory.
5. The method according to any one of claims 1-4, further comprising:
after the switch is powered on, the coprocessor acquires the access right to the switch chip;
the coprocessor reads a configuration item which is stored in advance and is required for starting the switch; and
configuring the configuration items into the exchange chip;
the coprocessor releases the access right to the exchange chip so that the main processor can access the exchange chip.
6. A switch comprising a main processor and a coprocessor connected to each other;
the main processor is used for executing hardware initialization operation after the switch is powered on;
the coprocessor is used for executing the decompression operation of the software package after the switch is powered on;
the main processor is also used for acquiring a software code obtained after the software package is decompressed from the coprocessor; and running the software code;
the coprocessor and the main processor respectively form two independent systems, the hardware initialization operation of the main processor and the decompression operation of the coprocessor are not influenced mutually and are processed in parallel;
the coprocessor is also used for generating a completion identifier after the decompression operation of the software package is completed;
the main processor
In the process of executing decompression operation by the coprocessor, periodically acquiring decompressed software codes; only the software code that is once decomposed is acquired each time the software code is acquired, so as to avoid repeated acquisition of the software code.
7. The switch of claim 6, further comprising: the first memory and the fourth memory are connected with the coprocessor, and the second memory and the third memory are connected with the main processor;
the coprocessor is specifically used for reading the software package from the fourth memory after the switch is powered on; decompressing the software package to obtain a software code, and storing the software code in a first memory;
the main processor is specifically used for loading a boot loader from the third memory after the switch is powered on and executing hardware initialization operation; copying the software code stored in the first memory to the second memory.
8. The switch of claim 7, further comprising: the switching chip is respectively connected with the main processor and the coprocessor;
the coprocessor is also used for acquiring the access authority to the exchange chip after the exchanger is electrified; reading a configuration item which is stored in advance and is required for starting the switch; and configuring the configuration items into the switch chip; releasing the access authority of the exchange chip so that the main processor can access the exchange chip;
and the main processor is also used for accessing the exchange chip after the coprocessor releases the access authority to the exchange chip.
9. A computer-readable storage medium, on which a computer program is stored, the program, when executed by a processor, implementing the switch fast boot method according to any one of claims 1-5.
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| CN111061521B (en) * | 2019-12-13 | 2023-06-09 | 恒为科技（上海）股份有限公司 | Method and system for starting equipment |
| CN111211932A (en) * | 2020-03-02 | 2020-05-29 | 盛科网络（苏州）有限公司 | Switch system starting method and starting device |
| CN114691218B (en) * | 2020-12-31 | 2025-01-03 | Oppo广东移动通信有限公司 | Coprocessor chip, electronic device and startup method |
| CN113094111B (en) * | 2021-04-16 | 2024-01-09 | 三星（中国）半导体有限公司 | Devices and how to start them |
| CN113612703B (en) * | 2021-08-26 | 2024-02-20 | 北京东土科技股份有限公司 | Startup control method, device, equipment and media for switch |
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| CN114064138A (en) * | 2022-01-17 | 2022-02-18 | 杭州研极微电子有限公司 | Method for starting system including multi-core processor and system adopting same |
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