CN109584806B - A display panel and its driving method and display device - Google Patents

Abstract

According to the display panel, the driving method thereof and the display device, the single driving chip is adopted, when the display panel is in a bent state, multi-pulse time-sharing light emission is carried out on the second display area for displaying the static picture, so that the effective light emitting time of the second display area is reduced, and the whole power consumption of the display panel is reduced during static display; in addition, the two independent driving chips can be arranged to respectively drive the first display area and the second display area, and when the display panel is in a bent state, the second display area displaying the static picture is driven by low frequency, so that the power consumption of the second display area can be reduced.

Description

A display panel and its driving method and display device

【Technical field】

The present application relates to the field of display technology, and in particular, to a display panel, a driving method thereof, and a display device.

【Background technique】

At present, display technology has penetrated into all aspects of people's daily life, and accordingly, more and more materials and technologies are used for display screens. Today, the mainstream display mainly includes liquid crystal display and organic light emitting diode display. Among them, due to the self-luminous performance of the organic light-emitting diode (OLED, Organic Light-Emitting Diode) display, compared with the liquid crystal display, the most energy-consuming backlight module is omitted, so it has the advantage of more energy saving; The diode display is also flexible and bendable. By using a flexible substrate, multiple conductive layers are sequentially formed on the flexible substrate, including a thin film transistor drive array layer, an anode layer, an organic light-emitting layer, a cathode layer, and a thin film encapsulation layer. , so that the OLED display has excellent bendability.

In addition, how to achieve low power consumption of the display panel is also a topic of constant research. When the flexible display panel is bent, how to achieve low power consumption in two different functional areas is also a relatively popular research topic.

【Contents of application】

In view of this, embodiments of the present application provide a display panel, a driving method thereof, and a display device. When the display panel is in a folded state, the first display area and the second display area are driven by differentiation, wherein the second display area is driven separately. The display area adopts a time-sharing light-emitting mode or a low-frequency driving mode to display static images, thereby reducing power consumption.

In one aspect, an embodiment of the present application provides a display panel including a first display area and a second display area, the first display area includes a plurality of first display units; the second display area includes a plurality of second display units a display unit; the display panel also has a virtual bending axis;

When the display panel is in the first state, within a unit time, the effective light-emitting time T1 of the first display unit and the effective light-emitting time T2 of the second display unit are substantially equal;

When the display panel is in the second state, within a unit time, the effective light-emitting time T2 of the second display area is less than the effective light-emitting time T1 of the first display unit.

In a specific embodiment of the present application, when the display panel is in the first state, the first display area and the second display area jointly display the same picture; when the display panel is in the first state In two states, the first display area and the second display area display different images independently.

In a specific embodiment of the present application, when the display panel is in the second state, the second display area is used to display a static image, and the first display area is used to display a dynamic image.

In a specific embodiment of the present application, the first display area includes a plurality of first light-emitting driving units for controlling light emission of the first display unit; the second display area includes a plurality of second light-emitting driving units a unit for controlling the light emission of the second display unit.

In a specific embodiment of the present application, the display panel further includes a first processing chip, and the first processing chip provides a first initialization signal to the first light-emitting driving unit and the second light-emitting driving unit, respectively and a second initialization signal; the first processing chip provides a first clock signal and a second clock signal to the first light-emitting driving unit; the first processing chip provides the first light-emitting driving unit with the first A clock signal and the second clock signal; wherein the first clock signal and the second clock signal are opposite pulse signals.

In a specific embodiment of the present application, when the display panel is in the second state, the duty ratio D2 of the second light-emitting signal output by the second light-emitting driving unit is smaller than that of the first light-emitting driving unit Duty ratio D1 of the outputted first lighting signal.

In a specific embodiment of the present application, the ratio of the duty cycle D2 of the second light-emitting signal to the duty cycle D1 of the first light-emitting signal is 0.4˜0.9.

In a specific embodiment of the present application, when the display panel is in the second state, within a unit time, the second initialization signal has a single pulse signal; the first initialization signal has N pulse signals , N is greater than or equal to 1, and is a positive integer.

In a specific embodiment of the present application, the value of N ranges from 4 to 8 (including the endpoint value).

In a specific embodiment of the present application, when the display panel is in the first state, the duty cycle D1 of the first light-emitting signal output by the first light-emitting driving unit is substantially equal to the second light-emitting The duty ratio D2 of the second light-emitting signal output by the driving unit.

In a specific embodiment of the present application, when the display panel is in the first state, within a unit time, the first initialization signal and the second initialization signal have the same timing sequence, and both are a single Pulse signal.

In a specific embodiment of the present application, when the first light-emitting signal output by the first light-emitting driving unit is a low-level signal, the first display unit is in a light-emitting state; when the first light-emitting signal is a high-level signal When the second light-emitting signal is a low-level signal, the first display unit is in a non-light-emitting state; when the second light-emitting signal is a low-level signal, the second display unit is in a light-emitting state; When the second light-emitting signal is a high-level signal, the second display unit is in a non-light-emitting state.

In a specific embodiment of the present application, the display panel further includes a bending detection unit for detecting whether the display panel is in the first state or the second state;

When detecting that the display panel is in the first state, the bending detection unit feeds back a signal to the first processing chip, and the first processing chip outputs a corresponding signal to the first display area and the first processing chip. two display areas;

When detecting that the display panel is in the second state, the bending detection unit feeds back a signal to the first processing chip, and the first processing chip outputs a corresponding signal to the first display area and the first processing chip. Second display area.

In a specific embodiment of the present application, the bending detection unit includes a capacitive sensing component for detecting whether the display panel is in a bent state;

The first state is that the display panel is in a flat and unfolded state; the second state is that the display panel is in a bent state, and the first display area and the second display area are bent in the virtual manner The axis is the axis of symmetry and is bent.

In a specific embodiment of the present application, the display panel further includes a second processing chip and a third processing chip which are arranged independently of each other; the second processing chip provides data to the first display area at a first frequency F1 signal; the third processing chip provides a data signal to the second display area at a second frequency F2; wherein, when the display panel is in the first state, the first frequency F1 is substantially equal to the The second frequency F2; when the display panel is in the second state, the second frequency F2 is lower than the first frequency F1.

In a specific embodiment of the present application, when the display panel is in the second state, the ratio of the second frequency F2 to the first frequency F1 ranges from 0.4 to 0.9 (including the endpoint value).

In another aspect, an embodiment of the present application provides a method for driving the above-mentioned display panel, the method comprising:

When the display panel is in the first state, the first initialization signal and the second initialization signal are written into the first light-emitting driving unit and the second light-emitting driving unit, respectively;

The first lighting driving unit and the second lighting driving unit output the first lighting signal and the second lighting signal respectively, wherein the first lighting signal and the second lighting signal are substantially the same;

When the display panel is in the second state, the first initialization signal and the second initialization signal are written into the first light-emitting driving unit and the second light-emitting driving unit, respectively;

The first lighting driving unit and the second lighting driving unit respectively output the first lighting signal and the second lighting signal, wherein the duty ratio D2 of the second lighting signal is smaller than the first lighting The duty cycle D1 of the signal; the output waveform of the first lighting signal is inconsistent with the output waveform of the second lighting signal.

In a specific embodiment of the present application, when the display panel is in the second state, within a unit time, the first light-emitting driving unit continues to output the first light-emitting signal having a low-level signal; The second light-emitting driving unit outputs the second light-emitting signal with N pulse periods, where N is greater than or equal to 1 and is a positive integer.

In a specific implementation manner of the present application, in the first state, the first processing chip simultaneously provides the first clock signal and the first clock signal to the first lighting driving unit and the second lighting driving unit respectively. the second clock signal; in the second state, the first processing chip simultaneously provides the first clock signal and the second clock to the first light-emitting driving unit and the second light-emitting driving unit, respectively Signal.

On the other hand, an embodiment of the present application provides a display device including the above-mentioned display panel.

The embodiment of the present application provides a display panel, a driving method and a display device thereof. By setting a single driving chip, when the display panel is in a bent state, multi-pulse time-division lighting is realized for a second display area displaying a static image. , thereby reducing the effective light-emitting time of the second display area, thereby reducing the overall power consumption of the display panel during static display; in addition, two independent driving chips can be set to drive the first display area and the second display area respectively. , when the display panel is in a bent state, a low frequency drive is adopted for the second display area displaying the static image, so that the power consumption of the second display area can be reduced.

【Description of drawings】

In order to illustrate the technical solutions of the embodiments of the present application more clearly, the following briefly introduces the accompanying drawings used in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without any creative effort.

FIG. 1 is a schematic diagram of a bending operation of the display panel 10 in the related art;

FIG. 2 is a schematic structural diagram of the display panel 1 provided by an embodiment of the present application;

FIG. 3 is another schematic diagram of the display panel 1 in FIG. 1;

FIG. 4 is a schematic diagram of a bending operation of the display panel 1 provided by the embodiment of the present application;

FIG. 5 is a schematic diagram of a driving circuit structure of the display panel 1 in FIG. 4;

Fig. 6 is the circuit schematic diagram of Emit driving circuit in Fig. 5;

7 is a schematic diagram of the working sequence of the Emit drive circuit in FIG. 5;

FIG. 8 is a schematic diagram of the working sequence of the driving circuit when the display panel 1 is in the first state;

FIG. 9 is a schematic diagram of the working sequence of the driving circuit when the display panel 1 is in the second state;

FIG. 10 is a schematic structural diagram of another display panel 1 provided by an embodiment of the present application;

FIG. 11 is a schematic diagram of a driving circuit structure of the display panel 1 in FIG. 10;

FIG. 12 is a schematic flowchart of a display panel driving method provided by an embodiment of the present application;

FIG. 13 is a schematic structural diagram of a display device provided by an embodiment of the present application.

【Detailed ways】

In order to better understand the technical solutions of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

It should be clear that the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. As used in the embodiments of this application and the appended claims, the singular forms "a," "the," and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise.

It should be understood that the term "and/or" used in this document is only an association relationship to describe the associated objects, indicating that there may be three kinds of relationships, for example, A and/or B, which may indicate that A exists alone, and A and B exist at the same time. B, there are three cases of B alone. In addition, the character "/" in this document generally indicates that the related objects are an "or" relationship.

In the description of this specification, it should be understood that words such as “substantially”, “approximately”, “approximately”, “approximately”, “approximately” and “substantially” described in the claims and embodiments of the present application refer to Within reasonable technological operating ranges or tolerances, it may be generally agreed upon, rather than a precise value.

It should be understood that although the terms first, second, third, etc. may be used to describe the display area in the embodiments of the present application, these flexible substrates should not be limited to these terms. These terms are only used to distinguish display areas from one another. For example, without departing from the scope of the embodiments of the present application, the first display area may also be referred to as the second display area, and similarly, the second display area may also be referred to as the first display area.

Through careful and in-depth research, as shown in FIG. 1 , after the flexible display panel 10 in the related art is bent along the bending axis aa', two light-emitting surfaces facing each other will be formed for dynamic image display. display area A, and display area B for static image display. Generally speaking, the display area B is used to display static images such as a virtual keyboard and a gamepad, allowing the user to input text or control games. For the display area B, the quality requirements for the display image are not high. In the related art, regardless of whether the display panel is bent or not, the display area A and the display area B use the same driving frequency and scanning method. Then, when the display panel is in a bent state, the same driving frequency and scanning driving method are adopted as the display area A, but the required precision of the display area B is not good, resulting in relatively redundant power consumption.

To this end, the embodiments of the present application provide a display panel, a driving method thereof, and a display device, in which the touch signal of the touch unit located on the light-emitting side of the display unit is differentiated to drive the first display area and the second display respectively. area, wherein the second display area adopts a time-sharing lighting mode or a low-frequency driving mode to display a static image and reduce power consumption.

Specifically, the display panel includes a first display area and a second display area, the first display area includes a plurality of first display units; the second display area includes a plurality of second display units; the display panel Also has a virtual bending axis;

When the display panel is in the first state, within a unit time, the effective light-emitting time T1 of the first display unit and the effective light-emitting time T2 of the second display area are substantially equal;

When the display panel is in the second state, within a unit time, the effective light-emitting time T1 of the first display unit is less than the effective light-emitting time T2 of the second display area.

Specifically, as shown in FIGS. 2 to 11 , an embodiment of the present application provides a display panel 1 , which may be a flexible and bendable display panel. Specifically, as shown in FIGS. 2 to 4 , the display panel 1 It includes a bending area R, a first display area 11 and a second display area 12 . The bending area R means that the display panel can be bent at different angles along the direction of the virtual bending axis XX'. Specifically, as shown in FIG. 2 , the display panel 1 is completely symmetrically folded along the first virtual bending axis XX', so that the size of the display panel is reduced to half the size in the unfolded state. It should be noted that the virtual bending axis XX' is not a physical component, but a virtual line segment along which the display panel 1 is folded. Or artificially call an area in the bending area R as a virtual bending axis XX', which is actually a preset display area on the display panel. In addition, the virtual bending axis XX' may be located at the centerline of the bending area R, and the flexible display panel 1 or the flexible display module may be symmetrically bent or folded along the virtual bending axis XX'.

Or as shown in FIG. 2 , the display panel 2 can be folded along the bending axis according to a folding mechanism (not shown in FIG. 2 ), and the bending area R in the folded state presents an arc-shaped structure. Of course, in this embodiment of the present invention, the flexible display panel 1 can be folded toward the direction of the screen display image, referred to as "inward fold"; or folded in the direction away from the screen display image, referred to as "outward fold". In addition, as shown in FIGS. 2 to 3 , the display area of the display panel 1 includes a bending area R, a first display area 11 and a second display area 12 (both of which are non-bending areas), and are located in the bending area. The display area of R includes multiple display units D11; the display area in the non-bending area (the first display area 11 and the second display area 12) includes multiple display units, specifically, the first display area 11 includes A plurality of first display units D12; the second display area 12 includes a plurality of second display units D13. That is to say, in the display area of the bending area R, the normal display screen can be performed like other areas in the non-bending area.

The reason why the display panel in the embodiment of the present invention can be folded or bent is because in the embodiment of the present invention, the display panel 1 adopts a flexible substrate, such as a high-transparency polymer material substrate. , to ensure that the display panel can achieve a flexible and bendable state. In the embodiment of the present invention, the bending curvature radius r of the display panel is between 0.3 mm and 1.0 mm, so as to ensure that the user can freely realize the bending operation. In addition, in this application document, "bending" refers to bending operations in different angular directions including symmetrical folding.

In addition, continuing to refer to FIGS. 2-4 , in a specific implementation manner of the present application, the display panel 1 further includes a first processing chip 14 located in a lower step area (also a non-display area), wherein the first processing chip 14 It can be bound on the flexible substrate of the display panel through the COP (Chip On PI or Chip On Plastic, the chip is integrated on the polymer substrate) process, so as to realize the display function control and the touch function control of the display panel 1 . The first processing chip 14 provides various control signals, such as data driving signals, gate driving signals, lighting control signals, constant voltage signals, and the like, to the display panel 1 .

Since the display panel 1 is a flexible and bendable display panel, the bending operation can be performed along the virtual bending axis XX′. As shown in FIG. 4 , the display panel 1 can be in the first state, that is, the tiled state. and the second display area 12 are on the same horizontal plane, and the two are used to jointly display the same complete picture; when the display panel 1 is bent along the virtual bending axis XX', it can be in the second state, that is, the first The light emitting surfaces of the display area 11 and the second display area 12 are disposed opposite to each other. In this state, the display panel 1 can implement a user interface like a "notebook computer" or a "game console". For example, the first display area 11 is used to display dynamic images, such as movie playback, picture playback, APP display interface, etc., and the second display area 12 can be used for a virtual keyboard or gamepad to realize a human-computer interaction interface. That is to say, when the display panel 1 is in the second state, the first display area 11 and the second display area 12 are used to display different pictures independently. Therefore, when the display panel 1 is in the second state, the first display area and the second display area can be respectively controlled by the first processing chip 14 .

In a specific embodiment of the present application, the display panel further has a bending detection unit (not shown in the figure) for detecting whether the display panel 1 is in the first state or the second state. When it is detected that the display panel 1 is in the first state, the bending detection unit feeds back a signal to the first processing chip 14, and the first processing chip 14 outputs corresponding signals to the first display area 11 and the second display area; when detecting the display panel 1 In the second state, the bending detection unit feeds back signals to the first processing chip 14 , and the first processing chip 14 outputs corresponding signals to the first display area 11 and the second display area 12 . In a specific embodiment of the present application, the bending detection unit may use a capacitive sensing component, and a metal electrode block may be disposed on the light-emitting side of the bending region R of the display panel 1 and on the substrate to form a parallel plate. The capacitor is used to detect whether the display panel is in a bent state. When the display panel is in a flat-out state, there is no capacitance change in the parallel plate capacitors, that is, in the first state, the capacitive sensing component is fed back to the first processing chip; when the first display area 11 and the second display area 12 are in a virtual bend The folding axis XX' is the axis of symmetry. When bending, the bending area R of the display panel will be deformed, and the capacitance will be changed. At this time, the capacitance in the parallel plate capacitor changes, that is, the second state, and the capacitive sensing component is fed back to the first processing chip.

As for the structure of the drive circuit of the display panel 1, as shown in FIGS. 4 to 9, the first display area 11 includes a plurality of first light-emitting drive units that are cascaded with each other, that is, the Emit drive circuit of the area 11, which is used to transmit The pixel circuit of the corresponding row outputs the light emission control signal Emit, so as to realize the light emission control of the first display unit of the corresponding row. It should be noted that each first display unit includes a correspondingly arranged pixel circuit and a light-emitting unit; the pixel circuit receives the light-emitting control signal Emit to generate a driving current, which is provided to the light-emitting unit to emit light.

The second display area 12 includes a plurality of cascaded second light-emitting driving units, that is, the Emit driving circuits in area 12, which are used to output the light-emitting control signal Emit to the pixel circuits of the corresponding row, so as to realize the control of the first display unit of the corresponding row. Glow control. It should be noted that each second display unit includes a correspondingly arranged pixel circuit and a light-emitting unit; the pixel circuit receives the light-emitting control signal Emit to generate a driving current, which is provided to the light-emitting unit to emit light.

Both the first light-emitting driving unit and the second light-emitting driving unit are controlled by the first processing chip. Specifically, the first processing chip provides the first initialization signal STV1 and the first clock to the first light-emitting driving unit. signal CK1 and the second clock signal CK2; the second processing chip provides the second initialization signal STV2, the first clock signal CK1 and the second clock signal CK2 to the second light-emitting driving unit. That is to say, the first processing chip provides the same clock signal to the first display area 11 and the second display area 12, namely the first clock signal CK1 and the second clock signal CK2, wherein the first clock signal CK1 and the second clock signal CK1 The signals CK2 are mutually opposite pulse signals. The first processing chip provides independent initialization signals to the first display area 11 and the second display area 12 respectively to control the corresponding light-emitting driving units.

Continuing to refer to FIG. 5 , the working mechanism and structure of the plurality of cascaded first light-emitting driving circuits in the first display area 11 , namely the Emit circuits of the area 11 are: for the first-level light-emitting driving circuit, 11 The first-stage Emit drive circuit in the area receives the first initialization signal STV1, the first clock signal CK1 and the second clock signal CK2 provided by the first processing chip, and then outputs the first-stage light-emitting control signal Emit11 to the first row of pixels in the 11 area The circuit realizes the lighting control of the first display unit in the first row; meanwhile, the lighting control signal Emit11 of the first stage is also used as the input signal of the lighting driving circuit of the second stage, and is cascaded to generate the lighting control signal Emit of the corresponding row. Until the light-emitting control signal Emit1N of the Nth stage output by the last stage Emit driving circuit.

The working mechanism and structure of the multiple cascaded second light-emitting driving circuits in the second display area 12 , that is, the Emit circuits of the area 12 are basically the same as those of the first light-emitting driving circuit. That is: in terms of the first-level light-emitting driving circuit, the 12-area first-level Emit driving circuit receives the second initialization signal STV2, the first clock signal CK1 and the second clock signal CK2 provided by the first processing chip, and then outputs the first The first row of pixel circuits in the first row of the first row of the light-emitting control signal Emit21 to 21 realizes the light-emitting control of the second display unit of the first row; at the same time, the first-stage light-emitting control signal Emit21 is also used as the input signal of the second-stage light-emitting drive circuit , and output the light-emitting control signal Emit of the corresponding row in cascade in sequence until the N-th light-emitting control signal Emit2N output by the last-stage Emit driving circuit.

For the specific structure and working mode of the light-emitting driving circuits in the first display area 11 and the second display area 12, please refer to FIG. 6 to FIG. 7 , in which the working process is that the display panel 1 is in the first state, so that the The first-stage Emit drive circuit is taken as an example, and explained.

During the period of t4, the first clock signal CK is at a low level, the second clock signal CK2 is at a high level, and the input signal STV(IN) is at a high level; the first transistor M1 and the second transistor M2 are turned on, and the input signal IN The high level of , is transmitted to the N1 node through the first transistor M1, and the tenth transistor M10 is turned off. The node N2 maintains the high level at the previous moment through the second capacitor C2, and the ninth transistor M9 is turned off. The output terminal Emit continuously outputs the low level at the last moment. On the other hand, the low level of the first clock signal CK and VGL are output to the gates of the fifth transistor M5 and the sixth transistor M6 through the third transistor M3 and the second transistor M2 respectively; the sixth transistor M6 is turned on, and the second clock The high level of the signal is transmitted to the other pole of the capacitor C3, and a low level signal is output at this time.

During the period of t5, the first clock signal CK is at a high level, the second clock signal CK2 is at a low level, and the input signal IN is at a low level; since the gate of the sixth transistor M6 is at a low level at the last moment, M6 is turned on , the low level of the second clock signal CK2 is transmitted to the other pole of the capacitor C3. At the same time, the other pole of the capacitor C3 is at a high level at the last moment and is at a low level at this moment, so the gate potential of the sixth transistor M6 is further decreased through the coupling of the capacitor C3. At the same time, the seventh transistor M7 is turned on, and the low level is transmitted to the N2 node, so that the ninth transistor M9 is turned on, and the high-level signal VGH is transmitted to the output signal terminal Emit through the ninth transistor M9, and a high-level signal is output at this time. At the same time, the fifth transistor M5 and the fourth transistor M4 are turned on, and a high-level signal is transmitted to the N1 node, so that the tenth transistor M10 is turned off, and a high-level signal is output at this time.

In stage t6, the first clock signal CK is at a low level, the second clock signal CK2 is at a high level, and the input signal IN is at a low level; the first transistor M1 and the second transistor M2 are turned on, and the low level of the input signal IN The level is transmitted to the N1 node through the first transistor M1, the tenth transistor M10 is turned on, and the low-level signal VGL is transmitted from the tenth transistor M10 to the output terminal Emit; on the other hand, the gate of the eighth transistor M8 is connected to the N1 node, so The eighth transistor M8 is turned on, and transmits the high-level signal VGH to the gate of the ninth transistor M9, and the ninth transistor M9 is turned off; at this time, a low-level signal is output.

In the t7 stage, the first clock signal CK is at a high level, the second clock signal CK2 is at a low level, and the input signal STV1 (IN) is at a low level; the N1 node maintains the low level at the previous moment, so that the tenth transistor M10 is turned on, and the low-level signal VGL is transmitted to the output terminal Emit; at the same time, the second clock signal CK2 changes from the high level at the previous moment to the low level, and is coupled to the N1 node through the first capacitor C1, so that the tenth transistor M10 better outputs low level VGL; at the same time, the high level of the first clock signal CK is transmitted to the gate of the fifth transistor M5 through the third transistor M3, so that the fifth transistor M5 is turned off, preventing the transmission of the high level VGH to the gate of the fifth transistor M5. N1 node. On the other hand, the low level of the N1 node makes the eighth transistor M8 turn on, and the high level signal VGH is transmitted to the N2 node, so that the ninth transistor M9 is turned off; at this time, a low level signal is output. After that, the t6 and t7 stages are repeated and only the low level is continuously output until the next frame starts the signal with a high level.

Based on the above structure and working process of the Emit drive circuit, when the display panel 1 is in the first state, as shown in FIG. 5 and FIG. 8 , the working sequence of the drive circuit of the display panel is shown in FIG. 8 . Specifically, when the display panel 1 is in the first state, since the first display area 11 and the second display area 12 jointly display the same picture, the first processing chip sends the information to the first display area 11 and the second display area 12 at this time. The timings of the clock signal provided by the second display area 12 and the initialization signal are basically the same. Specifically, in a unit time, the first initialization signal STV1 and the second initialization signal STV2 have the same timing, and both are single pulse signals, so that the first light emission output by the first light-emitting driving unit and the second light-emitting driving unit The output waveforms and timings of the signal Emit11 and the second lighting control signal Emit21 are also basically the same. For example, the duty cycle D1 of the first light-emitting signal Emit11 output by the first light-emitting driving unit is substantially equal to the duty cycle D2 of the second light-emitting signal Emit11 output by the second light-emitting unit. In the first state, the first display area 11 and the second display area 12 can be regarded as a unified display area, and the signals given by the first processing chip 14 to the two display areas are consistent, so that the same complete display can be realized. screen.

In addition, in a specific embodiment of the present application, the thin film transistor in the light-emitting driving unit is a P-type MOS transistor, which is in a conducting state when a low-level signal is passed. Therefore, when the first light-emitting signal is a low-level signal, the first display unit is in a light-emitting state; when the first light-emitting signal is a high-level signal, the first display unit is in a non-light-emitting state; when the second light-emitting signal When the signal is a low level signal, the second display unit is in a light-emitting state; when the second light-emitting signal is a high-level signal, the second display unit is in a non-light-emitting state. That is to say, if the light-emitting signal is continuously output at a low level, the display unit is in a light-emitting state. Then, when the display panel is in the first state, within a unit time, the effective light-emitting time T1 of the first display unit located in the first display area 11 and the effective light-emitting time T2 of the second display area are substantially equal. Because the timing and output waveform of the two light-emitting signals are basically the same.

When the display panel 1 is in the second state, in a specific implementation of the embodiment of the present application, the second light-emitting driving unit of the second display area 12 outputs a plurality of pulsed light-emitting control signals by time-division, and by reducing the first light-emitting control signal The duty cycle of the two light-emitting signals is reduced to achieve reduced power consumption. Specifically, as shown in FIG. 5 and FIG. 9 , the operation sequence of the driving circuit of the display panel is shown in FIG. 9 . Specifically, when the display panel 1 is in the second state, the first display area 11 and the second display The areas 12 display images independently, wherein the first display area 11 is used to display dynamic images and requires high-quality image quality; the second display area 12 is used to display static images, such as virtual keyboards, etc., without the need to display images like the first display area 11 For the high-quality picture, the timing and output waveform of the light-emitting signal from the first processing chip to the first display area 11 and the second display area 12 are inconsistent at this time.

Specifically, in a unit time, the first initialization signal STV1 and the second initialization signal STV2 have different timings and pulse numbers. The first initialization signal STV1 outputs a single pulse signal, so that the output waveform of the first lighting signal Emit11 output by the first lighting driving unit is also a single pulse signal; the second initialization signal STV2 outputs N (N is greater than or equal to 1, and is positive integer) pulse signal, so the output waveform of the second light-emitting signal Emit21 output by the second light-emitting driving unit is also N pulse signals. Wherein, in a specific embodiment of the present application, the value range of N is 4 to 8 (including the endpoint value), and in a preferred embodiment of the present application, N is 6, that is, in unit time, The second initialization signal STV2 outputs 6 pulse signals, then the output waveform of the outputted second light-emitting signal Emit21 is also 6 pulse signals. In this case, it can ensure that the transistor in the second pixel circuit can be turned on smoothly, and the light-emitting time can be guaranteed. At the same time, the power consumption of the second display area 12 can be further reduced.

Continuing to refer to FIG. 9 , specifically, when the display panel 1 is in the second state, the first-level light-emitting driving unit (the first-level Emit driving circuit of the first display area 11 ) and the second display area 12 of the first display area 11 are used. For example, the first-stage light-emitting driving unit (12-area first-stage Emit driving circuit), the duty cycle D2 of the second light-emitting signal Emit21 output by the second light-emitting unit is smaller than the first light-emitting signal Emit11 output by the first light-emitting driving unit. duty cycle D1. That is, when the display panel 1 is in the second state, in a unit time, the second light-emitting signal Emit21 is in the low-level state for less time than the first light-emitting signal Emit11 is in the low-level state. Since a P-type TFT transistor is used in the pixel circuit in the embodiment of the present application, the low level is turned on, so that the light-emitting unit emits light. Therefore, in the second state, within a unit time, the effective light-emitting time T2 of the second display area 12 is less than the effective light-emitting time T1 of the first display unit 11 . More specifically, in a specific embodiment of the present application, in a unit time, the ratio of the duty cycle D2 of the second light-emitting signal to the duty cycle D1 of the first light-emitting signal is 0.4˜0.9. That is to say, the low-level output time of the second light-emitting signal is 0.4-0.9 times the low-level output time of the first light-emitting signal. In a preferred embodiment of the present application, in order to ensure the normal display of the second display area 12, that is, to ensure sufficient charging time for the pixel circuit, and to effectively reduce the power consumption of the second display area 12, The ratio of the duty cycle D2 of the second lighting signal to the duty cycle D1 of the first lighting signal may be about 0.6.

The above embodiments use a single processing chip to realize the control of the first display area and the second display area in different states. The pulse time-division light-emitting driving mode reduces the effective light-emitting time of the second display area, thereby reducing the power consumption of the entire display panel.

On the basis of the above embodiments, the present application also provides a driving method of the display panel 1, as shown in FIG. 12, the method includes:

First, determine what state the display panel is in, specifically, check whether the display panel is in a bent state or in a flat unfolded state through a capacitive sensing component;

When the display panel is in the first state, the first processing chip writes the first initialization signal STV1 and the second initialization signal STV2 to the first light-emitting driving unit and the second light-emitting driving unit respectively; then, the first light-emitting driving unit and the second light-emitting driving unit The lighting driving unit outputs a first lighting signal and a second lighting signal respectively, wherein the first lighting signal and the second lighting signal are substantially the same. Specifically, in a unit time, the first initialization signal STV1 and the second initialization signal STV2 have the same timing, and both are single pulse signals, so that the first light emission output by the first light-emitting driving unit and the second light-emitting driving unit The output waveforms and timings of the signal Emit11 and the second lighting control signal Emit21 are also basically the same.

When the display panel is in the second state, the first processing chip writes the first initialization signal STV1 and the second initialization signal STV2 to the first light emitting driving unit and the second light emitting driving unit, respectively. Specifically, the first lighting driving unit and the second lighting driving unit respectively output a first lighting signal and a second lighting signal, wherein the duty ratio D2 of the second lighting signal is smaller than the duty ratio D1 of the first lighting signal ; The output waveform of the first lighting signal is inconsistent with the output waveform of the second lighting signal.

Specifically, when the display panel is in the second state, the first light-emitting driving unit continues to output a first light-emitting signal with a low level signal within a unit time; the second light-emitting driving unit outputs a second light-emitting signal with N pulse periods Lighting signal, N is greater than or equal to 1, and is a positive integer. Wherein, in a specific embodiment of the present application, the value range of N is 4 to 8 (including the endpoint value)

In addition, regardless of whether the display panel is in the first state or the second state, the clock signals provided by the first processing chip to the first display area and the second display area are basically the same, as shown in FIGS. 8 to 9 . That is to say, in the first state, the first processing chip provides the first clock signal CK1 and the second clock signal CK2 to the first light-emitting driving unit and the second light-emitting driving unit respectively; in the second state, the first processing chip At the same time, the first clock signal CK1 and the second clock signal CK2 are provided to the first light-emitting driving unit and the second light-emitting driving unit, respectively.

Through the above, when the display panel is in a bent state, the second display area 12 is driven in a time-divisional light-emitting manner, thereby reducing the overall power consumption of the display panel.

On the basis of the above embodiment, the present application also provides another display panel 1, as shown in FIGS. 10-11, the display panel includes a second processing chip 141 and a third processing chip 142 which are arranged independently of each other; The second processing chip 141 is bound to one end of the display panel through COF technology; the third processing chip 142 is bound to the other end of the display panel through COF technology. The second processing chip 141 and the third processing chip 142 are used to drive the first display area 11 and the second display area 12 respectively.

Specifically, as shown in FIG. 11, the second processing chip 141 provides data signals (not shown in the figure) to a plurality of first display units in the first display area 11; The N-level Emit drive circuit) provides the third initialization signal STV3, the clock signal CK31 and the clock signal CK31, etc., to realize the control of the output signal Emit1N of the first light-emitting drive unit;

The third processing chip 142 provides data signals (not shown in the figure) to a plurality of second display units in the second display area 12; provides data signals to a plurality of second light-emitting driving units (ie, the Nth-level Emit driving circuits in the 12 area) The fourth initialization signal STV4, the clock signal CK41, the clock signal CK41, etc. are used to control the output signal Emit2N of the second light-emitting driving unit.

Since the first display area 11 and the second display area 12 are controlled by two independent processing chips, in this embodiment, the purpose of reducing power consumption can be achieved by controlling the input frequency of the data signal. Specifically, the second processing chip 141 provides the data signal to the first display area 11 at the first frequency F1; the third processing chip 142 provides the data signal to the second display area 12 at the second frequency F2.

When the display panel is in the first state (that is, in the tiled state, the first display area and the second display area display the same complete picture together), the first frequency F1 is substantially equal to the second frequency F2 to ensure the display of the picture. uniformity.

When the display panel is in the second state (that is, in the tiled state, the first display area and the second display area independently display images), since the second display area 12 is used to display images with lower image quality requirements, the The frequency of the data signal input can be reduced, and the second frequency F2 can be set to be lower than the first frequency F1. In a specific embodiment of the present application, when the display panel is in the second state, the ratio of the second frequency F2 to the first frequency F1 ranges from 0.4 to 0.9. In a more preferred embodiment, when the display panel is in the second state, a data signal can be provided to the first display area 11 at a first frequency F1 of 60 Hz, and a data signal can be provided to the second display area 12 at a second frequency F2 of 30 Hz data signal. That is, in a unit time, the effective light-emitting time T2 of the second display unit is less than the effective light-emitting time T1 of the first display unit. Since the second display area 12 does not have high requirements for displaying images at this time, the images are displayed in a low-frequency driving manner, so that the image display can be ensured and power consumption can be saved.

In this embodiment, the independent control of the first display area 11 and the second display area 12 is realized by using two independent processing chips, so that the processing algorithm for the display screen becomes simpler.

The embodiment of the present application also provides a display device, as shown in FIG. 13 , which is a schematic structural diagram of the display device provided by the embodiment of the present application, the display device includes the above-mentioned display panel 1 , wherein the specific details of the display panel 1 are The structure has been described in detail in the above embodiments, and will not be repeated here. Of course, the display device shown in FIG. 13 is only a schematic illustration, and the display device may be any electronic device having a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic paper book, or a television.

Since the display device provided by the embodiment of the present application includes the above-mentioned display panel, the display panel and the driving method thereof and the display device provided by the embodiment of the present application adopt a single driving chip, when the display panel is in a bent state. , to realize multi-pulse time-division lighting for the second display area displaying the static image, thereby reducing the effective lighting time of the second display area, so as to reduce the overall power consumption of the display panel during static display; in addition, you can set the Two independent driver chips drive the first display area and the second display area respectively. When the display panel is in a bent state, the second display area displaying static images is driven at a low frequency, thereby reducing the power consumption of the second display area. .

The above descriptions are only preferred embodiments of the present application, and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the present application. within the scope of protection.

Claims (17)

1. A foldable display panel, comprising a first display area and a second display area, wherein the first display area includes a plurality of first display units; the second display area includes a plurality of second display units unit; The display panel also has a virtual bending axis; When the display panel is in the first state, within a unit time, the effective light-emitting time T1 of the first display unit and the effective light-emitting time T2 of the second display unit are substantially equal; When the display panel is in the second state, within a unit time, the effective light-emitting time T2 of the second display unit is less than the effective light-emitting time T1 of the first display unit; When the display panel is in the first state, the first display area and the second display area jointly display the same picture; When the display panel is in the second state, the first display area and the second display area independently display different pictures; The first display area includes a plurality of first light-emitting driving units for controlling the light-emitting of the first display units; The second display area includes a plurality of second light-emitting driving units for controlling the light-emitting of the second display units; The display panel further includes a first processing chip, The first processing chip provides a first initialization signal and a second initialization signal to the first light-emitting driving unit and the second light-emitting driving unit, respectively; the first processing chip provides a first clock signal and a second clock signal to the first light-emitting driving unit; the first processing chip provides the first clock signal and the second clock signal to the second light-emitting driving unit; Wherein, the first clock signal and the second clock signal are opposite pulse signals. 2 . The display panel according to claim 1 , wherein when the display panel is in the second state, the second display area is used to display a static image, and the first display area is used to display a static image. 3 . Dynamic picture. 3 . The display panel according to claim 1 , wherein when the display panel is in the second state, the duty cycle D2 of the second light-emitting signal output by the second light-emitting driving unit is smaller than the The duty ratio D1 of the first light-emitting signal output by the first light-emitting driving unit. 4 . The display panel according to claim 3 , wherein the ratio of the duty cycle D2 of the second light-emitting signal to the duty cycle D1 of the first light-emitting signal is 0.4˜0.9. 5 . 5 . The display panel according to claim 3 , wherein when the display panel is in the second state, the first initialization signal has a single pulse signal within a unit time; the second initialization The signal has N pulse signals, and N is greater than or equal to 1 and is a positive integer. 6 . The display panel according to claim 5 , wherein the value of N ranges from 4 to 8. 7 . 7 . The display panel according to claim 1 , wherein when the display panel is in the first state, the duty ratio D1 of the first light-emitting signal output by the first light-emitting driving unit is substantially It is equal to the duty ratio D2 of the second light-emitting signal output by the second light-emitting driving unit. 8 . The display panel according to claim 7 , wherein when the display panel is in the first state, within a unit time, the first initialization signal and the second initialization signal have the same timing sequence. 9 . , both of which are single pulse signals. 9 . The display panel according to claim 1 , wherein when the first light-emitting signal output by the first light-emitting driving unit is a low-level signal, the first display unit is in a light-emitting state; When the first light-emitting signal is a high-level signal, the first display unit is in a non-light-emitting state; When the second light-emitting signal output by the second light-emitting driving unit is a low-level signal, the second display unit is in a light-emitting state; when the second light-emitting signal is a high-level signal, the second display unit is in a light-emitting state. The unit is in a non-illuminated state. 10 . The display panel according to claim 1 , wherein the display panel further comprises a bending detection unit for detecting whether the display panel is in the first state or the second state; 10 . When detecting that the display panel is in the first state, the bending detection unit feeds back a signal to the first processing chip, and the first processing chip outputs a corresponding signal to the first display area and the first processing chip. two display areas; When detecting that the display panel is in the second state, the bending detection unit feeds back a signal to the first processing chip, and the first processing chip outputs a corresponding signal to the first display area and the first processing chip. Second display area. 11. The display panel according to claim 10, wherein the bending detection unit comprises a capacitive sensing component for detecting whether the display panel is in a bent state; The first state is that the display panel is in a flat and unfolded state; the second state is that the display panel is in a bent state, and the first display area and the second display area are bent in the virtual manner The axis is the axis of symmetry and is bent. 12. The display panel according to claim 1 or 2, wherein the display panel further comprises a second processing chip and a third processing chip which are arranged independently of each other; The second processing chip provides data signals to the first display area at a first frequency F1; the third processing chip provides data signals to the second display area at a second frequency F2; Wherein, when the display panel is in the first state, the first frequency F1 is substantially equal to the second frequency F2; When the display panel is in the second state, the second frequency F2 is lower than the first frequency F1. 13 . The display panel according to claim 12 , wherein when the display panel is in the second state, a ratio of the second frequency F2 to the first frequency F1 ranges from 0.4 to 0.9. 14 . 14. A method for driving a display panel, wherein the display panel is the display panel according to any one of claims 1 to 13, The method includes, When the display panel is in the first state, the first initialization signal and the second initialization signal are written into the first light-emitting driving unit and the second light-emitting driving unit, respectively; The first light-emitting driving unit and the second light-emitting driving unit respectively output a first light-emitting signal and a second light-emitting signal, wherein the first light-emitting signal and the second light-emitting signal are substantially the same; When the display panel is in the second state, the first initialization signal and the second initialization signal are written into the first light-emitting driving unit and the second light-emitting driving unit, respectively; The first lighting driving unit and the second lighting driving unit respectively output the first lighting signal and the second lighting signal, wherein the duty ratio D2 of the second lighting signal is smaller than the first lighting The duty cycle D1 of the signal; the output waveform of the first lighting signal is inconsistent with the output waveform of the second lighting signal. 15 . The method according to claim 14 , wherein when the display panel is in the second state, the first light-emitting driving unit continues to output the low-level signal within a unit time. 16 . the first light-emitting signal; The second light-emitting driving unit outputs the second light-emitting signal with N pulse periods, where N is greater than or equal to 1 and is a positive integer. 16 . The method according to claim 15 , wherein, in the first state, the first processing chip provides the first clock signal and a second clock signal; In the second state, the first processing chip simultaneously provides the first clock signal and the second clock signal to the first light-emitting driving unit and the second light-emitting driving unit, respectively. 17. A display device, wherein the display device comprises the display panel according to any one of claims 1 to 13.

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