CN105379429A - The invention relates to a method for producing a printed circuit board with multilayer sub-areas in sections - Google Patents
The invention relates to a method for producing a printed circuit board with multilayer sub-areas in sections Download PDFInfo
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- CN105379429A CN105379429A CN201480012789.0A CN201480012789A CN105379429A CN 105379429 A CN105379429 A CN 105379429A CN 201480012789 A CN201480012789 A CN 201480012789A CN 105379429 A CN105379429 A CN 105379429A
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- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 description 2
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Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
A method for producing a printed circuit board (13, 15, 16) with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (1, 1') and application of a dielectric insulating foil (3, 3') to at least one subarea of the conducting foil; b) applying a structure of conducting paths (4, 4') to the insulating layer (3, 3'); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (1, 1') plus insulating layer (3, 3') and conducting paths (4, 4') by interposing a prepreg layer (5, 85; 18, 18'), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method.
Description
Technical field
The present invention relates to the method for the production of the printed circuit board of tool multilayer subregion in some subregions.
The invention further relates to the printed circuit board produced according to the method.
Background technology
From WO2011/003123A1 (AT & S) known method and the printed circuit board (PCB) produced by the mode of the method.In this case, this printed circuit board comprises two or more PCB subregions, and wherein all subregion comprises at least one conductive layer or conducting element or conducting strip.Those subregions mechanically connect each other or electrical connection in its lateral surface.Those subregions apply at least one conductive layer, and it can be arranged to the configuration of single or multiple lift, and from then on plated-through-hole leads to conductive layer or the element of those subregions.This description describes multiple variant, it is about inserting larger printed circuit board region or base plate, also about the mechanical connection between subregion adjacent one another are and electrical connection by those subregions.In a variant, provide rigid and combination that is flexible circuit board region.
WO2011/026165A1 (AT & S) also depict the printed circuit board comprising two or more sub-elements, those sub-elements are connected with other elements or larger mutual component in its lateral edge, and wherein those lateral edge can comprise for interlocking into intermeshing structure.In the production of printed circuit board, those Individual elements that can be arranged to multilayer by such as leaving the distance of 200 μ and being linked, and are connected to each other by introducing adhesive and solidification thereafter thereafter.Thering is provided the object of described method to be to be convenient to produce this printed circuit board on the one hand, being convenient on the other hand by making subregion carry out autotelic exchange along the cutting of bonding contact.
US2009/0321921A1 (Huang) disclose comprise two surfaces and in inside with the semiconductor package part of printed circuit board, its with semiconductor module be accommodated in Insulating Materials formed layer recess in, and be connected with the first conductive structure, this first conductive structure is arranged on the inner side of the insulating barrier of this first surface.Second surface in outside is provided with the second conductive structure, and is provided with plated-through-hole in these two conductive structures.Be provided with second half conductor element outside the insulating barrier of this first surface, this semiconductor element is connected with this conductive structure through the electrical bonding in the hole in this insulating barrier.This second half conductor element is embedded in the molding compositions covering whole first surface, and the second surface of this packaging part is provided with solder ball, arranges or circuit board for connecting circuit.
The printed circuit board that US2010/0103634A1 (boat room-NEC) relates to is with the electronic component be embedded in resin, as integrated circuit, and printed circuit board on its surperficial both sides all with conductive structure, and those elements directly from inside be connected with conductive layer.Also show the printed circuit board comprising two conductive structures on its surperficial each side respectively, it is separated by insulating barrier, and wherein four conductive structures all can be connected via plated-through-hole respectively.This specification also describes stacking two such printed circuit boards, and the electrical connection carried out in the mode of electrocondution slurry or adhesive layer or mechanical connection.
EP2141972A1 (field, village) discloses a printed circuit plate module, and wherein relatively high the first element (as integrated circuit) and the second sub-element on conductive structure are arranged on its both sides all with on the basic printed circuit board of conductive structure.Sub-element is then made up of this printed circuit board of subbase, and it is equally on both sides all with conductive structure, however its with (comparatively this first element is short) additional circuit element (as integrated circuit) be then arranged on the electrically conductive.The element of this sub-element is embedded in resin bed, and is upwards covered by bucking electrode.This first element and highly to make an appointment and the sub-element be now placed on this basic printed circuit board is also embedded in resin, and upwards covered by secondary shielding electrode.These two bucking electrodes connect by plated-through-hole, and are also all provided with plated-through-hole between two conductive structures of basic printed circuit board and between two conductive structures of this this printed circuit board of subbase.
Summary of the invention
Object of the present invention is be provided in the printed circuit board comprising multilayer subregion in some subregions, and the known problem that multilayer printed circuit board region is provided in provided printed circuit board can not be caused, such as cut out corresponding free space, this subregion is alignd with the remaining part of this printed circuit board, the electrical connection etc. of this four sub-regions and printed circuit board as two-layer in this.
This object is reached by above-mentioned that method, and it is defined as with bottom rapid according to the present invention:
A) at least one conductive foil is provided, and dielectric insulation paper tinsel (3,3 ') is applied at least one subregion of conductive foil;
B) structure of conductive path is applied to this insulating barrier;
C) another printed circuit plate structure is provided;
D) by semi-solid preparation being placed on this another printed circuit plate structure and this conductive foil, between insulating barrier and conductive path, making it link; And
E) will in steps d under thrust and heating power) in the parts lamination that linked.
Can following steps be provided in advantageous embodiment of the present invention:
A ') the first conductive foil is provided, and dielectric insulation layer (3) is applied at least one subregion of the first conductive foil;
B ') structure of conductive path is applied to this insulating barrier of this at least one subregion;
C ') the second conductive foil is provided;
D ') semi-solid preparation layer is provided, and by step a ') and b ') in this at least one sub-component of producing and at least this second conductive foil link, wherein the 3rd semi-solid preparation layer is to provide between those conductive foils that those conductive foils are placed in outside;
E ') under thrust by steps d ') in the structural laminated of assembling become assembly;
F ') will at least one structuring of two conductive foils of the outside of assembly be placed in, to form conductive path;
G ') generation reaches the hole to being placed in inner conductive path through at least one those insulating barrier, and generation is from being placed in outside conductive path towards the plated-through-hole being placed in inner conductive path.
Suitable modifications of the present invention is provided by following steps:
A ') the first conductive foil is provided, and dielectric insulation layer (3) is applied at least one subregion of the first conductive foil;
B ') structure of conductive path is applied to this insulating barrier of this at least one subregion;
Ba ') cover this first conductive foil with semi-solid preparation layer, the dimension of this semi-solid preparation layer is in fact to should the dimension of the first conductive foil;
C ') the second conductive foil is provided, and
Ca ') dielectric insulation layer is applied at least one subregion of this second conductive foil;
Cb ') structure of conductive path is applied to this insulating barrier of this at least one subregion;
Cc ') cover this second conductive foil with the second semi-solid preparation layer, the dimension of this second semi-solid preparation layer is in fact to should the dimension of the second conductive foil;
Da ') the 3rd semi-solid preparation layer is provided and by step a ') to c ') and in the first sub-component of producing and steps d ') to f ') and in the second sub-component of producing connect to single sub-component, wherein this semi-solid preparation layer position of being to provide the conductive path of two sub-components between those sub-components is for toward each other;
Ea) under thrust and heating power, the first sub-component and the 3rd semi-solid preparation layer and the second subcomponent layers are pressed into assembly;
F) at least one structuring of two conductive foils of the outside of assembly will be placed in, to form conductive path;
G) produce and reach hole to being placed in inner conductive path through at least one those insulating barrier, and produce from being placed in outside conductive path towards the plated-through-hole being placed in inner conductive path.
In the variant that another is favourable, in step b) after following steps are provided:
Ba ') at least one of those conductive foils is covered with semi-solid preparation layer, the dimension of this semi-solid preparation layer is in fact to should the dimension of the first conductive foil.
In order to draw without any smooth surface heaved, if semi-solid preparation layer comprises groove, size and the geometry of its size and geometry and dielectric layer are corresponding, be then favourable.
When forming alignment mark in the first and second conductive foils, the accurate link of other layer just can be promoted.
When insulating barrier is that the method just can be cost-effective especially by using the applying of silk screen printing processing mode and/or conductive path to be applied by printing treatment mode.
If in step g) in produce plated-through-hole by electrocondution slurry, and/or in step g) in produce this some holes by laser drill, then very favourable to the method.
This object is also achieved by this kind of printed circuit board described above, this printed circuit board is produced by method according to the present invention, wherein be provided with the first and second outer conductive foils, dielectric insulation layer is disposed at least one subregion on the inner side of at least one conductive foil, and this at least one dielectric insulation layer comprises conductive path within it on the surface, it is connected with adjacent conductive foil via at least one plated-through-hole, and the remaining space between the conductive foil outwards arranged is filled with semi-solid preparation layer.
In suitable variant, the outer surface of this at least one conductive foil is structured.
In order to realize the flexibility of this printed circuit board, can be it and being provided in the thinner configuration of central region, this is that two conductive foils outwards arranged are partially removed.
In order to simplify configuration and save cost, those conductive paths can be provided as and be arranged to capacitor together with the semi-solid preparation layer region be placed between described conductive path.
In the variant that can produce economically, those insulating barriers can be provided as and be printed on those conductive foils.
When those conductive paths are printed on those insulating barriers, also can be favourable.
In another variant, can be provided as this another printed circuit plate structure is traditional printed circuit board.
Accompanying drawing explanation
Hereafter illustrate in greater detail the present invention and more advantages thereof with reference to embodiment, those embodiments are shown by the mode of example in the accompanying drawings, wherein:
Fig. 1 a and Fig. 1 b shows the simplified schematic diagram of the first conductive layer provided with dielectric insulation thing;
Fig. 1 c shows the sectional view of the line Ic-Ic along Fig. 1 b;
Fig. 2 a shows the simplified schematic diagram of the conductive path being applied to this insulating barrier;
Fig. 2 b shows the sectional view of the line IIb-IIb along Fig. 2 a;
Fig. 2 c shows the simplified schematic diagram being with reeded first semi-solid preparation layer;
Fig. 2 d shows after being linked by the parts as described in Fig. 2 b and 2c, the sub-component of this printed circuit board;
Fig. 3 shows the sectional view of the sub-component of the printed circuit board produced in a similar manner;
Fig. 4 shows the link of second half cured layer without groove and those sub-components;
Fig. 5 shows after being linked by the parts of Fig. 4, the sectional view of acquired assembly;
After Fig. 6 shows and produce conductive path on these two outer surface, the sectional view of assembly as described in Figure 5;
Fig. 7 to show inside and outside those completed printed circuit board with the connection between conductive path;
Fig. 8 shows the simplified schematic diagram of the variant of printed circuit board as described in the present invention, and it is with the mid portion of flexibility;
Fig. 9 shows the vertical view of assembly as described in Figure 8;
Figure 10 shows the sectional view of the another embodiment of printed circuit board as described in the present invention, and it belongs to the assembly of three layers with part; And
Figure 11 shows another variant of printed circuit board as described in the present invention.
Embodiment
Hereafter with reference to Fig. 1 a to Figure 10, illustrate according to the method for the production of multilayer printed circuit board of the present invention.
To provide the first conductive foil 1, as the Cu paper tinsels of 18 μm, (a), in an illustrated embodiment, what it was rectangle also also can comprise four alignment marks 2 or hole to Fig. 1 in its corner regions.Those alignment marks 2 are introduced in this Cu paper tinsel in advance, and the screen printing step carried out on this Cu paper tinsel thereafter that is used as aliging.Then, the alignment mark 2 that those can be used same in time after a while, such as, be used as reference in film mechanical step, and guarantee that the structure printed is alignd with " film mechanical structure ".In addition, these alignment marks also can be used for the structure alignment by indivedual Cu paper tinsel and printing.
Then, the side at this first conductive foil 1 is stamped insulating barrier 3, it covers the subregion of this conductive foil 1.This dielectric layer can be made up of the material based on epoxy radicals, and by using those alignment marks 2, inerrably applies with silk screen printing processing mode.The thickness of this dielectric layer is situated between such as between 5 and 40 μm usually.Fig. 1 b and 1c shows this first conductive foil 1 with being applied with insulating barrier 3.
In the next step, this insulating barrier 3 applies conductive path 4, and printing treatment (particularly ink jet printing) is applicable equally with regard to purposes.With the thickness of the conductive path of copper composition usually such as 1 to 20 μm.
To be provided with the first semi-solid preparation layer 5 thereon, the dimension of this first semi-solid preparation layer is corresponding with the dimension of this conductive foil 1, and it comprises groove 6, and in a preferred embodiment, and size and the geometry of its size and geometry and dielectric layer 3 are corresponding.In other words, this groove 6 can be larger, larger degree can be very little, just be enough to can to apply in some manner in a subsequent step this semi-solid preparation layer 5 to this conductive foil 1 so that become with the insulating barrier 3 of those conductive paths 4 and be positioned at this groove 6, and this shows in figure 2d, the figure illustrates will by the first sub-component 7 of printed circuit board produced.
Step now as shown in Fig. 1 a to 2d, produces the second printed circuit board 1 ' in a similar manner.Therefore, this assembly also comprises on this conductive foil 1 ': insulating barrier 3 ' (and optionally comprising alignment mark 2 '); Conductive path 4 ' on this insulating barrier 3 ', wherein its layout can be different from the layout in the conductive path 4 on this first conductive foil 1; And the second semi-solid preparation layer 5 ', it is with the groove 6 ' corresponding with this insulating barrier 3 '.
Although the insulating barrier 3 of this first sub-component 7 is identical with geometry with the dimension of the insulating barrier 3 ' of this second sub-component 7 ', although be noted that this can be favourable from the angle of producing, this is optional absolutely.Equally, all respectively can be provided with on one or two conductive foil 1,1 ' more than one with insulating barrier 3,3 ' and conductive path 4, the 4 ' region of making.
The mode that layer 5,5 ' with those grooves 6,6 ' can be in the dielectric material printed of partially polymerized state (B-stage) provides, and can use as adhesive layer in pressing step thereafter.
Now provide another the 3rd semi-solid preparation layer 8, its dimension is corresponding with the dimension of these two sub-components 7,7 '.These two sub-components 7,7 ' are now brought to a mutual alignment, wherein those conductive paths 4 and 4 ' are now set to toward each other, and the 3rd semi-solid preparation layer 8 is by as shown in Figure 4, between these two sub-components 7,7 '.3rd semi-solid preparation layer 8 is advantageously to form with this two semi-solid preparation layers 5,5 ' identical material.Can use traditional semi-solid preparation material, as based on FR-4, thickness is between 30 and 250 μm or more.
Be subsequently as shown in arrow in the diagram, under applying thrust and heating power, carry out lamination, and optionally carry out under negative pressure (vacuum).In described lamination process, those semi-solid preparation layers 5,8 and 5 ' connect to a uniform in fact cured layer 85, and as shown in Figure 5 obtain this assembly, its drawing reference numeral is now designated as 9.
In step thereafter, Fig. 6 shows its result, and those conductive foils 1,1 ' on outside the assembly 9 being placed in Fig. 5 are structured, for the formation of conductive path 10 and 10 ', wherein can use traditional photoetching process, and remove unwanted region in those conductive foils to etch.
The hole reaching conductive path 4 and 4 ' printed to those through those insulating barriers 3 and 3 ' can be produced, be electrically connected with those conductive paths 10,10 ' be placed on outside this for the conductive path 4,4 ' those are placed on inside this, and filling with conductive material (particularly copper) thereafter, wherein can use the conventional method as copper plating or use electrocondution slurry.Method for drilling holes is also suitable for producing those boring, and only those dielectric insulation layers 3,3 ' must can by selected laser treatment.Also can consider that this is due to when pulse length is short with ultra-short pulse laser (picosecond laser), the material that pulse is removed is less, and can reach very good severity control.Also optionally this some holes is directed across the contact pad of those outer conductive paths 10,10 '.
Fig. 7 shows and is producing those above described holes 11 and the printed circuit board 13 of filling with conductive material for producing plated-through-hole/be connected 12.Printed circuit board 13 shown here is not in assembled state.As everyone knows, the electric/electronic of electronic device or passive (passive) needed for application-specific/active (active) will be disposed on those conductive structures or conductive path 10,10 '.This can't get rid of the application of element that use embedded and the relevant art for " element embedded ".
Term " hole " should briefly comprise the opening relevant with the present invention.Therefore, those dielectric layers 3,3 ' printed can comprise opening after printing, it will be filled in those conductive path 4,4 ' periods of printing, thus reach and those conductive paths 4 are combined on those conductive foils 1,1 ', and also those conductive paths 4 are combined on those conductive paths 10,10 ' after by those conductive foil structurings.The purposes of connection like this, the hole in those insulating barriers 3,3 ' also produces by laser drill or machine drilling, and also by being filled with copper plating.
Obviously, printed circuit board provided by the invention is arranged to three layers or four layers of printed circuit board in some regions, is provided with the region layout like this of the conductive path that those are printed specifically at one or two dielectric insulation layer 3,3 '.
Fig. 8 and 9 shows a variant of printed circuit board 13 as described in the present invention.The starting point of this variant can be assembly 9 as described in Figure 5, wherein by being etched in the such as central region 14 both sides being removed those conductive foils 1,1 ', those insulating barriers 3,3 ' is exposed in this region 14.The remaining part of those conductive foils 1,1 ' can be structured to arrange conductive path, and this does not have display in figs. 8 and 9.The printed circuit board 13 produced in this fashion is elasticity, flexible or flexible in this central region 14, namely entire combination that is rigid and flexible circuit board is manufactured in this way simply, and this flexible layer forms with traditional semi-solid preparation material, but not to be generally used for this object and to be difficult to process the polyimides processed making.Because on the one hand layers of copper is in this region etch removal (it prevents bending in high degree), and another aspect insulating barrier is in this region relatively thin, so this is possible.
If those conductive paths 4,4 ' are disposed in compared with in large regions in the arrangement as described in Fig. 8 and 9, then can realize very useful capacitor, this is owing to passing through to use the 3rd relatively thin semi-solid preparation layer 8, distance between those conductive path/regions 4,4 ' is remained on low-level, and thus the capacitor formed in this way can reach relatively high capacitance.Therefore, such as, buffer condenser can be integrated in this printed circuit board, make to place any external capacitor.In addition, coating and the dielectric medium of this capacitor are all positioned at inside, are subject to further protection.
In a variant of the present invention, the conductive path 4,4 ' and 10,10 ' and make dielectric medium with insulating barrier 3,3 ' and realize capacitor also by correspondingly arranging.This causes mode that can be very thin to arrange those insulating barriers 3,3 ', thin as 10 μm.In this case, if the surface area of capacitor layers (conductive path 10,10 ' and 4,4 ') is 5x5mm, the ε r of those layers 3,3 ' is 4, can reach the capacitance causing 10nF.
As described above, the size of those dielectric insulation layers 3,3 ' must be not necessarily identical with geometry.Wherein those insulating barriers 3,3 ' (as from above or below seen) have four layers of printed circuit board in the region that overlaps each other.Wherein only have the region of an insulating barrier 3 or 3 ' (same as from above or below seen) and have three layers of printed circuit board.This printed circuit board has two-layer in every other region.
On this basis, the present invention also comprises variant as shown in Figure 10, and wherein printed circuit board 15 only comprises an insulating barrier 3 ', and it is with printed circuit board 4 '.Soly to produce as the printed circuit board 15 of three layers is as described in Fig. 1 a to 7 in insulating layer region, but eliminate this insulating barrier 3, those conductive paths 4 printed and this semi-solid preparation layer 5.
Embodiment described in those shows the semi-solid preparation layer 5,5 ' and the purposes of semi-solid preparation layer 8 without groove of band fluted 6,6 '.Those grooves 6,6 ' account for the thickness of the insulating barrier 3,3 ' with those conductive paths 4,4 ', and allow and produce the uniform printed circuit board of thickness, and do not have in insulating barrier 3, the 3 ' region adding those conductive paths 4,4 ' and anyly heave or increase.For a person skilled in the art, obvious the present invention also comprise only use a single semi-solid preparation layer 8 without groove save those semi-solid preparation layers 5,5 ' simultaneously.If this semi-solid preparation layer 8 is thicker and insulating barrier 3,3 ' with those conductive paths 4,4 ' is relatively thin, then above-mentioned increase/heave can not occur or degree only belongs to slight.In some cases, have this increase can be acceptable low degree.
Further it is to be understood that as described herein as produce printed circuit board again can suppress with one or more printed circuit board, multiple layer can standard technique be arranged.
Figure 11 shows another printed circuit board 16 of the present invention, from according to the traditional PCB 17 of prior art, is two-sided PCB in the present case.This printed circuit board 16 use semi-solid preparation layer 18,18 ' on side or on both sides with conductive foil 1 or 1 ' combine, as described above (see Fig. 2 b), this conductive foil is with the dielectric layer 3,3 ' printed, and it is with conductive path 4,4 '.In the upper part of Figure 10, PCB17 combines with paper tinsel 1 and its layer 3 and conductive path 4, and in the low portion of Figure 10, and this conductive foil 1 ' does not then also combine with this printed circuit board 17 together with its layer 3 ' and conductive path 4 and this semi-solid preparation layer.
In the example shown in Figure 11, the both sides of traditional PCB 17 all by with dielectric layer 3,3 ' and the conductive layer 1,1 ' of conductive path 4,4 ' cover, but should be clear that, can only PCB17 side with conductive layer 1,1 ', its dielectric layer 3,3 ' and those conductive paths 4,4 ' cover.Equally in the present case, by conductive foil 1 and/or 1 ' structuring to form conductive path, and the path of being got up by the different conductive layers joint area of this structure can be manufactured.
Claims (18)
1., for the production of the method for the printed circuit board (13,15,16) of tool multilayer subregion in some subregions, it is characterized in that following steps:
At least one conductive foil (1,1 ') a) is provided, and dielectric insulation paper tinsel (3,3 ') is applied at least one subregion of conductive foil;
B) structure of conductive path (4,4 ') is applied to this insulating barrier (3,3 ');
C) another printed circuit plate structure is provided;
D) pass through semi-solid preparation layer (5,85; 18,18 ') be placed in this another printed circuit plate structure and this conductive foil (1,1 '), between insulating barrier (3,3 ') and conductive path (4,4 '), make it link, and
E) will in steps d under thrust and heating power) in the parts lamination that linked.
2. the method for claim 1, is characterized in that following steps:
A ') the first conductive foil (1) is provided, and dielectric insulation layer (3) is applied at least one subregion of this first conductive foil (1);
B ') structure of conductive path (4) is applied to this insulating barrier (3) of this at least one subregion;
C ') the second conductive foil (1 ') is provided;
D ') semi-solid preparation layer (8) is provided, and by step a ') and b ') in this at least one sub-component (7) of producing and at least this second conductive foil (1 ') link, wherein the 3rd semi-solid preparation layer (8) is to provide between those conductive foils (1,1 '), and those conductive foils (1,1 ') are placed in outside;
E ') under thrust with heating power by steps d ') in the structural laminated of assembling become assembly (9);
F ') at least one structuring of two conductive foils (1,1 ') of the outside of assembly (9) will be placed in, to form conductive path (10,10 ');
G ') generation reaches the hole (11) to being placed in inner conductive path (4,4 ') through at least one those insulating barrier (3,3 '), and generation is from being placed in outside conductive path (10,10 ') towards the plated-through-hole (12) being placed in inner conductive path (4,4 ').
3. method as claimed in claim 2, is characterized in that following steps:
A ') the first conductive foil (1) is provided, and dielectric insulation layer (3) is applied at least one subregion of the first conductive foil (1);
B ') structure of conductive path (4) is applied to this insulating barrier (3) of this at least one subregion;
Ba ') cover this first conductive foil (1) with semi-solid preparation layer (5), the dimension of this semi-solid preparation layer is in fact to should the dimension of the first conductive foil;
C ') the second conductive foil (1 ') is provided, and
Ca ') dielectric insulation layer (3 ') is applied at least one subregion of this second conductive foil (1 ');
Cb ') structure of conductive path (4 ') is applied to this insulating barrier (3 ') of this at least one subregion;
Cc ') cover this second conductive foil (1 ') with the second semi-solid preparation layer (5 '), the dimension of this second semi-solid preparation layer is in fact to should the dimension of the second conductive foil;
Da ') the 3rd semi-solid preparation layer (8) is provided and by step a ') to c ') and in produce the first sub-component (7) and steps d ') to f ') in produce the second sub-component (7 ') connect to single sub-component, wherein the 3rd semi-solid preparation layer (8) be to provide the conductive path (4,4 ') of two sub-components (7,7 ') between those sub-components position is toward each other;
Ea ') under thrust and heating power, the first sub-component and the 3rd semi-solid preparation layer and the second subcomponent layers are pressed into assembly (9);
F ') at least one structuring of two conductive foils (1,1 ') of the outside of assembly (9) will be placed in, to form conductive path (10,10 ');
G ') generation reaches the hole (11) to being placed in inner conductive path (4,4 ') through at least one those insulating barrier (3,3 '), and generation is from being placed in outside conductive path (10,10 ') towards the plated-through-hole (12) being placed in inner conductive path (4,4 ').
4. as claimed in claim 2 or claim 3 method, is characterized in that in step b ') after following steps:
Ba ') at least one of those conductive foils (1,1 ') is covered with semi-solid preparation layer (5,5 '), the dimension of this semi-solid preparation layer is in fact to should the dimension of the first conductive foil.
5. method as claimed in claim 4, is characterized in that this semi-solid preparation layer (5,5 ') comprises groove (6,6 '), and size and the geometry of its size and geometry and dielectric layer (3,3 ') are corresponding.
6. as claim 1 to 5 arbitrary as described in method, it is characterized in that forming alignment mark (2,2 ') in the first and second conductive foils (1,1 ').
7. as claim 1 to 6 arbitrary as described in method, it is characterized in that those insulating barriers (3,3 ') apply by using silk screen printing processing mode.
8. as claim 1 to 7 arbitrary as described in method, it is characterized in that those conductive paths (4,4 ') are applied by printing treatment mode.
9. as claim 1 to 8 arbitrary as described in method, it is characterized in that by use electrocondution slurry produce plated-through-hole (12).
10. as claim 1 to 9 arbitrary as described in method, it is characterized in that producing this some holes (11) by laser drill.
11. printed circuit boards (13,15,16), they are tool multilayer subregion in some subregions, it is characterized in that being provided with at least one is placed in outside conductive foil (1,1 '), dielectric insulation layer (3,3 ') is arranged at least one subregion gone up within it, dielectric insulation layer inner surface comprises conductive path (4,4 '), and with this at least one conductive foil of insulating barrier and conductive path via semi-solid preparation layer (5,85) with another printed circuit board anatomical connectivity.
12. printed circuit boards (13 as claimed in claim 11, 15), it is characterized in that being provided with first and second is placed in outside conductive foil (1, 1 '), dielectric insulation layer (3, 3 ') be disposed at least one subregion on the inner side of at least one conductive foil, this at least one dielectric insulation layer (3, 3 ') conductive path (4 is comprised on the surface within it, 4 '), its via at least one plated-through-hole (12) with adjacent conductive foil (1, 1 ') connect, and be placed in outside conductive foil (1 at those, 1 ') the remaining space between is filled with semi-solid preparation layer (85).
13. printed circuit boards (13,15) as described in claim 11 or 12, is characterized in that the outer surface of this at least one conductive foil (1,1 ') is structured.
14. as claim 11 to 13 arbitrary as described in printed circuit board (15), it is characterized in that its central region (14) configures thinner, this is that two are placed in outside conductive foils (1,1 ') and are partially removed.
15. as claim 11 to 14 arbitrary as described in printed circuit board (15), it is characterized in that those conductive paths (4,4 ') are arranged to capacitor together with semi-solid preparation layer (85) region be placed between described path.
16. as claim 11 to 15 arbitrary as described in printed circuit board (15), it is characterized in that those insulating barriers (3,3 ') are printed on those conductive foils (1,1 ').
17. as claim 11 to 16 arbitrary as described in printed circuit board (15,16), it is characterized in that those conductive paths (4,4 ') are printed on those insulating barriers (3,3 ').
18. printed circuit boards as claimed in claim 11, is characterized in that this another printed circuit plate structure is traditional printed circuit board (17).
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/AT2014/050052 WO2014134650A2 (en) | 2013-03-05 | 2014-03-05 | The invention relates to a method for producing a printed circuit board with multilayer sub-areas in sections |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105379429A true CN105379429A (en) | 2016-03-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480012789.0A Pending CN105379429A (en) | 2014-03-05 | 2014-03-05 | The invention relates to a method for producing a printed circuit board with multilayer sub-areas in sections |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105379429A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107613642A (en) * | 2017-08-31 | 2018-01-19 | 江苏普诺威电子股份有限公司 | The preparation method of the burying capacitance circuit board containing step trough |
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| US20070147014A1 (en) * | 2005-12-22 | 2007-06-28 | Phoenix Precision Technology Corporation | Circuit Board Structure Having Capacitor Array and Embedded Electronic Component and Method for Fabricating the Same |
| WO2011003123A1 (en) * | 2009-07-10 | 2011-01-13 | At & S Austria Technologie & Systemtechnik Aktiengesellschaft | Method for producing a printed circuit board consisting of at least two printed circuit board regions, and printed circuit board |
| CN203151864U (en) * | 2013-03-05 | 2013-08-21 | 奥特斯(中国)有限公司 | Printed circuit board |
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2014
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070147014A1 (en) * | 2005-12-22 | 2007-06-28 | Phoenix Precision Technology Corporation | Circuit Board Structure Having Capacitor Array and Embedded Electronic Component and Method for Fabricating the Same |
| WO2011003123A1 (en) * | 2009-07-10 | 2011-01-13 | At & S Austria Technologie & Systemtechnik Aktiengesellschaft | Method for producing a printed circuit board consisting of at least two printed circuit board regions, and printed circuit board |
| CN203151864U (en) * | 2013-03-05 | 2013-08-21 | 奥特斯(中国)有限公司 | Printed circuit board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107613642A (en) * | 2017-08-31 | 2018-01-19 | 江苏普诺威电子股份有限公司 | The preparation method of the burying capacitance circuit board containing step trough |
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