CN101738542A - Anti-interference capacitance detection device and method - Google Patents
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Abstract
Description
技术领域technical field
本发明涉及一种电容检测装置及方法,特别是一种抗干扰的电容检测装置及方法。The invention relates to a capacitance detection device and method, in particular to an anti-interference capacitance detection device and method.
现有技术current technology
电容式触控技术是通过检测人体接触电子界面所产生的电容变化来判断使用者的操作,其应用范围包括触控面板、触控开关、薄膜开关等。因此,对电容式触控技术而言,准确地检测电容的变化是关键技术之一。The capacitive touch technology judges the user's operation by detecting the capacitance change generated by the human body touching the electronic interface. Its application range includes touch panels, touch switches, and membrane switches. Therefore, for capacitive touch technology, accurately detecting changes in capacitance is one of the key technologies.
除了人体接触电子界面所产生的电容变化外,环境中的电磁干扰也可能使触控装置的电容产生不同程度的变化。举例来说,参照图1,在没有电磁干扰的情况下,设定触控装置中的电容经充电预定时间T之后,电压会从参考低电压Vref-L上升至参考高电压Vref-H。如果电磁干扰产生电荷增加的影响,如图1的长虚线所示,触控装置中的电容经充电预定时间T之后,电压为参考高电压Vref-H加上电磁干扰所产生的电压差ΔV。反之,如果电磁干扰产生电荷减少的影响,如图1的短虚线所示,触控装置中的电容经充电预定时间T之后,电压则为参考高电压Vref-H减去电磁干扰所产生的电压差ΔV。In addition to the capacitance change caused by the human body touching the electronic interface, the electromagnetic interference in the environment may also cause the capacitance of the touch device to change to varying degrees. For example, referring to FIG. 1 , in the absence of electromagnetic interference, after the capacitor in the touch device is charged for a predetermined time T, the voltage will rise from the reference low voltage V ref-L to the reference high voltage V ref-H . If the electromagnetic interference produces the effect of charge increase, as shown by the long dotted line in Figure 1, after the capacitor in the touch device is charged for a predetermined time T, the voltage is the reference high voltage V ref-H plus the voltage difference ΔV generated by the electromagnetic interference . Conversely, if electromagnetic interference produces the effect of charge reduction, as shown by the short dashed line in Figure 1, after the capacitor in the touch device is charged for a predetermined time T, the voltage will be the reference high voltage V ref-H minus the electromagnetic interference The voltage difference ΔV.
如前所述,在没有人体接触的情况下,触控装置可能因电磁场或其它因素的干扰产生电压偏移而发生误响应。如图1所示,为了避免误响应的发生,现有的解决方法是设定上限电压VUL和下限电压VDL,当电容充电后的电压在上限电压VUL和下限电压VDL之间,即加以忽略而不处理。然而,上述解决方案仅是设定允许干扰的范围,并无法排除干扰的影响,并且实现上述解决方案的设计较为复杂。As mentioned above, in the absence of human body contact, the touch device may generate a voltage offset due to the interference of the electromagnetic field or other factors, resulting in a false response. As shown in Figure 1, in order to avoid the occurrence of false responses, the existing solution is to set the upper limit voltage V UL and the lower limit voltage V DL , when the charged capacitor voltage is between the upper limit voltage V UL and the lower limit voltage V DL , That is, it is ignored and not processed. However, the above solution only sets the range of allowable interference, and cannot eliminate the influence of interference, and the design to realize the above solution is relatively complicated.
综上所述,如何避免环境中的或电子装置本身的电磁等干扰,并且能够以简便的方法准确地检测出电容的变化,是目前极需努力的目标。To sum up, how to avoid the electromagnetic interference in the environment or the electronic device itself, and how to accurately detect the change of capacitance with a simple method is a goal that requires great efforts.
发明内容Contents of the invention
针对上述问题,本发明目的之一为提供一种抗干扰的电容检测装置及方法,其是对两个相同电容值的电容同时进行充电和放电,并将分别测量的上述两个电容的测量值相加,以抵消电磁等干扰对上述两个电容的影响。In view of the problems referred to above, one of the objects of the present invention is to provide a kind of anti-interference capacitance detection device and method, which is to charge and discharge two capacitances with the same capacitance value simultaneously, and measure the measured values of the above two capacitances respectively. Added to offset the impact of electromagnetic and other interference on the above two capacitors.
为了达到上述目的,本发明实施例的抗干扰的电容检测装置包括第一电容、第一充/放电电路、第二电容、第二充/放电电路以及检测电路。第二电容的电容值与第一电容的电容值相等。第一充/放电电路电性连接于第一电容,用来对第一电容进行充电/放电。第二充/放电电路电性连接于第二电容,用来对第二电容进行充电/放电,其中,在同一时间周期,第一电容与第二电容进行相反的充电/放电操作。检测电路则与第一电容以及第二电容电性连接,用来分别测量第一电容和第二电容以得到测量值,并累加该测量值。In order to achieve the above purpose, the anti-interference capacitance detection device according to the embodiment of the present invention includes a first capacitor, a first charging/discharging circuit, a second capacitor, a second charging/discharging circuit and a detection circuit. The capacitance value of the second capacitor is equal to the capacitance value of the first capacitor. The first charging/discharging circuit is electrically connected to the first capacitor for charging/discharging the first capacitor. The second charging/discharging circuit is electrically connected to the second capacitor for charging/discharging the second capacitor, wherein, in the same time period, the first capacitor and the second capacitor perform opposite charging/discharging operations. The detection circuit is electrically connected with the first capacitor and the second capacitor, and is used to measure the first capacitor and the second capacitor respectively to obtain measured values, and accumulate the measured values.
为了达到上述目的,本发明另一实施例的抗干扰的电容检测方法包括:在同一时间周期,对第一电容和第二电容分别进行相反的充电/放电操作;分别测量第一电容和第二电容以得到测量值;以及累加第一电容和第二电容的测量值。In order to achieve the above object, the anti-interference capacitance detection method according to another embodiment of the present invention includes: performing opposite charging/discharging operations on the first capacitance and the second capacitance respectively in the same time period; measuring the first capacitance and the second capacitance respectively capacitance to obtain a measured value; and accumulating the measured values of the first capacitance and the second capacitance.
以下通过具体实施例结合附图详加说明,可以更容易了解本发明的目的、技术内容、特点及其所达到的功效。The purpose, technical content, characteristics and effects of the present invention can be more easily understood through specific embodiments described in detail in conjunction with the accompanying drawings.
附图说明Description of drawings
图1为显示干扰对电容检测的影响的示意图。FIG. 1 is a schematic diagram showing the influence of interference on capacitance detection.
图2为本发明优选实施例的抗干扰的电容检测装置的方框图。Fig. 2 is a block diagram of an anti-interference capacitance detection device according to a preferred embodiment of the present invention.
图3a和图3b为显示本发明优选实施例中的电容在充/放电过程的电势变化的示意图。3a and 3b are schematic diagrams showing the potential change of the capacitor in the charge/discharge process in the preferred embodiment of the present invention.
图4a和图4b为显示本发明另一优选实施例中的电容在充/放电过程的电势变化的示意图。FIG. 4a and FIG. 4b are schematic diagrams showing the potential change of the capacitor in the charging/discharging process in another preferred embodiment of the present invention.
主要组件符号说明Explanation of main component symbols
具体实施方式Detailed ways
参照图2,本发明的优选实施例的抗干扰的电容检测装置1包括:第一电容C1、第一充/放电电路11、第二电容C2、第二充/放电电路12以及检测电路13。第一充/放电电路11与第一电容C1电性连接,其用来对第一电容C1进行充电以及放电。第二充/放电电路12与第二电容C2电性连接,其用来对第二电容C2进行充电以及放电。其中,第一电容C1与第二电容C2具有相同的电容值,并且第一电容C1与第二电容C2在同一时间周期,分别进行相反的充电/放电操作。举例来说,在一时间周期中,第一电容C1进行充电,而第二电容C2进行放电。进入下一个时间周期时,第一电容C1即进行放电,而第二电容C2则进行充电,如此反复循环。Referring to FIG. 2 , the anti-interference
承上所述,检测电路13与第一电容C1以及第二电容C2电性连接,用来分别测量第一电容C1和第二电容C2的变化以得到测量值。检测电路13累加测量值输出,以供后续控制器等电子组件应用。As mentioned above, the
参照图3a以及图3b,在实施例中,前述的测量值可为经一时间周期分别测量第一电容C1以及第二电容C2所得到的电压。假设在没有电磁等干扰的情况下,在时间周期T的充电过程中,第一电容C1从参考低电压Vref-L上升至参考高电压Vref-H,电势差为(Vref-H-Vref-L),如图3a中的实线所示。反之,在同一时间周期T的放电,第二电容C2则从参考高电压Vref-H下降至参考低电压Vref-L,电势差也为(Vref-H-Vref-L),如图3b中的实线所示。Referring to FIG. 3 a and FIG. 3 b , in an embodiment, the aforementioned measured values may be voltages obtained by measuring the first capacitor C1 and the second capacitor C2 respectively over a period of time. Assuming that there is no electromagnetic interference, during the charging process of the time period T, the first capacitor C1 rises from the reference low voltage V ref-L to the reference high voltage V ref-H , and the potential difference is (V ref-H -V ref-L ), as shown by the solid line in Fig. 3a. Conversely, during the discharge of the same time period T, the second capacitor C2 drops from the reference high voltage V ref-H to the reference low voltage V ref-L , and the potential difference is also (V ref-H -V ref-L ), as shown in the figure Shown by the solid line in 3b.
在因为干扰而形成电荷增加的情况下,经时间周期T的充电,第一电容C1则从参考低电压Vref-L上升至参考高电压Vref-H加上电磁干扰所产生的电压差ΔV,电势差为(Vref-H-Vref-L+ΔV),如图3a中的长虚线所示。在同一时间周期T的放电过程中,第二电容C2则从参考高电压Vref-H下降至参考低电压Vref-L加上电磁干扰所产生的电压差ΔV,电势差则为(Vref-H-Vref-L-ΔV)。因此,将第一电容C1与第二电容C2测得的测量值相加即可得到未受干扰的默认值,即电势差为2(Vref-H-Vref-L)。In the case of charge increase due to interference, the first capacitor C1 rises from the reference low voltage V ref-L to the reference high voltage V ref-H plus the voltage difference ΔV generated by the electromagnetic interference after charging for a time period T , the potential difference is (V ref−H −V ref−L +ΔV), as shown by the long dashed line in Fig. 3a. During the discharge process of the same time period T, the second capacitor C2 drops from the reference high voltage V ref-H to the reference low voltage V ref-L plus the voltage difference ΔV generated by the electromagnetic interference, and the potential difference is (V ref- H -V ref-L -ΔV). Therefore, the undisturbed default value can be obtained by adding the measured values of the first capacitor C1 and the second capacitor C2 , that is, the potential difference is 2(V ref-H −V ref-L ).
同理,因为干扰而形成电荷减少的情况下,在时间周期T的充电过程中,第一电容C1则从参考低电压Vref-L上升至参考高电压Vref-H减去电磁干扰所产生的电压差ΔV,电势差为(Vref-H-Vref-L-ΔV),如图3a中的短虚线所示。在同一时间周期T的放电过程中,第二电容C2则从参考高电压Vref-H下降至参考低电压Vref-L减去电磁干扰所产生的电压差ΔV,电势差则为(Vref-H-Vref-L+ΔV)。因此,将第一电容C1与第二电容C2测得的测量值相加仍得到未受干扰的默认值,即电势差为2(Vref-H-Vref-L)。Similarly, in the case of a charge reduction due to interference, during the charging process of the time period T, the first capacitor C1 rises from the reference low voltage V ref-L to the reference high voltage V ref-H minus the electromagnetic interference The voltage difference ΔV of , the potential difference is ( Vref-H - Vref-L -ΔV), as shown by the short dashed line in Fig. 3a. During the discharge process of the same time period T, the second capacitor C2 drops from the reference high voltage V ref-H to the reference low voltage V ref-L minus the voltage difference ΔV generated by the electromagnetic interference, and the potential difference is (V ref- H - V ref - L + ΔV). Therefore, adding the measured values of the first capacitance C1 and the second capacitance C2 still results in an undisturbed default value, ie a potential difference of 2(V ref-H −V ref-L ).
请参照图4a以及图4b,在另一实施例中,前述的测量值可测量第一电容C1和第二电容C2充电及放电至预定电压所需的时间。在没有电磁等干扰的情况下,第一电容C1从参考低电压Vref-L充电使电压上升至参考高电压Vref-H所需的时间为T,如图4a中的实线所示。反之,第二电容C2则从参考高电压Vref-H放电使电压下降至参考低电压Vref-L所需的时间也为T,如图4b中的实线所示。将第一电容C1的测量值与第二电容C2的测量值相加即得到2T。Please refer to FIG. 4 a and FIG. 4 b , in another embodiment, the aforementioned measured value may measure the time required for the first capacitor C1 and the second capacitor C2 to charge and discharge to a predetermined voltage. In the absence of electromagnetic interference, the time required for the first capacitor C1 to charge from the reference low voltage V ref-L to increase the voltage to the reference high voltage V ref-H is T, as shown by the solid line in FIG. 4 a . Conversely, the time required for the second capacitor C2 to discharge from the reference high voltage V ref-H to drop the voltage to the reference low voltage V ref-L is also T, as shown by the solid line in FIG. 4 b . 2T is obtained by adding the measured value of the first capacitor C1 to the measured value of the second capacitor C2.
在因为干扰而形成电荷增加的情况下,第一电容C1从参考低电压Vref-L充电使电压上升至参考高电压Vref-H所需的时间即缩短为(T-ΔT),如图4a中的长虚线所示。反之,第二电容C2从参考高电压Vref-H放电使电压下降至参考低电压Vref-L所需的时间则增加为(T+ΔT),如图4b中的长虚线所示。将第一电容C1的测量值与第二电容C2的测量值相加也得到2T。In the case of an increase in charge due to interference, the time required for the first capacitor C1 to charge from the reference low voltage V ref-L to raise the voltage to the reference high voltage V ref-H is shortened to (T-ΔT), as shown in the figure Shown by the long dashed line in 4a. Conversely, the time required for the second capacitor C2 to discharge from the reference high voltage V ref-H to drop the voltage to the reference low voltage V ref-L increases as (T+ΔT), as shown by the long dashed line in FIG. 4b. Adding the measured value of the first capacitance C1 to the measured value of the second capacitance C2 also yields 2T.
在因为干扰而形成电荷减少的情况下,第一电容C1从参考低电压Vref-L充电使电压上升至参考高电压Vref-H所需的时间即增长为(T+ΔT),如图4a中的短虚线所示。反之,第二电容C2从参考高电压Vref-H放电使电压下降至参考低电压Vref-L所需的时间即缩短为(T-ΔT),如图4b中的短虚线所示。将第一电容C1的测量值与第二电容C2的测量值相加仍得到2T。In the case of charge reduction due to interference, the time required for the first capacitor C1 to charge from the reference low voltage V ref-L to increase the voltage to the reference high voltage V ref-H is (T+ΔT), as shown in the figure Shown by the short dashed line in 4a. Conversely, the time required for the second capacitor C2 to discharge from the reference high voltage V ref-H to drop the voltage to the reference low voltage V ref-L is shortened to (T-ΔT), as shown by the short dashed line in FIG. 4b. Adding the measured value of the first capacitance C1 to the measured value of the second capacitance C2 still yields 2T.
由前述可知,由于干扰同时影响第一电容C1和第二电容C2,因此,本发明的电容检测装置1可排除干扰所产生的影响,使测量值维持在一定值。在实施例中,本发明的电容检测装置1可应用于触控面板、触控开关、薄膜开关或以上的组合的触控电子装置。It can be known from the foregoing that, since the disturbance affects both the first capacitor C1 and the second capacitor C2, the
本发明还公开了一种抗干扰的电容检测方法,其步骤包括:在同一时间周期内,对第一电容C1和第二电容C2分别进行相反的充电/放电操作;分别测量第一电容C1和第二电容C2以得到测量值;并且累加第一电容C1和第二电容C2的测量值,以供后续控制器等电子组件应用。优选地,重复上述步骤即可实时检测电容的变化。The invention also discloses an anti-interference capacitance detection method, the steps of which include: performing opposite charging/discharging operations on the first capacitance C1 and the second capacitance C2 in the same time period; measuring the first capacitance C1 and the second capacitance C2 respectively; The second capacitor C2 is used to obtain a measured value; and the measured values of the first capacitor C1 and the second capacitor C2 are accumulated to be used by electronic components such as a subsequent controller. Preferably, the change of capacitance can be detected in real time by repeating the above steps.
综合上述,本发明的抗干扰的电容检测装置及方法,其是对两个相同电容值的电容同时进行充电以及放电。由于电磁等干扰同时影响上述两个电容,因此将分别测量自上述两个电容的测量值相加,即可抵消电磁等干扰对上述两个电容的影响。To sum up the above, the anti-interference capacitance detection device and method of the present invention charge and discharge two capacitors with the same capacitance value at the same time. Since the electromagnetic interference affects the above two capacitors at the same time, adding the measured values from the above two capacitors can cancel the influence of the electromagnetic interference on the above two capacitors.
以上所述的实施例仅是为说明本发明的技术思想及特点,其目的在使本领域技术人员能够了解本发明的内容并据以实施,但不能以此限定本发明,即凡是依据本发明所公开的精神所作的等效变化或修饰,仍应涵盖在本发明的范围内。The above-described embodiments are only for illustrating the technical ideas and characteristics of the present invention, and its purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly, but the present invention cannot be limited thereto, that is, anyone who is based on the present invention Equivalent changes or modifications made by the disclosed spirit should still fall within the scope of the present invention.
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| WO2012045233A1 (en) * | 2010-10-08 | 2012-04-12 | 矽创电子股份有限公司 | Capacitive sensing circuit having anti-electromagnetic interference capability |
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| WO2012045233A1 (en) * | 2010-10-08 | 2012-04-12 | 矽创电子股份有限公司 | Capacitive sensing circuit having anti-electromagnetic interference capability |
| CN107107939A (en) * | 2014-11-07 | 2017-08-29 | Trw汽车安全系统有限公司 | Device and method for detecting steering wheel contact |
| CN110673000A (en) * | 2019-10-28 | 2020-01-10 | 国网江苏省电力有限公司电力科学研究院 | Online monitoring method and device for partial discharge of oil-immersed current transformer |
| CN110673000B (en) * | 2019-10-28 | 2021-11-30 | 国网江苏省电力有限公司电力科学研究院 | Online monitoring method and device for partial discharge of oil-immersed current transformer |
| CN116626398A (en) * | 2023-04-11 | 2023-08-22 | 浙江大学杭州国际科创中心 | Capacitive screen anti-interference detection method, device, computer equipment and storage medium |
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