CN101382715A - Pixel structure, display panel and manufacturing method of photoelectric device - Google Patents

Abstract

The invention provides a pixel structure, a display panel and a manufacturing method of an optoelectronic device. The manufacturing method of the pixel structure comprises the following steps: first, a substrate on which a switching element and a storage capacitor are formed is provided. A protective layer is formed on the substrate. A patterned organic material layer is formed on the passivation layer, wherein a plurality of protrusion patterns are formed on a portion of the patterned organic material layer and have a plurality of first openings to expose a portion of the passivation layer. And forming a reflecting layer on the patterned organic material layer and the exposed part of the protective layer. A first patterned photoresist layer is formed on the partially reflective layer, and the first patterned photoresist layer has a plurality of second openings to expose the partially reflective layer. And using the first patterned photoresist layer as an etching photomask to form a first contact window and a second contact window. The first patterned photoresist layer is removed. And forming a pixel electrode on the patterned organic material layer.

Description

Pixel structure, display panel, method for manufacturing optoelectronic device

technical field

The present invention relates to a manufacturing method of a pixel structure, a display panel, and an optoelectronic device, and in particular to a manufacturing method of a transflective or reflective pixel structure and a pixel having the above-mentioned The display panel of the structure and the manufacturing method of the optoelectronic device.

Background technique

Generally, thin film transistor liquid crystal displays can be classified into three types: transmissive, reflective, and transflective. The classification is based on the utilization of light source and the design of the array substrate (array). Generally speaking, a transmissive TFT-LCD mainly uses a backlight as a light source, and the pixel electrodes on the thin film transistor array substrate are transparent electrodes to facilitate the light emitted by the backlight. penetrate. The reflective TFT-LCD mainly uses front-light or external light as the light source, and the pixel electrodes on the thin-film transistor array substrate are metal or other reflective electrodes with good reflective properties, which are suitable for Used to reflect the front light source or external light source. In addition, the transflective TFT-LCD can be regarded as an integrated structure of the transmissive TFT-LCD and the reflective TFT-LCD, which can simultaneously use the backlight and front light or external light for display.

A known method for manufacturing a pixel structure of a reflective or transflective liquid crystal display includes the following steps. First, a thin film transistor is formed on a substrate. Next, a protection layer is formed on the substrate to cover the thin film transistor. After that, a first patterned photoresist layer with an opening is formed on the protective layer, and the opening exposes the protective layer above the drain of the thin film transistor, and then, the exposed protective layer is etched to form a contact window to expose the drain of the TFT, and remove the first patterned photoresist layer. Next, a patterned organic material layer is formed on the protection layer, a plurality of raised patterns are formed on the surface of the patterned organic material layer and an opening is formed in the patterned organic material layer, which exposes the contact window in the protection layer. Next, a reflective layer is deposited on the patterned organic material layer. Then, forming a second patterned photoresist layer with an opening on the reflective layer to expose the reflective layer above the drain of the thin film transistor, and then removing the exposed reflective layer by etching, to expose the drain of the TFT, and remove the second patterned photoresist layer. Finally, a pixel electrode is formed on the reflective layer, and the pixel electrode is electrically connected with the drain of the thin film transistor through the opening in the organic material layer and the contact window in the protective layer.

The manufacturing procedure of the above pixel structure is to firstly pattern the protective layer, so that the drain of the thin film transistor is exposed. Afterwards, after the reflective layer is formed, the reflective layer is patterned. Therefore, in this way, a photolithography process needs to be performed on the protective layer and the reflective layer respectively, that is, a secondary patterned photoresist layer is formed.

In addition, in the manufacturing process of the above pixel structure, the protective layer is firstly patterned, so that the drain of the thin film transistor is exposed. Therefore, when the reflective layer is subsequently etched, it must be considered that the etching process cannot cause damage to the exposed drain. For this reason, the current metal layer material in the pixel structure uses titanium as the upper metal layer. However, if titanium is used as the metal layer material of the pixel structure, it needs to be patterned by dry etching, and the dry etching process will greatly reduce the yield of the pixel structure.

Contents of the invention

The invention provides a method for manufacturing a pixel structure, which can shorten the process time and increase the production capacity.

The present invention provides a method for manufacturing a display panel to manufacture a display panel with the above-mentioned pixel structure.

The invention provides a method for manufacturing an optoelectronic device to manufacture the optoelectronic device with the above-mentioned pixel structure.

The invention provides a method for manufacturing a pixel structure. First, a substrate is provided. A switching element and a storage capacitor have been formed on the substrate. A protective layer is formed on the substrate. The protective layer covers the switching element and the storage capacitor. A patterned organic material layer is formed on the protective layer, wherein a plurality of raised patterns are formed on part of the patterned organic material layer and the patterned organic material layer has a plurality of first openings. The first openings respectively expose the protection layer over the source/drain and the protection layer over the upper electrode of the storage capacitor. A reflective layer is formed on the patterned organic material layer and the exposed part of the protection layer. A first patterned photoresist layer is formed on the partial reflection layer, and the first patterned photoresist layer has a plurality of second openings. The second openings expose part of the reflective layer, and each second opening substantially corresponds to each first opening. Using the first patterned photoresist layer as an etching photomask to remove the exposed part of the reflective layer and the part of the protective layer under the exposed part of the reflective layer, so as to form a source exposing the switching element A first contact window for the electrode/drain and a second contact window exposing the upper electrode of the storage capacitor. The first patterned photoresist layer is removed. A pixel electrode is formed on the patterned organic material layer, and the pixel electrode is electrically connected to the source/drain of the switch element through the first contact window and the second contact window is electrically connected to the upper electrode of the storage capacitor.

In an embodiment of the present invention, the above-mentioned removal of the exposed reflective layer and the protective layer under the exposed part of the reflective layer is performed by an in-situ process.

In an embodiment of the present invention, an exposure process is performed on an organic material layer by using a grayscale mask on the patterned organic material layer.

In an embodiment of the present invention, in the above-mentioned method for forming the switch element and the storage capacitor, firstly, a first metal layer is formed on the substrate, wherein the first metal layer includes a gate and a bottom electrode. Next, an insulating layer is formed on the first metal layer. An active layer is formed on the insulating layer above the gate. Finally, a second metal layer is formed on the insulating layer, wherein the second metal layer includes a source electrode and a drain electrode located above part of the active layer and an upper electrode located above the lower electrode.

In an embodiment of the present invention, in the above-mentioned method for forming the switch element and the storage capacitor, firstly, a first metal layer is formed on the substrate, wherein the first metal layer includes a gate and a bottom electrode. Next, an insulating layer, a semiconductor layer and a second metal layer are sequentially formed on the first metal layer. A second patterned photoresist layer is formed on the second metal layer, wherein the second patterned photoresist layer has a first portion and a second portion. The first part covers the top of the grid, and the second part covers the second metal layer above both sides of the grid and the second metal layer above the lower electrode. The second patterned photoresist layer is used as a photomask to pattern the second metal layer and the semiconductor layer to define an active layer above the grid and define an upper electrode above the lower electrode. An ashing process is performed on the second patterned photoresist layer to remove the first portion. Finally, the second part of the second patterned photoresist layer is used as a photomask to remove the second metal layer above the active layer to define the source and drain.

In an embodiment of the present invention, the above-mentioned second patterned photoresist layer is formed by exposing a photoresist layer with a grayscale mask.

The present invention proposes a method for manufacturing a display panel, including the method for manufacturing a pixel structure as described above.

The present invention provides a method for manufacturing an optoelectronic device, including the method for manufacturing a display panel as described above.

In summary, since the present invention utilizes a single or the same patterned photoresist layer as an etching photomask to sequentially remove the exposed partial reflective layer and the exposed partial reflective layer Compared with the manufacturing method of the pixel structure of the known reflective liquid crystal display, the manufacturing method of the pixel structure of the present invention can reduce at least one photolithography process to shorten the process time and increase the production capacity, and at the same time The second metal layer can also be protected by a protective layer to avoid being corroded by etching solution.

Description of drawings

1A to 1L are schematic cross-sectional views of a method for manufacturing a pixel structure according to an embodiment of the present invention.

2A to 2N are schematic cross-sectional views of a method for manufacturing a pixel structure according to another embodiment of the present invention.

FIG. 3 is a schematic diagram of a display panel according to an embodiment of the present invention.

FIG. 4 is a schematic diagram of an optoelectronic device according to an embodiment of the present invention.

Figure number:

100, 200: pixel structure

100a, 200a: substrate

110a, 210a: switching elements

110b, 210b: storage capacitors

112, 212: first metal layer

112a, 212a: grid

112b, 212b: lower electrodes

112c, 212c: Welding pads

114, 214: insulating layer

116, 216': active layer

118, 218: second metal layer

118a, 218a: source

118b, 218b: drain

118c, 218c: upper electrode

118d, 218d: conductive pattern

120, 220: protective layer

130, 230: patterning organic material layer

132a, 132b, 132c, 232a, 232b, 232c: openings

134, 234: raised pattern

140, 240: reflective layer

150, 250: the first patterned photoresist layer

152a, 152b, 252a, 252b: openings

160, 260: pixel electrode

160a: guard electrode

216: Semiconductor layer

216a: channel material layer

216b: Ohmic contact layer

219: second patterned photoresist layer

219a: Part I

219b, 219b': Part II

300: display panel

310: Pixel array substrate

320: another substrate

320a: transparent electrode

330: display media

400: Photoelectric device

410: Electronic components

C1, C1': first contact window

C2, C2': second contact window

P1, P1': pixel area

P2, P2': pad area

Detailed ways

In order to make the above and other objects, features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

1A to 1L are schematic cross-sectional views of a method for manufacturing a pixel structure according to an embodiment of the present invention. Please refer to FIG. 1A. Firstly, a substrate 100a is provided, wherein the substrate 100a has a pixel area P1 and a pad area P2. Next, a first metal layer 112 is formed on the substrate 100a. The first metal layer 112 includes a gate 112a, a bottom electrode 112b and a pad 112c, wherein the gate 112a and the bottom electrode 112b are located in the pixel area P1 of the substrate 100a, and the pad 112c is located in the pad area P2 of the substrate 100b.

It is worth mentioning that in the drawings of this embodiment, the reflective pixel structure is used as an example for illustration, but the present invention is preferably applied to a transflective pixel structure or a micro-reflective pixel structure middle. In addition, in the drawings of this embodiment, the pad region P2 is illustrated by taking the scanning line pad region as an example. Although the data line pad area is not shown in the figure, the structure of the data line pad area is similar to that of the scan line pad area, the only difference is that the pads in the data line pad area belong to the second metal layer, but The figure shows that the pads 112 c of the scan line pad region P2 belong to the first metal layer 112 . Furthermore, the structure of the pad region P2 is not limited to the structure described in the following manufacturing process. That is to say, regardless of whether the pad area P2 is an example of a scanning line pad area or a data line pad area, its structure only has the first metal layer, the second metal layer, and the above two metal layers exist at the same time, and uses other conductive layer to bridge the two metal layers or the stack of the two metal layers. In other embodiments, the pixel structure can only be described and designed based on the pixel region P1 without considering the design and design of the pad region P2.

In addition, in this embodiment, the material of the substrate 110a includes inorganic transparent materials (such as: glass, quartz, or other suitable materials, or a combination of the above), organic transparent materials (such as: polyolefins, polyvinyls, polyesters, etc.). Alcohols, polyesters, rubber, thermoplastic polymers, thermosetting polymers, polyaromatic hydrocarbons, polymethylmethacrylates, polycarbonates, or other suitable materials, or derivatives of the above, or the above Combination), inorganic opaque material (such as: silicon wafer, ceramics, or other suitable materials, or a combination of the above), or a combination of the above.

In addition, the material of the first metal layer 112 formed on the substrate 100a is preferably a metal material capable of wet etching, but is not limited thereto. In other embodiments, dry etching can also be used. metal material. The first metal layer 112 can be a single-layer structure or a multi-layer structure. In this embodiment, the first metal layer 112 is an example of a multi-layer structure, such as molybdenum or molybdenum-aluminum lamination or molybdenum-aluminum- Molybdenum laminate. However, the present invention is not limited thereto. In other embodiments, the material of the first metal layer 112 can be made of gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, zinc and other metals, the above-mentioned alloys, the above-mentioned metals, etc. Oxides, the aforementioned metal nitrides, or combinations of the aforementioned.

Next, please refer to FIG. 1B , an insulating layer 114 is formed on the first metal layer 112 , covering the gate 112 a of the pixel region P1 , the bottom electrode 112 b and the bonding pad 112 c of the bonding pad region P2 . In this embodiment, the insulating layer 114 can be a single-layer or multi-layer structure, and its material is, for example, an inorganic material (such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, hafnium oxide, aluminum oxide, or other material, or a combination of the above), organic materials (such as: photoresist, benzocyclobutane (enzocyclobutane, BCB), cycloalkenes, polyimides, polyamides, polyesters, polyalcohols, polyethylene oxides, polyphenylenes, resins, polyethers, polyketones, or other suitable materials, or a combination of the above), or a combination of the above.

Referring to FIG. 1C, an active layer 116 is formed on the insulating layer 114 above the gate 112a. In detail, in this embodiment, the material of the active layer 116 can be amorphous silicon, single crystal silicon, microcrystalline silicon, polycrystalline silicon, or the N-type doped silicide of the above-mentioned crystal lattice, or the P-type doped silicide of the above-mentioned crystal lattice. Heterosilicide, or germanium silicide of the above crystal lattice, or other materials, or a combination of the above, and the structure of the active layer 116 can be a single-layer structure or a multi-layer structure. For example, the active layer 116 may be a single-layer structure composed of amorphous silicon (a-Si) and/or N-type heavily doped amorphous silicon, or may be composed of amorphous silicon (a-Si) and N The double-layer structure composed of heavily doped amorphous silicon can be arranged horizontally and/or vertically. In this embodiment, the active layer 116 is an example of a double-layer structure composed of amorphous silicon (also called a channel layer) and N-type heavily doped amorphous silicon (also called an ohmic contact layer). This is the limit.

Next, please refer to FIG. 1D, a second metal layer 118 is formed on the insulating layer 114, wherein the second metal layer 118 includes a source electrode 118a, a drain electrode 118b, and a lower electrode 112b located on a part of the active layer 116 in the pixel region P1. The upper electrode 118c above and the conductive pattern 118d located in the pad region P2. So far, the fabrication of the switching element 110a and the storage capacitor 110b on the substrate 100a has been substantially completed. It should be noted here that the manufacturing method and structure of the switching element 110 a and the storage capacitor 110 b are examples of the embodiments of the present invention, and are not limited to this method, and other applicable structures or manufacturing methods may also be used. In addition, the material of the second metal layer 118 formed on the insulating layer 114 is preferably a metal material that can be wet-etched, but is not limited thereto, and a metal material that can be dry-etched can also be used. The second metal layer 118 can be a single-layer structure or a multi-layer structure. In this embodiment, the second metal layer 118 is an example of a multi-layer structure, such as molybdenum or molybdenum-aluminum lamination or molybdenum-aluminum- Molybdenum laminate. However, the present invention is not limited thereto. In other embodiments, the material of the second metal layer 118 can be made of gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, zinc and other metals, the above-mentioned alloys, the above-mentioned metals, etc. Oxides, the aforementioned metal nitrides, or combinations of the aforementioned.

In addition, it must be noted that the switching element 110 a and its structure of the present invention take a bottom-gate structure as an example, but not limited thereto. In other embodiments, the top-gate structure can be formed only by changing the order in which the first gold layer 112 and the active layer 116 are formed on the substrate 100a. For example, an active layer 116 is formed on the substrate 100a, and then an insulating layer 114 is formed on the active layer 116, wherein the insulating layer 114 covers the active layer 116 of the pixel region P1. Then, a first metal layer 110a is formed on the substrate 100a, wherein the first metal layer 112 includes a gate 112a, a lower electrode 112b, and a pad 112c in the pad region P2, and the gate 112a is on the insulating layer 114 above the active layer 116 superior. Afterwards, the rest of the steps are similar to the above-mentioned embodiments of the present invention.

In addition, in order to obtain better electrical characteristics, after the first metal layer 112 is completed, an interlayer dielectric layer (not shown) can be covered on the first metal layer 112 and the insulating layer 114, so that the top gate The second metal layer 118 of the type structure is formed on the inner layer dielectric layer (not shown), wherein the second metal layer 118 includes a source electrode 118a, a drain electrode 118b located on the part of the active layer 116 in the pixel region P1, and a bottom electrode 118b. The upper electrode 118c above the electrode 112b and the conductive pattern 118d located in the pad region P2. So far, the fabrication of the switching element 110a and the storage capacitor 110b on the substrate 100a has been substantially completed.

Referring to FIG. 1E , a protection layer 120 is formed on the substrate 100 a, wherein the protection layer 120 covers the switching element 110 a and the storage capacitor 110 b in the pixel region P1 and the conductive pattern 118 d and the insulating layer 114 in the pad region P2 . In this embodiment, the protection layer 120 can be a single-layer or multi-layer structure, and its material is an organic material (for example: photoresist, benzocyclobutene, cycloalkene, polyimide, polyamide , polyesters, polyalcohols, polyethylene oxides, polyphenylenes, resins, polyethers, polyketones, or other materials, or combinations of the above), inorganic materials (such as silicon oxide, nitrogen silicon oxide, silicon oxynitride, other suitable materials, or a combination of the above), or a combination of the above.

Please refer to FIG. 1F, then, a patterned organic material layer 130 is formed on the protection layer 120, wherein a plurality of raised patterns 134 are formed on part of the patterned organic material layer 130, and the patterned organic material layer 130 has a plurality of openings 132a, 132b, 132c. The raised pattern 134 in the embodiment of the present invention is formed on the organic material layer of the pixel region P1, but is not limited thereto. The raised pattern 134 can also be formed on the surface of the protective layer 120, the surface of the insulating layer 114, or other suitable on the film layer. The opening 132a exposes the protective layer 120 on the drain electrode 118b of the pixel region P1, the opening 132b exposes the protective layer 120 above the upper electrode 118c of the pixel region P1, and the opening 132c exposes a part of the metal layer 118d located in the pad region P2. and part of the protective layer 120 above the insulating layer 114 .

In this embodiment, the patterned organic material layer 130 is formed by using a gray-level mask (Grey-Level Mask, not shown), a half-tone mask (Half-Tone Mask), a multi-level mask (Multi-level mask). -Tone Mask) or other suitable masks, an exposure process is performed on an organic material layer (not shown), wherein the grayscale mask uses masks of different shades, so that the organic material layer is exposed to different illuminance After the development process, shapes with different depths can be obtained, that is, the patterned organic material layer 130 is formed. In addition, the material of the patterned organic material layer 130 includes photoresist, benzocyclobutene, cycloalkene, polyimide, polyamide, polyester, polyalcohol, polyethylene oxide, Polyphenylene, resin, polyether, polyketone, or other materials, or a combination of the above.

Referring to FIG. 1G , next, a reflective layer 140 is formed on the patterned organic material layer 130 and the exposed part of the protection layer 120 . That is to say, the reflective layer 140 covers the raised patterns 134 of the patterned organic material layer 130 and part of the protective layer 120, in other words, the reflective layer 140 covers the entire pixel area P1 and the pad area P2 or is called the reflective layer 140 conformally. It is formed on the entire pixel area P1 and the pad area P2. In addition, in this embodiment, the reflective layer 140 can be a single-layer structure or a multi-layer structure, and its material can be aluminum, aluminum alloy, silver or other metals with high reflectivity. In addition, the raised pattern 134 described in the embodiment of the present invention may also be formed on the surface of the reflective layer 140 in other embodiments.

Referring to FIG. 1H , next, a first patterned photoresist layer 150 is formed on the reflective layer 140 in the pixel region P1 , and the first patterned photoresist layer 150 has a plurality of openings 152a, 152b. In more detail, the first patterned photoresist layer 150 exposes the reflective layer 140 located in the pad area P2, and the openings 152a, 152b of the first patterned photoresist layer 150 expose a part of the reflective layer located in the pixel area P1. layer 140, and the opening 152a substantially corresponds to the opening 132a, and the opening 152b substantially corresponds to the opening 132b.

Please refer to FIG. 1I and FIG. 1J at the same time. Next, the first patterned photoresist layer 150 is used as an etching mask to remove the exposed part of the reflective layer 140 in the pixel region P1 and the exposed part of the reflective layer 140. part of the protective layer 120 under the partial reflective layer 140 to form a first contact window C1 and a second contact window C2, wherein the first contact window C1 exposes the drain 118b of the switching element 110a, and the second contact window C2 exposes the The upper electrode 118c of the storage capacitor 110b. In addition, in the pad area P2, the reflective layer 140 is completely removed, part of the protective layer 120 is removed to expose a portion of the conductive pattern 118d, and part of the protective layer 120 and part of the insulating layer 114 are removed to expose a portion pad 112c. It must be noted here that when removing the part of the protective layer 120 under the exposed part of the reflective layer 140 (such as the pixel region P1), the first patterned photoresist layer 150 and the patterned organic material layer 130 as an etching photomask. The patterned organic material layer 130 is used as an etching photomask when removing the part of the protective layer 120 (such as the pad region P2 ) exposed by the patterned organic material layer 130 . In this embodiment, a preferred method for removing the exposed partial reflective layer 140 and the partial protective layer 120 under the exposed partial reflective layer 140 includes wet etching, but is not limited thereto, and may also be used suitable for dry etching.

In detail, in this embodiment, an in-situ process is used to remove the exposed reflective layer 140 and the protective layer 120 under the exposed part of the reflective layer 140 . That is to say, when removing the exposed reflective layer 140 and the protection layer 120 under the exposed part of the reflective layer 140, the reflective layer 140 can be sequentially etched in the same reaction chamber with different etching solutions. and protective layer 120 to complete. That is to say, there is only one photolithography process or only one or the same patterned photoresist layer, but the etching of the reflective layer 140 and the etching of the protective layer 120 are completed at the same time.

Referring to FIG. 1K , next, the first patterned photoresist layer 150 is removed to expose the reflective layer 140 . Next, referring to FIG. 1L , a pixel electrode 160 is formed on the reflective layer 140 and part of the patterned organic material layer 130 in the pixel region P1 and a protective electrode 160 a is formed on the organic material layer 130 in the pad region P2 . In particular, the pixel electrode 160 is electrically connected to the drain electrode 118b of the switch element 110a through the first contact window C1, and the pixel electrode 160 is electrically connected to the upper electrode 118c of the storage capacitor 110b through the second contact window C2. The conductive pattern 118d and the pad 112c are electrically connected to each other through the protection electrode 160a. So far, the pixel structure 100 has been roughly completed.

In detail, in practice, the method of forming the pixel electrode 160 and the protective electrode 160a is, for example, a physical vapor deposition (Physical Vapor Deposition, PVD) sputtering process to form, but not limited to this, and screen printing can also be used method, inkjet method or other suitable methods. The pixel electrode 160 and the protection electrode 160 a can be a single-layer or multi-layer structure, and their materials can vary depending on the display mode design of the pixel structure 100 . For example, the pixel electrode 160 and the protective electrode 160a can be made of transparent conductive materials such as indium tin oxide, indium zinc oxide, indium tin zinc oxide, hafnium oxide, zinc oxide, aluminum oxide, aluminum tin oxide , aluminum zinc oxide, cadmium tin oxide, cadmium zinc oxide or a combination of the above. Preferably, the pixel electrode 160 and the protection electrode 160a are formed at the same time, but not limited thereto, and the two may not be formed at the same time.

In the present invention, the same patterned photoresist layer is used as an etching photomask to remove the exposed partial reflective layer 140 and the partial protective layer 120 under the exposed partial reflective layer 140, and can The method of in-situ programming is adopted sequentially, so compared with the manufacturing method of the pixel structure of the known reflective liquid crystal display, this embodiment can omit at least one photolithography process, so as to reduce the number of masks used and shorten the pixels The processing time of the structure 100 is reduced to reduce the production cost. In addition, in this embodiment, molybdenum or a laminate of molybdenum and aluminum that can be wet-etched is used as the first metal layer 112 and the second metal layer 118 as a preferred example, but it is not limited thereto. Since the wet etching process is faster than the dry etching process, throughput can be increased. In addition, when performing wet etching, since the second metal layer 118 is protected by the protective layer 120 , the second metal layer 118 can be prevented from being corroded by the etching solution.

It is particularly worth mentioning that the above-mentioned embodiment is described with a reflective pixel structure as an example, so the reflective layer 140 will cover the entire pixel area P1. However, the present invention is preferably applied in a transflective pixel structure or a micro-reflective pixel structure. If the above-mentioned embodiment is applied to a transflective pixel structure or a micro-reflective pixel structure, the pixel area P1 of the substrate 100a can be divided into at least one reflective area and at least one transmissive area (not shown) or at least one A micro-reflecting area and at least one penetrating area (not shown). However, when the patterned organic material layer 130 and the reflective layer 140 are subsequently formed, the raised pattern 134 on the patterned organic material layer 130 and the reflective layer 140 will only be formed in the reflective area.

2A to 2N are schematic cross-sectional views of a method for manufacturing a pixel structure according to another embodiment of the present invention. Please refer to FIG. 2A. Firstly, a substrate 200a is provided, wherein the substrate 200a has a pixel area P1' and a pad area P2'. Next, a first metal layer 112 is formed on the substrate 200a. The first metal layer 212 includes a gate 212a, a bottom electrode 212b and a pad 212c, wherein the gate 212a and the bottom electrode 212b are located in the pixel region P1' of the substrate 200a, The pad 212c is located on the pad area P2' of the substrate 200b. In addition, the material of the substrate 200a, the material of the first metal layer 212, the design of the pad 212c and the structure of the pad 212c are as described in the previous paragraph (corresponding to the paragraph of the substrate 100a and the first metal layer 112 in FIG. 1A ), so here No longer. In other embodiments, the pixel structure can only be described and designed with the pixel region P1' as the main point, without considering the description and design of the pad region P2'.

Referring to FIG. 2B , next, an insulating layer 214 , a semiconductor layer 216 and a second metal layer 218 are sequentially formed on the first metal layer 212 . That is to say, the insulating layer 214 covers the gate 212a, the lower electrode 212b and the pad 212c of the pad area P2' in the pixel region P1', the semiconductor layer 216 covers the insulating layer 214, and the second metal layer 218 covers the semiconductor layer 216, in other words , the insulating layer 214 , the semiconductor layer 216 and the second metal layer 218 are stacked together in sequence. It is worth mentioning that in this embodiment, the semiconductor layer 216 can be composed of a channel layer 216 a and an ohmic contact layer 216 b arranged vertically as an example, but not limited thereto, and can also be arranged horizontally. Wherein, the material of the channel layer 216a includes amorphous silicon, single crystal silicon, microcrystalline silicon, polycrystalline silicon, or other suitable materials, or combinations thereof. In this embodiment, the channel layer is implemented using amorphous silicon (a-Si) as an example, but not limited thereto. In addition, the material of the ohmic contact layer 216b includes N-type doped amorphous silicon, P-type doped amorphous silicon, N-type doped/P-type doped single crystal silicon, N-type doped/P-type doped microcrystalline silicon , N-type doped/P-type doped polysilicon, or other suitable materials, or a combination of the above. In this embodiment, the ohmic contact layer 216b is implemented using N-type heavily doped amorphous silicon as an example, but not limited thereto. In addition, the materials of the insulating layer 214 and the second metal layer 218 are as described in the previous paragraphs (corresponding to the paragraphs of the insulating layer 214 in FIG. 1B and the second metal layer 118 in FIG. 1D ), so details are not repeated here.

Referring to FIG. 2C , next, a second patterned photoresist layer 219 is formed on the second metal layer 218 . The second patterned photoresist layer 219 has a first portion 219a and a second portion 219b, wherein the first portion 219a covers the top of the gate 212a, and the second portion 219b covers the second metal layer 218 on both sides of the gate 212a , the second metal layer 218 above the bottom electrode 212b and the conductive pattern 218d in the pad region P2.

In detail, the second patterned photoresist layer 219 is a grayscale mask (not shown), half-tone mask (Half-Tone Mask), multi-level mask (Multi-Tone Mask) or other suitable The mask is formed by performing an exposure process on a photoresist layer (not shown), wherein the gray scale mask is to use masks of different shades, so that the photoresist layer is exposed to different illuminance, after the development process Shapes with different depths can be obtained afterwards, that is, the first part 219a and the second part 219b of the second patterned photoresist layer 219 are formed, and part of the second metal layer 218 is exposed, wherein the thickness of the first part 219a is substantially less than the thickness of the second portion 219b.

Please refer to FIG. 2D, and then, use the second patterned photoresist layer 219 as a photomask to etch the exposed part of the second metal layer 218 and the underlying film layer (such as: 216) to pattern The second metal layer 218 and the semiconductor layer 216 define an active layer 216' above the gate 212a, define an upper electrode 218c above the lower electrode 212b, and define a conductive pattern 218d in the pad region P2'. At this time, a part of the insulating layer 214 is exposed in the area not covered by the second patterned photoresist layer 219 . In detail, the material of the active layer 216' in this embodiment is the same as that of the channel layer 216a of the semiconductor layer 216 in FIG. limit.

Please refer to FIG. 2E, then, an ashing process is performed on the second patterned photoresist layer 219 to control the etched thickness of the second patterned photoresist layer 219 in the ashing process, so as to completely remove the first part 219a, and forming the thinned second portion 219b' will expose part of the second metal layer 218 above the active layer 216'.

Next, please refer to FIG. 2F and 2G, use the thinned second portion 219b' of the second patterned photoresist layer 219 as a photomask to remove the second metal layer 218 above the active layer 216' to define The source electrode 218a and the drain electrode 218b are removed, and part of the ohmic contact layer 216b is removed to expose a part of the active layer 216'. Afterwards, the thinned second portion 219b' is removed to expose the source 218a, the drain 218b, the upper electrode 218c and the conductive pattern 218d in the pad region P2 of the pixel region P1, as shown in FIG. 2G . In particular, in this embodiment, the active layer 216' acts as an electron channel between the source 218a and the drain 218b, and the ohmic contact layer 216b can reduce the connection between the source 218a/drain 218b of the second metal layer 218 and the active Contact resistance between layers 216'. So far, the switch element 210a and the storage capacitor 210b have been substantially completed on the substrate 200a. Wherein, this embodiment takes the bottom gate structure as an example, but is not limited thereto, and the top gate structure described in the above embodiments may also be used. It should be noted here that the manufacturing method and structure of the switching element 110 a and the storage capacitor 110 b are examples of the embodiments of the present invention, and are not limited to this method, and other applicable structures or manufacturing methods may also be used.

Please continue to refer to FIG. 2G. Next, a protective layer 220 is formed on the substrate 200a, wherein the protective layer 220 covers the switching element 210a and the storage capacitor 210b in the pixel region P1' and the conductive pattern 218d in the pad region P2'. In addition, the material of the protective layer 220 is as described in the previous paragraph (corresponding to the paragraph of the protective layer 120 in FIG. 1E ), so it will not be repeated here.

Please refer to FIG. 2H, then, a patterned organic material layer 230 is formed on the protection layer 220, wherein a plurality of raised patterns 234 are formed on part of the patterned organic material layer 230, and the patterned organic material layer 230 has a plurality of openings 232a, 232b, 232c. The raised pattern 234 in the embodiment of the present invention is formed on the organic material layer of the pixel region P1, but is not limited thereto. The raised pattern 234 can also be formed on the surface of the protective layer 220, the surface of the insulating layer 214, or other suitable on the film layer. The opening 232a exposes the protection layer 220 on the drain electrode 218b of the pixel region P1', the opening 232b exposes the protection layer 220 above the upper electrode 218c of the pixel region P1', and the opening 232c exposes a part of the pad region P2' The passivation layer 220 over the metal layer 218d and part of the insulating layer 214 .

In this embodiment, the patterned organic material layer 230 is formed by using a gray-level mask (Grey-Level Mask) (not shown), a half-tone mask (Half-Tone Mask), a multi-level mask ( Multi-Tone Mask) or other suitable masks, an exposure process is performed on an organic material layer (not shown), wherein the grayscale mask uses masks of different shades, so that the organic material layer is exposed to different illuminance After exposure and development process, shapes with different depths can be obtained, that is, the patterned organic material layer 230 is formed. In addition, the material of the patterned organic material layer 230 is as described in the previous paragraph (corresponding to the paragraph of the patterned organic material layer 130 in FIG. 1F ), so it will not be repeated here.

Referring to FIG. 2I , next, a reflective layer 240 is formed on the patterned organic material layer 230 and the exposed part of the protective layer 220 . That is to say, the reflective layer 240 covers the raised patterns 234 of the patterned organic material layer 230 and part of the protective layer 220. Formed on the entire pixel area P1' and pad area P2'. In this embodiment, the reflective layer 240 can be a single-layer structure or a multi-layer structure, and its material can be aluminum, aluminum alloy, silver or other metals with high reflectivity. In addition, the position of the raised pattern 134 described in the embodiment of the present invention is only for illustration, and in other unillustrated embodiments, it can also be formed on the surface of the reflective layer 140 .

Referring to FIG. 2J , next, a first patterned photoresist layer 250 is formed on the partial reflective layer 240 in the pixel region P1', and the first patterned photoresist layer 250 has a plurality of openings 252a, 252b. In more detail, the first patterned photoresist layer 150 exposes the reflective layer 240 located in the pad region P2', and the openings 252a, 252b of the first patterned photoresist layer 250 expose part of the reflective layer 240 , and the opening 252a substantially corresponds to the opening 232a, and the opening 252b substantially corresponds to the opening 232b.

Please refer to FIG. 2K and FIG. 2L at the same time. Next, use the first patterned photoresist layer 250 as an etching mask to remove the part of the reflective layer 240 exposed in the pixel region P1' and the exposed part of the reflective layer 240. part of the protective layer 220 under the partial reflective layer 240, and form a first contact window C1' and a second contact window C2', wherein the first contact window C1' exposes the drain 218b of the switching element 210a, and the second contact The window C2' exposes the upper electrode 218c of the storage capacitor 210b. In addition, in the pad area P2', the reflective layer 240 is completely removed, part of the protective layer 220 is removed to expose a part of the conductive pattern 218d, and part of the protective layer 220 and part of the insulating layer 214 are removed to expose part of the pad 212c. It must be noted here that when removing the part of the protection layer 220 located under the exposed part of the reflective layer 140 (such as the pixel region P1), the first patterned photoresist layer 250 and the patterned organic material layer 230 as an etching photomask. The patterned organic material layer 230 is used as an etching photomask when removing the part of the protective layer 220 (such as the pad region P2 ) exposed by the patterned organic material layer 230 . In this embodiment, a preferred method for removing the exposed partial reflective layer 240 and the partial protective layer 220 under the exposed partial reflective layer 240 includes wet etching, but is not limited thereto, and may also be used suitable for dry etching.

In detail, in this embodiment, an in-situ process is used to remove the exposed reflective layer 240 and the protective layer 220 under the exposed part of the reflective layer 240 . That is to say, when removing the exposed reflective layer 240 and the protective layer 220 under the exposed part of the reflective layer 240, the reflective layer 240 can be sequentially etched in the same reaction chamber with different etching solutions. And protective layer 220 to complete. That is to say, there is only one photolithography process or only one or the same patterned photoresist layer, but the etching of the reflective layer 240 and the etching of the protective layer 220 are completed at the same time.

Referring to FIG. 2M , next, the first patterned photoresist layer 250 is removed to expose the reflective layer 240 . Next, please refer to FIG. 2N , a pixel electrode 260 is formed on the reflective layer 240 and part of the patterned organic material layer 230 in the pixel region P1' and a protective electrode 260a is formed on the organic material layer 230 in the pad region P2'. In particular, the pixel electrode 260 is electrically connected to the drain electrode 218b of the switching element 210a through the first contact window C1', and the pixel electrode 260 is electrically connected to the upper electrode 218c of the storage capacitor 210b through the second contact window C2'. The conductive pattern 218d and the pad 212c are electrically connected to each other through the protection electrode 260a. In this embodiment, the material of the pixel electrode 260 is as described in the previous paragraph (corresponding to the paragraph of the pixel electrode 160 in FIG. 1L ), so it will not be repeated here. So far, the pixel structure 200 has been roughly completed. Preferably, the pixel electrode 260 and the protection electrode 260a are formed at the same time, but not limited thereto, and the two may not be formed at the same time.

Similarly, in this embodiment, at least one photolithography process can be omitted to reduce the number of masks used, and the process time of the pixel structure 200 can be shortened to reduce production costs. In addition, if the wet etching process is used to etch the first metal layer 212 and the second metal layer 218 in this embodiment, the production capacity can also be increased. In addition, when performing wet etching, since the second metal layer 218 is protected by the protective layer 220 , the second metal layer 218 can also be prevented from being corroded by the etching solution.

It should be noted again that the above embodiment is described by taking the reflective pixel structure as an example, so the reflective layer 240 will cover the entire pixel area P1'. However, the present invention is preferably applied in a transflective pixel structure or a micro-reflective pixel structure. If the above embodiment is applied to a transflective pixel structure, the pixel region P1' of the substrate 200a can be divided into at least one reflective region and at least one transmissive region (not shown) or at least one microreflective region and At least one penetration region (not shown). However, when the patterned organic material layer 230 and the reflective layer 240 are subsequently formed, the raised pattern 234 on the patterned organic material layer 230 and the reflective layer 240 will only be formed in the reflective area.

FIG. 3 is a schematic diagram of a display panel according to an embodiment of the present invention. Please refer to FIG. 3 , the finished product of the display panel 300 of this embodiment includes at least one pixel array substrate 310 , another substrate 320 opposite to the pixel array substrate 310 , and a pixel array substrate 310 disposed between the other substrate 320 . The display medium 320, wherein the pixel array substrate 310 has the pixel structure 100 shown in FIG. 1L or the pixel structure 200 shown in FIG. 2N, and another substrate 320 optionally has a transparent electrode 320a. The manufacturing method of the display panel 300 includes the manufacturing method of the above-mentioned pixel structure 100 or the pixel structure 200 , followed by various manufacturing procedures of the display panel 300 and assembled to obtain the display device 300 .

In addition, when the display medium 330 is a photoelectric deflection material, such as a liquid crystal material, the display panel 300 can be a transflective display panel, a micro-reflective display panel, a reflective display panel, and a color filter on the active layer. Display panel with color filter on array, display panel with active layer on color filter (array on color filter), vertical alignment (VA) display panel, horizontal switching type (IPS) display panel, multi-domain vertical Alignment type (MVA) display panel, twisted nematic (TN) display panel, super twisted nematic (STN) display panel, patterned vertical alignment (PVA) display panel, super patterned vertical alignment (S-PVA) display Display panel, advanced large viewing angle (ASV) display panel, fringe field switching (FFS) display panel, continuous pyrotechnic arrangement (CPA) display panel, axisymmetric array microcell (ASM) display panel, optically compensated bending arrangement (OCB) display panel, super horizontal switching (S-IPS) display panel, advanced super horizontal switching (AS-IPS) display panel, extreme edge field switching (UFFS) display panel, polymer stable alignment display panel, A dual-view display panel, a triple-view display panel, a three-dimensional display panel, a multi-panel display panel, or other types of panels. If the display medium 330 is an electroluminescent material, the display panel 300 is called an electroluminescent display panel (such as: a phosphorescent electroluminescent display panel, a fluorescent electroluminescent display panel, or a combination of the above), also known as a self-luminous display. panel, and its electroluminescent material can be an organic material, an organic material, an inorganic material, or a combination of the above, and the molecular size of the above material includes small molecules, macromolecules, or the combination of the above. If the display medium 330 includes both liquid crystal material and electroluminescent material, the display panel 300 is called a hybrid display panel or a semi-self-luminous display panel.

FIG. 4 is a schematic diagram of an optoelectronic device according to an embodiment of the present invention. Please refer to FIG. 4 , the display panel 300 described in the above embodiment can be electrically connected with an electronic component 410 to form an optoelectronic device 400, and the manufacturing method of the optoelectronic device 400 includes the manufacturing method of the display panel 300 as described above, The obtained display is then assembled according to various manufacturing procedures of the optoelectronic device 400 to obtain the optoelectronic device 400 . Since, in this embodiment, the display panel 300 uses the above-mentioned pixel structure 100 (please refer to FIG. 1L ) or pixel structure 200 (please refer to FIG. 2N ) as the pixel array substrate 310 (please refer to FIG. 3 ), the above-mentioned The photoelectric device 400 of the pixel structure 100 or the pixel structure 200 can not only reduce the process time and increase the yield, but also reduce the production cost.

In addition, the electronic element 410 includes, for example, a control element, an operating element, a processing element, an input element, a memory element, a driving element, a light emitting element, a protection element, a sensing element, a detection element, or other functional elements, or a combination thereof. The type of optoelectronic device 400 includes portable products (such as mobile phones, video cameras, cameras, notebook computers, game consoles, watches, music players, electronic letter transceivers, map navigators, digital photos, or similar products), audio-visual Products (such as audio-visual players or similar products), screens, televisions, billboards, panels inside projectors, etc.

Although the present invention has been disclosed above with embodiments, it is not intended to limit the present invention. Any skilled person in the technical field with common knowledge can make some modifications and changes without departing from the spirit and scope of the present invention. Modification, so the scope of protection of the present invention should be defined by the scope of the appended claims.

Claims (8)

1. A method for manufacturing a pixel structure, characterized in that the method comprises: providing a substrate on which a switching element and a storage capacitor have been formed; forming a protection layer on the substrate to cover the switching element and the storage capacitor; A patterned organic material layer is formed on the protective layer, wherein part of the patterned organic material layer is formed with a plurality of raised patterns and the patterned organic material layer has a plurality of first openings, which respectively expose the protective layer over the source/drain and the protective layer over the upper electrode of the storage capacitor; forming a reflective layer on the patterned organic material layer and the exposed part of the protective layer; A first patterned photoresist layer is formed on part of the reflective layer, and the first patterned photoresist layer has a plurality of second openings to expose part of the reflective layer, and each second an opening corresponding substantially to each first opening; using the first patterned photoresist layer as an etching photomask to remove the exposed part of the reflective layer and the part of the protective layer under the exposed part of the reflective layer, and forming a first contact window exposing the source/drain of the switching element and a second contact window exposing the upper electrode of the storage capacitor; and; removing the first patterned photoresist layer; and A pixel electrode is formed on the patterned organic material layer, and the pixel electrode is electrically connected to the source/drain of the switching element through the first contact window and the second contact window is connected to the storage device. The upper electrodes of the capacitors are electrically connected. 2. The manufacturing method of the pixel structure according to claim 1, wherein removing the exposed reflective layer and the protective layer under the exposed part of the reflective layer is performed by in-situ program. 3. The manufacturing method of the pixel structure according to claim 1, wherein an exposure process is performed on an organic material layer using a gray scale mask on the patterned organic material layer. 4. The method for manufacturing a pixel structure according to claim 1, wherein the method for forming the switching element and the storage capacitor comprises: forming a first metal layer on the substrate, which includes a gate and a lower electrode; forming an insulating layer on the first metal layer; forming an active layer on the insulating layer over the gate; and A second metal layer is formed on the insulating layer, which includes the source electrode and the drain electrode located above part of the active layer and the upper electrode located above the lower electrode. 5. The method for manufacturing a pixel structure according to claim 1, wherein the method for forming the switching element and the storage capacitor comprises: forming a first metal layer on the substrate, which includes a gate and a lower electrode; sequentially forming an insulating layer, a semiconductor layer and a second metal layer on the first metal layer; A second patterned photoresist layer is formed on the second metal layer, which has a first portion and a second portion, the first portion covers the gate, and the second portion covers the gate a second metal layer above both sides of the electrode and a second metal layer above the lower electrode; Using the second patterned photoresist layer as a photomask to pattern the second metal layer and the semiconductor layer to define an active layer above the gate and above the lower electrode defining the upper electrode; performing an ashing process on the second patterned photoresist layer to remove the first portion; using the second part of the second patterned photoresist layer as a photomask to remove the second metal layer above the active layer to define the source and the drain . 6 . The method for manufacturing the pixel structure according to claim 5 , wherein the second patterned photoresist layer is formed by exposing a photoresist layer with a gray scale mask. 7. A method for manufacturing a display panel, characterized in that the method comprises the method for manufacturing a pixel structure according to claim 1. 8 . A method for manufacturing an optoelectronic device, characterized in that the method comprises the method for manufacturing a display panel as claimed in claim 7 .

Images