CN100501679C - Electric device - Google Patents

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CN100501679C
CN100501679C CNB2007100270176A CN200710027017A CN100501679C CN 100501679 C CN100501679 C CN 100501679C CN B2007100270176 A CNB2007100270176 A CN B2007100270176A CN 200710027017 A CN200710027017 A CN 200710027017A CN 100501679 C CN100501679 C CN 100501679C
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bios
electronic device
program storage
bios program
storage area
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CN101017441A (en
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陈贵敏
朱金华
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Huawei Technologies Co Ltd
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Priority to PCT/CN2007/071405 priority patent/WO2008104117A1/en
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operations
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level
    • G06F11/1433Saving, restoring, recovering or retrying at system level during software upgrading
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operations
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level
    • G06F11/1417Boot up procedures

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Abstract

本发明公开了一种电子设备,包括中央处理器、存储器、开关单元、及基本输入输出系统BIOS切换单元,其中:存储器,设置有两个BIOS程序存储区;BIOS切换单元,用于在电子设备上电或电子设备复位时,触发电子设备从所述存储器中的一个BIOS程序存储区切换到从另一个BIOS程序存储区引导电子设备启动;开关单元,用于在电子设备开机上电或电子设备复位时,断开所述中央处理器至所述存储器的分区地址线,以及用于在电子设备成功启动后,导通所述分区地址线。本发明同时还公开了一种启动方法和BIOS升级方法。利用本发明,可实现无论BIOS升级成功或者失败,电子设备均能正常启动,保证了BIOS升级的安全性。

Figure 200710027017

The invention discloses an electronic device, which includes a central processing unit, a memory, a switch unit, and a basic input and output system BIOS switching unit, wherein: the memory is provided with two BIOS program storage areas; the BIOS switching unit is used in the electronic device When the electronic device is powered on or the electronic device is reset, the electronic device is triggered to switch from one BIOS program storage area in the memory to booting the electronic device from another BIOS program storage area; the switch unit is used to power on the electronic device or the electronic device When resetting, disconnect the partition address line from the central processing unit to the memory, and turn on the partition address line after the electronic device is successfully started. The invention also discloses a starting method and a BIOS upgrading method at the same time. By using the invention, no matter whether the BIOS upgrade is successful or failed, the electronic equipment can be started normally, thereby ensuring the safety of the BIOS upgrade.

Figure 200710027017

Description

一种电子设备 an electronic device

技术领域 technical field

本发明涉及电子技术领域,具体涉及一种电子设备。The invention relates to the field of electronic technology, in particular to an electronic device.

背景技术 Background technique

BIOS(Basic Input/Output System,基本输入输出系统)全称是ROM-BIOS,是只读存储器基本输入/输出系统的简写,它实际是一组被固化到计算机等电子设备中,为计算机设备提供最低级最直接的硬件控制的程序,它是连通软件程序和硬件设备之间的枢纽,通俗地说,BIOS是硬件与软件程序之间的一个“转换器”或者说是接口(虽然它本身也只是一个程序),负责解决硬件的即时要求,并按软件对硬件的操作要求具体执行。The full name of BIOS (Basic Input/Output System, Basic Input Output System) is ROM-BIOS, which is the abbreviation of the basic input/output system of the read-only memory. It is the most direct hardware control program at the level. It is the hub connecting software programs and hardware devices. In layman's terms, BIOS is a "converter" or an interface between hardware and software programs (although it itself is only A program) is responsible for solving the immediate requirements of the hardware, and executes according to the operation requirements of the software for the hardware.

目前计算机的BIOS芯片基本都采用了Flash ROM(闪存),可通过特定的写入程序实现BIOS的升级,升级BIOS主要有两大目的:At present, the BIOS chip of the computer basically uses Flash ROM (flash memory), and the BIOS can be upgraded through a specific writing program. There are two main purposes for upgrading the BIOS:

一、获得新功能。1. Get new features.

升级BIOS最直接的好处就是能获得许多新功能,比如能支持新频率和新类型的CPU,例如以前的某些老主板通过升级BIOS支持图拉丁核心Pentium III和Celeron,现在的某些主板通过升级BIOS能支持最新的Prescott核心Pentium4E CPU;突破容量限制,能直接使用大容量硬盘;获得新的启动方式;开启以前被屏蔽的功能,例如英特尔的超线程技术,VIA的内存交错技术等;识别其它新硬件等。The most direct benefit of upgrading the BIOS is that you can get many new functions, such as the ability to support new frequencies and new types of CPUs. For example, some old motherboards support Tualatin core Pentium III and Celeron by upgrading the BIOS, and some motherboards now support BIOS can support the latest Prescott core Pentium4E CPU; break through the capacity limit, and can directly use large-capacity hard drives; obtain a new boot method; enable previously blocked functions, such as Intel's hyper-threading technology, VIA's memory interleaving technology, etc.; identify other new hardware etc.

二、解决旧版BIOS中的漏洞BUG。2. Solve the vulnerability BUG in the old version of BIOS.

BIOS既然也是程序,就必然存在着BUG,而且现在硬件技术发展日新月异,随着市场竞争的加剧,主板厂商推出产品的周期也越来越短,在BIOS编写上必然也有不尽如意的地方,而这些BUG常会导致莫名其妙的故障,例如无故重启,经常死机,系统效能低下,设备冲突,硬件设备无故“丢失”等等。Since the BIOS is also a program, there must be bugs, and the development of hardware technology is changing with each passing day. With the intensification of market competition, the cycle for motherboard manufacturers to launch products is getting shorter and shorter. There must be some unsatisfactory places in BIOS writing. These bugs often lead to inexplicable failures, such as restarting for no reason, frequent crashes, low system performance, device conflicts, hardware devices "lost" for no reason, and so on.

在现有技术中,BIOS升级方式采用直接覆盖Flash ROM中原有BIOS程序的方法实现。采用这种方式如果BIOS升级过程出现异常(例如文件传输异常、FLASH读写异常、升级过程中掉电)、用于升级的BIOS引导程序本身存在缺陷,计算机、通信等电子设备将无法启动。In the prior art, the BIOS upgrade mode is implemented by directly covering the original BIOS program in the Flash ROM. In this way, if there is an abnormality in the BIOS upgrade process (such as abnormal file transfer, abnormal FLASH read and write, power failure during the upgrade process), and the BIOS boot program used for the upgrade itself has defects, electronic devices such as computers and communications will not be able to start.

发明内容 Contents of the invention

有鉴于此,本发明实施例的主要目的在于提供一种电子设备、启动方法及BIOS升级方法,保证在BIOS升级过程中出现异常导致升级失败的情况下,设备系统仍能安全正常启动。In view of this, the main purpose of the embodiments of the present invention is to provide an electronic device, a startup method, and a BIOS upgrade method, so as to ensure that the device system can still be safely and normally started when an abnormality occurs during the BIOS upgrade process and the upgrade fails.

为了达到所述方法目的,本发明实施例提供了一种启动方法,包括:In order to achieve the purpose of the method, an embodiment of the present invention provides a startup method, including:

A、设备上电时,以第一基本输入输出系统BIOS程序存储区引导设备启动,如果启动不成功或设备重新上电,执行步骤B;A. When the device is powered on, use the BIOS program storage area of the first basic input and output system to boot the device. If the startup fails or the device is powered on again, perform step B;

B、硬件逻辑电路触发设备从所述第一BIOS程序存储区切换到第二BIOS程序存储区,以第二BIOS程序存储区引导设备启动。B. The hardware logic circuit triggers the device to switch from the first BIOS program storage area to the second BIOS program storage area, and boots the device with the second BIOS program storage area.

另外,本发明实施例还提供了一种基本输入输出系统BIOS升级方法,包括步骤:In addition, the embodiment of the present invention also provides a basic input output system BIOS upgrade method, comprising steps:

设置两个BIOS程序存储区,所述BIOS程序存储区用于存储引导设备启动的BIOS程序,当对所述设备进行BIOS升级时,包括以下步骤:Two BIOS program storage areas are set, and the BIOS program storage area is used to store the BIOS program started by the boot device. When the device is upgraded to BIOS, the steps are as follows:

a、设备上电,以第一BIOS程序存储区引导设备启动,设备启动成功后,将用于升级的BIOS程序加载到第二BIOS程序存储区;a. Power on the device, boot the device with the first BIOS program storage area, and after the device starts successfully, load the BIOS program for upgrading to the second BIOS program storage area;

b、设备重新上电,硬件逻辑电路触发设备从所述第一BIOS程序存储区切换到所述第二BIOS程序存储区,以所述第二BIOS程序存储区引导设备启动,如果启动不成功,则硬件逻辑电路触发设备从所述第二BIOS程序存储区切换到所述第一BIOS程序存储区,再次以所述第一BIOS程序存储区引导设备启动;b. The device is powered on again, and the hardware logic circuit triggers the device to switch from the first BIOS program storage area to the second BIOS program storage area, and boots the device with the second BIOS program storage area. If the startup is unsuccessful, Then the hardware logic circuit triggers the device to switch from the second BIOS program storage area to the first BIOS program storage area, and boots the device with the first BIOS program storage area again;

c、判断当前引导设备成功启动的BIOS程序存储区是否为所述第二BIOS程序存储区,如果是,则将所述第二BIOS程序存储区中的BIOS程序加载到所述第一BIOS程序存储区。c, judging whether the BIOS program storage area successfully started by the current boot device is the second BIOS program storage area, if yes, loading the BIOS program in the second BIOS program storage area to the first BIOS program storage district.

相应地,本发明实施例还提供了一种电子设备,包括中央处理器、存储器、开关单元、及基本输入输出系统BIOS切换单元,其中:Correspondingly, an embodiment of the present invention also provides an electronic device, including a central processing unit, a memory, a switching unit, and a basic input and output system BIOS switching unit, wherein:

存储器,设置有两个BIOS程序存储区,所述BIOS存储区存储有用于引导设备启动的BIOS程序;The memory is provided with two BIOS program storage areas, and the BIOS storage area stores a BIOS program for booting the device;

BIOS切换单元,用于在设备上电或设备复位时,触发设备从所述存储器中的一个BIOS程序存储区切换到从另一个BIOS程序存储区引导设备启动;A BIOS switching unit, configured to trigger the device to switch from one BIOS program storage area in the memory to booting the device from another BIOS program storage area when the device is powered on or the device is reset;

开关单元,用于在设备开机上电或设备复位时,断开所述中央处理器至所述存储器的分区地址线,以及用于在设备成功启动后,导通所述分区地址线。The switch unit is used for disconnecting the partition address line from the central processing unit to the memory when the device is turned on or reset, and for turning on the partition address line after the device is successfully started.

本发明实施例的BIOS升级方法通过设置两个BIOS程序存储区,在设备正常运行时,将用于升级的BIOS程序加载到当前用于引导设备启动的第一BIOS程序存储区外的第二BIOS程序存储区,当设备再次上电时,通过硬件逻辑电路触发设备跳转到以所述第二BIOS程序存储区引导设备启动,如果引导不成功,则再次通过硬件逻辑电路触发设备跳转到以保存有原BIOS程序的第一BIOS程序存储区引导设备启动,从而避免了在升级过程中发生升级失败,比如BIOS升级程序出现异常或用于升级的BIOS程序本身存在的缺陷引起的失败,对设备产生的潜在风险,保证了设备无论BIOS升级成功还是失败均能正常启动,提高了BIOS升级的安全性。In the BIOS upgrade method of the embodiment of the present invention, by setting two BIOS program storage areas, when the device is running normally, the BIOS program for upgrading is loaded into the second BIOS outside the first BIOS program storage area currently used to boot the device. Program storage area, when the device is powered on again, the hardware logic circuit triggers the device to jump to the second BIOS program storage area to boot the device, if the boot is unsuccessful, the hardware logic circuit triggers the device to jump to the following The first BIOS program storage area that has the original BIOS program is stored to boot the device, thereby avoiding the upgrade failure during the upgrade process, such as failure caused by an abnormality in the BIOS upgrade program or a defect in the BIOS program used for upgrade itself, which is harmful to the device. The potential risks generated ensure that the device can start normally regardless of whether the BIOS upgrade succeeds or fails, and improves the security of the BIOS upgrade.

附图说明 Description of drawings

图1是本发明实施例的电子设备组成示意图;FIG. 1 is a schematic diagram of the composition of an electronic device according to an embodiment of the present invention;

图2是本发明实施例的本发明实施例的一种启动方法的流程示意图;Fig. 2 is a schematic flow chart of a starting method of an embodiment of the present invention;

图3是本发明实施例的BIOS升级方法中的BIOS程序加载方法流程示意图;Fig. 3 is a schematic flow chart of a BIOS program loading method in a BIOS upgrading method according to an embodiment of the present invention;

图4是本发明实施例的BIOS升级方法中的BIOS引导启动方法流程示意图。FIG. 4 is a schematic flowchart of a BIOS booting and starting method in a BIOS upgrading method according to an embodiment of the present invention.

具体实施方式 Detailed ways

为了使本发明实施例的技术方案及优点更加清楚明白,下面结合附图并举实施例对本发明实施例进行进一步详细说明。In order to make the technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings and examples.

参考图1,是本发明实施例的电子设备组成示意图。本发明实施例所述的电子设备既包括了如个人计算机等通用计算机系统,也包括了运用嵌入式计算机系统等专用计算机系统的通信电子设备,如网络接入设备、通信交换设备等。如图所示,本发明实施例所述的电子设备主要包括中央处理器1、存储器2、开关单元3、切换单元4以及升级控制子系统5。下面对各个组成部分进行详细说明。Referring to FIG. 1 , it is a schematic diagram of the composition of an electronic device according to an embodiment of the present invention. The electronic equipment described in the embodiments of the present invention includes not only general-purpose computer systems such as personal computers, but also communication electronic equipment using special-purpose computer systems such as embedded computer systems, such as network access equipment, communication switching equipment, and the like. As shown in the figure, the electronic device described in the embodiment of the present invention mainly includes a central processing unit 1 , a memory 2 , a switch unit 3 , a switch unit 4 and an upgrade control subsystem 5 . Each component is described in detail below.

中央处理器1,通过地址总线和数据总线实现对所述存储器2的地址访问和数据读取等操作,与现有技术相同,在此不再赘述。The central processing unit 1 implements operations such as address access and data reading to the memory 2 through an address bus and a data bus, which are the same as those in the prior art, and will not be repeated here.

存储器2,设置有BIOS程序存储区A和BIOS程序存储区B,所述BIOS程序存储区A和BIOS程序存储区B均用于存储用于引导设备启动的BIOS程序。The memory 2 is provided with a BIOS program storage area A and a BIOS program storage area B, and the BIOS program storage area A and the BIOS program storage area B are both used to store the BIOS program for booting the device.

此处,在具体实施时所述存储器2是掉电不丢失存储器,一般情况为EPROM(Electrically Erasable Programmable ROM,电可擦除可编程ROM)或FLASH ROM(闪存),为了简化设计,一般情况下,将所述BIOS程序存储区A和BIOS程序存储区B从所述存储器2的最低位开始依次设置,例如BIOS程序存储区的预设最大空间是512K时,所述BIOS程序存储区A的分区地址范围为0x0至0x03FFFF,所述BIOS程序存储区B的分区地址范围为0x040000至0x07FFFF,此时,对应于所述BIOS程序存储区A,所述中央处理器1的地址总线A18的输出为0,对应于所述BIOS程序存储区B,所述中央处理器1的地址总线A18的输出为1。另外,在具体实施时,所述BIOS程序存储区A和所述BIOS程序存储区B的分区地址分配是可以比较灵活的,例如,可以设置所述BIOS程序存储区A的分区地址范围为0x0至0x7FFFF,所述BIOS程序存储区B的分区地址范围为0x080000至0xFFFFF,此时,对应于所述BIOS程序存储区A,所述中央处理器1的地址总线A19的输出为0,对应于所述BIOS程序存储区B,所述中央处理器1的地址总线A19的输出为1。Here, during specific implementation, the memory 2 is a non-lost memory when power-off, generally EPROM (Electrically Erasable Programmable ROM, electrically erasable programmable ROM) or FLASH ROM (flash memory), in order to simplify the design, generally , setting the BIOS program storage area A and the BIOS program storage area B sequentially from the lowest bit of the memory 2, for example, when the preset maximum space of the BIOS program storage area is 512K, the partition of the BIOS program storage area A The address range is 0x0 to 0x03FFFF, and the partition address range of the BIOS program storage area B is 0x040000 to 0x07FFFF. At this time, corresponding to the BIOS program storage area A, the output of the address bus A18 of the central processing unit 1 is 0 , corresponding to the BIOS program storage area B, the output of the address bus A18 of the central processing unit 1 is 1. In addition, during specific implementation, the partition address allocation of the BIOS program storage area A and the BIOS program storage area B can be more flexible. For example, the partition address range of the BIOS program storage area A can be set to 0x0 to 0x7FFFF, the partition address range of the BIOS program storage area B is 0x080000 to 0xFFFFF, at this time, corresponding to the BIOS program storage area A, the output of the address bus A19 of the central processing unit 1 is 0, corresponding to the In the BIOS program storage area B, the output of the address bus A19 of the CPU 1 is 1.

BIOS切换单元4,用于在设备上电或设备复位时,触发设备从所述存储器2中的一个BIOS程序存储区切换到从另一个BIOS程序存储区引导设备启动。The BIOS switching unit 4 is configured to trigger the device to switch from one BIOS program storage area in the memory 2 to booting the device from another BIOS program storage area when the device is powered on or the device is reset.

开关单元3,用于在设备开机上电或设备复位时,断开所述中央处理器1至所述存储器2的分区地址线,以及用于在设备成功启动后,导通所述分区地址线。下面对所述切换单元4和所述开关单元3进行详细描述。The switch unit 3 is used to disconnect the partition address line from the central processing unit 1 to the memory 2 when the device is turned on or reset, and is used to turn on the partition address line after the device is successfully started . The switching unit 4 and the switching unit 3 will be described in detail below.

所述BIOS切换单元4具有第一输出接脚和第二输出接脚,在设备上电重置或设备复位(例如设备启动超时,硬件看门狗电路复位设备)时,所述第一输出接脚的输出状态为使能信号输出状态,所述使能信号用于控制所述开关单元3断开所述中央处理器1至所述存储器2的分区地址线;在设备成功启动后,所述第一输出接脚的输出状态为禁止使能信号输出状态,所述禁止使能信号用于控制所述开关单元3导通所述中央处理器1至所述存储器2的分区地址线;所述第二输出接脚的输出状态包括两个与所述各个BIOS程序存储区对应的地址输出状态,在设备上电重置或设备复位时,触发所述第二输出接脚的输出状态由所述两个地址输出状态中的一个地址输出状态切换到另一个地址输出状态。The BIOS switching unit 4 has a first output pin and a second output pin. When the device is powered on and reset or the device is reset (for example, the device starts overtime, and the hardware watchdog circuit resets the device), the first output pin The output state of the pin is the output state of the enable signal, and the enable signal is used to control the switch unit 3 to disconnect the partition address line from the central processing unit 1 to the memory 2; after the device is successfully started, the The output state of the first output pin is the output state of the prohibition enable signal, and the prohibition enable signal is used to control the switch unit 3 to turn on the partition address lines from the central processing unit 1 to the memory 2; The output state of the second output pin includes two address output states corresponding to the respective BIOS program storage areas. When the device is powered on or reset, the output state of the second output pin is triggered by the One of the two address output states switches to the other address output state.

所述分区地址线为所述中央处理器1与所述存储器2之间多根数据总线中的一根,所述分区地址线的逻辑输出状态(0或1)可决定所述中央处理器1从所述存储器2读取的分区地址范围。例如BIOS程序存储区的预设最大空间是512K时,所述BIOS程序存储区A的分区地址范围为0x0至0x03FFFF,所述BIOS程序存储区B的分区地址范围为0x040000至0x07FFFF,此时,对应于所述BIOS程序存储区A,所述中央处理器的地址总线A18的输出为0,对应于所述BIOS程序存储区B,所述中央处理器1的地址总线A18的输出为1,所述地址总线A18即为所述分区地址线。The partition address line is one of multiple data buses between the central processing unit 1 and the memory 2, and the logic output state (0 or 1) of the partition address line can determine the central processing unit 1 The partition address range to read from the memory 2. For example, when the preset maximum space of the BIOS program storage area is 512K, the partition address range of the BIOS program storage area A is 0x0 to 0x03FFFF, and the partition address range of the BIOS program storage area B is 0x040000 to 0x07FFFF. At this time, the corresponding In the BIOS program storage area A, the output of the address bus A18 of the central processing unit is 0, corresponding to the BIOS program storage area B, the output of the address bus A18 of the central processing unit 1 is 1, and the output of the address bus A18 of the central processing unit 1 is 1. The address bus A18 is the partition address line.

下面以本发明实施例的电子设备中所述存储器2中的所述BIOS程序存储区A和BIOS程序存储区B从所述存储器2的最低位开始依次设置,且所述BIOS程序存储区的预设最大空间为512K时,对所述切换单元4、所述开关单元3、以及所述存储器2进行进一步详细说明。在具体实施例时,所述切换单元4为可编程硬件逻辑电路,如CPLD(complex programmable logic devices,复杂可编程逻辑器件),所述开关单元3为硬件逻辑电路,如244逻辑驱动电路,其主要功能等价于一可控开关电路,即其输入与输出端的导通状态受控于使能端的输入状态,所述切换单元4的第一输出接脚与所述开关单元3的使能端连接。当中央处理器2读取所述BIOS程序存储区A(也即在所述存储器2的地址范围为0x0至0x3FFFF的存储分区)时,所述中央处理器1的地址总线A18的输出为0,当中央处理器2读取所述BIOS程序存储区B(也即在所述存储器2的地址范围为0x040000至0x07FFFF的存储分区)时,所述中央处理器1的地址总线A18的输出为1,在本发明实施例中,在设备上电至成功启动时间段内,所述切换单元4的所述第一输出接脚输出使能信号控制所述开关单元3断开所述中央处理器1至所述存储器2的地址总线A18(当所述开关单元的使能端为低电平导通,高电平断开时,所述使能信号为高电平信号),所述切换单元4的所述第二接脚包括两个地址输出状态,所述第二接脚连接于所述存储器2中的地址总线A18输入端。当所述第二接脚输出为0时,所述中央处理器1从所述存储器2中的BIOS程序存储区A中读取用于引导系统启动的BIOS程序;当所述第二接脚输出为1时,所述中央处理器1从所述存储器2中的BIOS程序存储区B中读取用于引导系统启动的BIOS程序。当设备上电重置或者设备发生复位(看门狗电路发出复位信号)时,触发所述切换单元4的所述第二输出接脚的地址输出状态在0和1之间进行切换,由于所述切换单元4为可编程硬件逻辑电路,如CPLD(complex programmable logic devices,复杂可编程逻辑器件),其自身状态的循环切换不需要软件控制,当所述BIOS程序存储区A和BIOS程序存储区B中之一不可用时(如感染病毒、升级失败等均可能导致相应的BIOS程序存储区不能成功引导系统启动),通过硬件复位触发切换单元4的所述第二接脚的地址输出状态的切换,从而跳转到另一BIOS程序存储区引导系统启动。在本发明实施例中,当设备成功启动后,为了保证设备正常运行时CPU的地址总线不受干扰,所述中央处理器1通过执行软件程序控制所述切换单元4的所述第一接脚的输出状态为禁止使能信号输出状态,通过所述禁止使能信号控制所述开关单元3导通所述中央处理器1至所述存储器的地址总线A18(当所述开关单元的使能端为低电平导通,高电平断开时,所述禁止使能信号为低电平信号),相应地,所述中央处理器1通过执行软件程序控制第二接脚的输出状态为高阻态。The BIOS program storage area A and the BIOS program storage area B in the memory 2 in the electronic device according to the embodiment of the present invention are set sequentially from the lowest bit of the memory 2, and the preset of the BIOS program storage area Assuming that the maximum space is 512K, the switching unit 4, the switching unit 3, and the memory 2 will be further described in detail. In a specific embodiment, the switch unit 4 is a programmable hardware logic circuit, such as CPLD (complex programmable logic devices, complex programmable logic devices), and the switch unit 3 is a hardware logic circuit, such as a 244 logic drive circuit, which The main function is equivalent to a controllable switch circuit, that is, the conduction state of its input and output terminals is controlled by the input state of the enabling terminal, and the first output pin of the switching unit 4 is connected to the enabling terminal of the switching unit 3 connect. When the central processing unit 2 reads the BIOS program storage area A (that is, the storage partition whose address range is 0x0 to 0x3FFFF in the memory 2), the output of the address bus A18 of the central processing unit 1 is 0, When the central processing unit 2 reads the BIOS program storage area B (that is, the storage partition whose address range is 0x040000 to 0x07FFFF in the memory 2), the output of the address bus A18 of the central processing unit 1 is 1, In the embodiment of the present invention, during the time period from when the device is powered on to when it is successfully started, the first output pin of the switching unit 4 outputs an enabling signal to control the switching unit 3 to disconnect the central processing unit 1 to The address bus A18 of the memory 2 (when the enable end of the switch unit is turned on at a low level and turned off at a high level, the enable signal is a high level signal), the switch unit 4 The second pin includes two address output states, and the second pin is connected to the input end of the address bus A18 in the memory 2 . When the output of the second pin is 0, the central processing unit 1 reads the BIOS program for booting the system from the BIOS program storage area A in the memory 2; when the output of the second pin When it is 1, the CPU 1 reads the BIOS program for booting the system from the BIOS program storage area B in the memory 2 . When the device is powered on and reset or the device is reset (the watchdog circuit sends a reset signal), the address output state of the second output pin of the switching unit 4 is triggered to switch between 0 and 1, because the The switching unit 4 is a programmable hardware logic circuit, such as CPLD (complex programmable logic devices, complex programmable logic devices), and the cycle switching of its own state does not need software control. When the BIOS program storage area A and the BIOS program storage area When one of B is unavailable (such as virus infection, upgrade failure, etc. may cause the corresponding BIOS program storage area to fail to boot the system successfully), the switching of the address output state of the second pin of the switching unit 4 is triggered by hardware reset , thereby jumping to another BIOS program storage area to boot the system. In the embodiment of the present invention, after the device is successfully started, in order to ensure that the address bus of the CPU is not disturbed when the device is running normally, the central processing unit 1 controls the first pin of the switching unit 4 by executing a software program The output state of the output state is the output state of the prohibition enable signal, and the switch unit 3 is controlled by the prohibition enable signal to conduct the address bus A18 from the central processing unit 1 to the memory (when the enable terminal of the switch unit is low-level conduction, and when high-level is disconnected, the prohibition enabling signal is a low-level signal), correspondingly, the central processing unit 1 controls the output state of the second pin to be high by executing a software program resistance state.

在具体实施例中,所述切换单元4包括一启动区标志寄存器,其作用为将所述切换单元的所述第二接脚的输出状态保存,用于提供给软件识别当前启动区。In a specific embodiment, the switching unit 4 includes a boot area flag register, which is used to save the output state of the second pin of the switching unit for providing software to identify the current boot area.

升级控制子系统5,本发明实施例所述的升级控制子系统5主要包括:Upgrade control subsystem 5, the upgrade control subsystem 5 described in the embodiment of the present invention mainly includes:

第一加载单元51,用于当对设备进行BIOS升级时,将用于升级的BIOS程序加载到当前引导设备启动的BIOS程序存储区之外的另一BIOS程序存储区。The first loading unit 51 is configured to load the BIOS program used for upgrading to another BIOS program storage area other than the BIOS program storage area activated by the current boot device when performing BIOS upgrade on the device.

此处,当当前引导设备启动的BIOS程序存储区为BIOS程序存储区A时,将用于升级的BIOS程序加载到BIOS程序存储区B;当当前引导设备启动的BIOS程序存储区为BIOS程序存储区B时,将用于升级的BIOS程序加载到BIOS程序存储区A。所述用于升级的BIOS程序可以是网络在线升级检测并下载到的BIOS程序文件。为了描述方便,后续描述将用BIOS更新区表示加载BIOS新更新程序的BIOS程序存储区。Here, when the BIOS program storage area that the current boot device starts is the BIOS program storage area A, the BIOS program for upgrading is loaded into the BIOS program storage area B; when the BIOS program storage area that the current boot device starts is the BIOS program storage area When area B is selected, the BIOS program used for upgrading is loaded into BIOS program storage area A. The BIOS program used for upgrading may be a BIOS program file that is detected and downloaded for online network upgrade. For the convenience of description, the subsequent description will use the BIOS update area to represent the BIOS program storage area where the new BIOS update program is loaded.

判断单元52,当设备重新启动成功后,判断重新启动时用于引导设备启动的BIOS程序存储区是否为所述另一BIOS程序存储区并生成相应的判断结果。The judging unit 52, after the device restarts successfully, judges whether the BIOS program storage area used to boot the device when restarting is the other BIOS program storage area and generates a corresponding judgment result.

此处,在设备重新启动上电重置时,所述切换单元4的所述第二输出接脚的地址输出状态发生跳转,例如,假定在设备重新启动上电之前设备的当前BIOS引导区为BIOS程序存储区A(此时,BIOS更新区为BIOS程序存储区B),相应的所述切换单元4的所述第二输出接脚的输出为0,在设备上电重置时,触发所述切换单元4的所述第二输出接脚的输出跳转为1,实现了所述中央处理器1从BIOS程序存储区B读取BIOS程序引导设备启动。Here, when the device restarts and powers on and resets, the address output state of the second output pin of the switching unit 4 jumps, for example, assuming that the current BIOS boot area of the device before the device is restarted and powered on is the BIOS program storage area A (at this time, the BIOS update area is the BIOS program storage area B), the output of the corresponding second output pin of the switching unit 4 is 0, and when the device is powered on and reset, trigger The output of the second output pin of the switching unit 4 jumps to 1, which realizes that the central processing unit 1 reads the BIOS program from the BIOS program storage area B to boot the device.

第二加载单元53,用于当所述判断单元的判断结果为是时,将所述重新启动时用于引导设备启动的BIOS程序存储区中的BIOS程序加载到该BIOS程序存储区之外的另一BIOS程序存储区。The second loading unit 53 is used to load the BIOS program in the BIOS program storage area used for boot device startup to the BIOS program storage area outside the BIOS program storage area when the judging result of the judging unit is yes. Another BIOS program storage area.

升级结果输出单元54,用于在所述判断单元判断结果为是时,输出BIOS升级成功提示信息,在所述判断单元判断结果为否时,输出BIOS升级不成功提示信息。The upgrade result output unit 54 is configured to output a prompt message of BIOS upgrade success when the judgment result of the judgment unit is Yes, and output a prompt message of unsuccessful BIOS upgrade when the judgment result of the judgment unit is No.

参考图2,是本发明实施例的一种启动方法的流程示意图。如图所示本发明实施例所述的启动方法主要包括以下步骤:Referring to FIG. 2 , it is a schematic flow chart of a startup method according to an embodiment of the present invention. As shown in the figure, the starting method described in the embodiment of the present invention mainly includes the following steps:

步骤s201,设置两个BIOS程序存储区。Step s201, setting two BIOS program storage areas.

此处,所述BIOS程序存储区用于存储引导设备启动的BIOS程序。一般情况下,所述两个BIOS程序存储区设置在同一掉电不丢失存储器中,如EPROM(Electrically Erasable Programmable ROM,电可擦除可编程ROM)或FLASH ROM(闪存)。一般情况下,将所述两个BIOS程序存储区从所述掉电不丢失存储器的最低位开始依次设置,例如BIOS程序存储区的预设最大空间是512K时,为了便于描述,将所述两个BIOS程序存储区命名为BIOS程序存储区A和BIOS程序存储区B,所述BIOS程序存储区A的分区地址范围为0x0至0x03FFFF,所述BIOS程序存储区B的分区地址范围为0x040000至0x07FFFF,此时,对应于所述BIOS程序存储区A,设备CPU的地址总线A18的输出为0,对应于所述BIOS程序存储区B,设备CPU的地址总线A18的输出为1。另外,在具体实施时,所述BIOS程序存储区A和所述BIOS程序存储区B的分区地址分配是可以比较灵活的,例如,可以设置所述BIOS程序存储区A的分区地址范围为0x0至0x7FFFF,所述BIOS程序存储区B的分区地址范围为0x080000至0xFFFFF,此时,对应于所述BIOS程序存储区A,设备CPU的地址总线A19的输出为0,对应于所述BIOS程序存储区B,设备CPU的地址总线A19的输出为1。Here, the BIOS program storage area is used to store the BIOS program started by the boot device. In general, the two BIOS program storage areas are set in the same non-losable memory upon power failure, such as EPROM (Electrically Erasable Programmable ROM, Electrically Erasable Programmable ROM) or FLASH ROM (flash memory). Generally, the two BIOS program storage areas are set sequentially starting from the lowest bit of the non-lost memory. For example, when the preset maximum space of the BIOS program storage area is 512K, for the convenience of description, the two The two BIOS program storage areas are named BIOS program storage area A and BIOS program storage area B, the partition address range of the BIOS program storage area A is 0x0 to 0x03FFFF, and the partition address range of the BIOS program storage area B is 0x040000 to 0x07FFFF , at this time, corresponding to the BIOS program storage area A, the output of the address bus A18 of the device CPU is 0, and corresponding to the BIOS program storage area B, the output of the address bus A18 of the device CPU is 1. In addition, during specific implementation, the partition address allocation of the BIOS program storage area A and the BIOS program storage area B can be more flexible. For example, the partition address range of the BIOS program storage area A can be set to 0x0 to 0x7FFFF, the partition address range of the BIOS program storage area B is 0x080000 to 0xFFFFF, at this time, corresponding to the BIOS program storage area A, the output of the address bus A19 of the device CPU is 0, corresponding to the BIOS program storage area B, the output of the address bus A19 of the device CPU is 1.

步骤s202,设备上电时,以第一BIOS程序存储区引导设备启动。Step s202, when the device is powered on, boot the device with the first BIOS program storage area to start.

此处,当设备上电时,硬件逻辑电路控制设备CPU从所述两个BIOS程序存储区中之一启动。Here, when the device is powered on, the hardware logic circuit controls the CPU of the device to start from one of the two BIOS program storage areas.

步骤s203,如果启动不成功或设备重新上电,则以第二BIOS程序存储区引导设备启动。Step s203, if the startup is unsuccessful or the device is powered on again, boot the device with the second BIOS program storage area.

此处,具体实现时,通过硬件逻辑电路触发设备从所述第一BIOS程序存储区跳转到以第二BIOS程序存储区引导设备启动。Here, during specific implementation, the hardware logic circuit triggers the device to jump from the first BIOS program storage area to booting the device with the second BIOS program storage area.

步骤s204,设备成功启动后,将所述第二BIOS程序存储区中的BIOS程序加载到所述第一BIOS程序存储区。Step s204, after the device is successfully started, load the BIOS program in the second BIOS program storage area to the first BIOS program storage area.

此处,由于升级失败、病毒感染等原因均可能会导致本发明实施例所述的两个BIOS程序存储区中的一个BIOS程序存储区不可用(也即不能引导设备正常启动),如果在所述步骤s202中,所述第一BIOS程序存储区不能引导设备成功启动,启动超时时,看门狗硬件电路将发出复位信号,通过控制硬件逻辑电路的地址输出状态触发设备从第一BIOS程序存储区切换到第二BIOS程序存储区,以第二BIOS程序存储区引导设备启动(看门狗电路的复位信号触发硬件逻辑电路的地址输出状态在0和1之间进行切换),本发明实施例所述的硬件逻辑电路的地址输出状态的切换是不需要通过执行软件实现控制的,从而保证在设备成功启动前可切换到相应的可用BIOS程序存储区引导设备启动(设备在启动前是无法执行软件的)。当设备从所述第二BIOS程序存储区成功启动后,将所述第二BIOS程序存储区中的BIOS程序复制加载到所述第一BIOS程序存储区,从而保证设备以所述两个BIOS程序存储区中的任一个引导设备启动。Here, one of the two BIOS program storage areas described in the embodiment of the present invention may be unavailable due to upgrade failure, virus infection, etc. (that is, the device cannot be booted normally). In step s202, the first BIOS program storage area cannot boot the device successfully, and when the startup timeout occurs, the watchdog hardware circuit will send a reset signal, and the device is triggered from the first BIOS program storage by controlling the address output state of the hardware logic circuit. The area is switched to the second BIOS program storage area, and the boot device is started with the second BIOS program storage area (the reset signal of the watchdog circuit triggers the address output state of the hardware logic circuit to switch between 0 and 1), the embodiment of the present invention The switching of the address output state of the hardware logic circuit does not need to be controlled by executing software, so as to ensure that the device can be switched to the corresponding available BIOS program storage area to boot the device before the device is successfully started (the device cannot be executed before starting) software). After the device is successfully started from the second BIOS program storage area, copy and load the BIOS program in the second BIOS program storage area to the first BIOS program storage area, thereby ensuring that the device uses the two BIOS programs Any boot device in the storage area starts.

在本发明实施例所述的启动方法的基础上,本发明实施例还提供了一种BIOS升级方法。On the basis of the starting method described in the embodiment of the present invention, the embodiment of the present invention also provides a BIOS upgrade method.

参考图3,是本发明实施例的BIOS升级方法中的BIOS程序加载方法流程示意图。如图所示该BIOS程序加载方法主要包括以下步骤:Referring to FIG. 3 , it is a schematic flowchart of a BIOS program loading method in the BIOS upgrading method according to an embodiment of the present invention. As shown in the figure, the BIOS program loading method mainly includes the following steps:

步骤s301,设置两个BIOS程序存储区。Step s301, setting two BIOS program storage areas.

此处,所述两个BIOS程序存储区的设置方法以及功能与所述步骤s201中相同,在此不再赘述。Here, the setting methods and functions of the two BIOS program storage areas are the same as those in step s201, and will not be repeated here.

步骤s302,设备上电时,以第一BIOS程序存储区引导设备启动。Step s302, when the device is powered on, boot the device with the first BIOS program storage area to start.

此处,所述第一BIOS程序存储区为设备当前启动引导区,也即设备在上电后,在硬件逻辑电路的跳转控制下,设备CPU从该BIOS程序存储区中读取BIOS程序引导设备启动。在本发明实施例具体实现时,硬件逻辑提供启动区标志寄存器,用于保存设备当前启动区标记,具体实现时,例如,BIOS程序存储区A对应的硬件逻辑的地址输出状态为0(对应存储器的分区地址为0x0至0x03FFFF),BIOS程序存储区B对应的硬件逻辑的地址输出状态为1(对应存储器的分区地址为0x040000至0x07FFFF),此时,硬件逻辑电路通过提供启动区标志寄存器将相应的地址输出状态保存(0或1)。通过读取所述启动区标志寄存器中的地址输出状态,即可区分设备当前启动引导区和另一BIOS程序存储区。Here, the first BIOS program storage area is the current startup boot area of the device, that is, after the device is powered on, under the jump control of the hardware logic circuit, the device CPU reads the BIOS program boot area from the BIOS program storage area. The device starts up. When the embodiment of the present invention is implemented, the hardware logic provides a boot area flag register for storing the current boot area flag of the device. During specific implementation, for example, the address output state of the hardware logic corresponding to the BIOS program storage area A is 0 (corresponding The address of the corresponding partition of the BIOS program storage area B is 0x0 to 0x03FFFF), and the address output state of the hardware logic corresponding to the BIOS program storage area is 1 (the address of the corresponding memory partition is 0x040000 to 0x07FFFF). The address of the output state is saved (0 or 1). By reading the address output state in the boot area flag register, the current boot boot area of the device can be distinguished from another BIOS program storage area.

步骤s303,设备启动成功后,将用于升级的BIOS程序加载到第二BIOS程序存储区。In step s303, after the device is started successfully, the BIOS program for upgrading is loaded into the second BIOS program storage area.

此处,所述第二BIOS存储区为所述两个BIOS程序存储区中所述设备当前启动引导区之外的另一BIOS程序存储区。Here, the second BIOS storage area is another BIOS program storage area in the two BIOS program storage areas other than the device's current startup boot area.

步骤s304,设置更新区标识信息并将设置更新区标识信息保存。Step s304, setting the update area identification information and saving the set update area identification information.

此处,在一具体实施例中,所述更新标识信息包括更新标志信息以及更新区标记信息,所述更新标志信息用于反映是否有对BIOS程序进行升级更新,如在该步骤s304中设置更新标志信息为有效,所述更新区标记信息用于标记被更新的BIOS程序存储区。Here, in a specific embodiment, the update identification information includes update flag information and update area flag information, and the update flag information is used to reflect whether there is an upgrade update to the BIOS program, such as setting the update in step s304 The flag information is valid, and the update area flag information is used to mark the updated BIOS program storage area.

通过本发明实施例的BIOS升级方法的BIOS程序加载流程,只更新了所述设置的两个BIOS程序存储区中的所述第二BIOS程序存储区(也即非当前引导启动区)中的BIOS程序,并且,所述第二BIOS程序存储区中新加载的BIOS更新程序是否有效并不确定,由于BIOS程序只有在设备启动时才会被调用执行,如果设备能以所述第二BIOS程序存储区引导启动,则表示升级加载的BIOS程序是有效的,说明升级成功,如果设备不能以所述第二BIOS程序存储区引导成功启动(硬件复位,将触发跳转到以所述第一BIOS程序存储区引导设备启动),则说明升级不成功。下面通过实施例描述,对设备重新启动后的BIOS引导启动方法进行详细描述。Through the BIOS program loading process of the BIOS upgrade method of the embodiment of the present invention, only the BIOS in the second BIOS program storage area (that is, not the current boot area) of the two BIOS program storage areas set has been updated. program, and whether the newly loaded BIOS update program in the second BIOS program storage area is valid is uncertain, because the BIOS program will only be called for execution when the device is started, if the device can be stored with the second BIOS program If the device boots from the second BIOS program storage area, it means that the BIOS program loaded by the upgrade is valid, indicating that the upgrade is successful. memory area boot device starts), it means that the upgrade is not successful. The following describes in detail the method for booting and starting the BIOS after the device is restarted through the description of the embodiments.

参考图4,是本发明实施例的BIOS升级方法中的BIOS引导启动方法流程示意图。如图所示该BIOS引导启动方法主要包括以下步骤:Referring to FIG. 4 , it is a schematic flowchart of a BIOS booting and starting method in a BIOS upgrading method according to an embodiment of the present invention. As shown in the figure, the BIOS booting method mainly includes the following steps:

步骤s401,设备上电启动。In step s401, the device is powered on and started.

步骤s402,禁止逻辑地址重定向。Step s402, prohibit logical address redirection.

此处,所述禁止逻辑地址重定向是指设备启动成功后,设备CPU通过执行软件程序控制硬件逻辑电路,导通CPU与BIOS程序存储器之间在设备启动时被阻断的地址线(如地址总线A18),并且硬件逻辑电路对BIOS存储器的地址输出状态设置为高阻态,从而保证设备正常运行时,CPU对存储器的正常地址访问以及数据读取等操作。Here, the prohibition of logical address redirection means that after the device starts successfully, the CPU of the device controls the hardware logic circuit by executing a software program, and turns on the address line (such as address line) blocked when the device starts between the CPU and the BIOS program memory. Bus A18), and the hardware logic circuit sets the address output state of the BIOS memory to a high-impedance state, thereby ensuring that the CPU can access the normal address of the memory and read data when the device is running normally.

步骤s403,读取更新标志信息。Step s403, read update flag information.

此处,所述更新标志信息用于反映是否有对BIOS程序进行升级更新。Here, the update flag information is used to reflect whether the BIOS program is updated or not.

步骤s404,判断是否有更新,如果判断结果为是,则执行步骤404,否则,则结束处理。Step s404, judging whether there is an update, if the judging result is yes, go to step 404, otherwise, end the process.

此处,当更新标志信息有效时,则说明BIOS程序有更新,否则,说明BIOS程序没有更新。Here, when the update flag information is valid, it means that the BIOS program has been updated; otherwise, it means that the BIOS program has not been updated.

步骤s405,读取更新区标记信息。Step s405, read update area tag information.

此处,通过读取更新区标记信息,系统可获知所述两个BIOS程序存储器中具体哪一个被升级更新。Here, by reading the update area tag information, the system can know which of the two BIOS program memories is updated.

步骤s406,判断当前启动区是否为更新区,如果判断结果为是,则执行步骤s407,否则,执行步骤s408。Step s406, judging whether the current boot area is an update area, if the judging result is yes, go to step s407, otherwise go to step s408.

此处,由于在设备上电时,硬件逻辑电路通过地址输出状态的切换控制BIOS启动区的跳转,因此如果当前启动区(也即该次设备成功启动时,用于引导设备启动的BIOS程序存储区)为更新区,则说明被升级更新BIOS程序的BIOS程序存储区能成功引导设备启动,表示升级成功;反之,如果当前启动区不是更新区,则设备实际引导设备启动的BIOS程序存储区仍然是存有原BIOS程序的BIOS程序存储区,则说明被升级更新BIOS程序的BIOS程序存储区能成功引导设备启动(设备上电跳转到更新区后,以更新区引导设备启动失败,启动超时,看门狗复位信号复位硬件逻辑电路,触发到以保存有原BIOS程序的BIOS程序存储区引导设备启动),表示升级失败。Here, since the hardware logic circuit controls the jump of the BIOS boot area through the switching of the address output state when the device is powered on, if the current boot area (that is, when the secondary device is successfully started), the BIOS program used to boot the device starts storage area) is the update area, it means that the BIOS program storage area of the updated BIOS program can successfully boot the device, indicating that the upgrade is successful; otherwise, if the current boot area is not the update area, the device actually boots the BIOS program storage area that the device starts If the original BIOS program is still stored in the BIOS program storage area, it means that the BIOS program storage area of the updated BIOS program can successfully boot the device (after the device is powered on and jumps to the update area, the boot device fails to boot from the update area. Overtime, the watchdog reset signal resets the hardware logic circuit, triggers to boot the device with the BIOS program storage area that preserves the original BIOS program), and indicates that the upgrade fails.

步骤s407,将当前启动区的中的BIOS程序复制加载到另一BIOS程序存储区。Step s407, copy and load the BIOS program in the current boot area to another BIOS program storage area.

步骤s408,提示升级未成功。Step s408, prompting that the upgrade is not successful.

步骤s409,设置更新标记信息为无效。Step s409, setting the update flag information as invalid.

此处,该步骤s409的目的是保证在不对设备BIOS升级时,设备正常运行和使用。Here, the purpose of step s409 is to ensure that the device runs and uses normally when the BIOS of the device is not upgraded.

步骤s410,结束处理。Step s410, end processing.

本发明实施例的BIOS升级方法通过设置两个BIOS程序存储区,在设备正常运行时,将用于升级的BIOS程序加载到当前用于引导设备启动的第一BIOS程序存储区外的第二BIOS程序存储区,当设备再次上电时,通过硬件逻辑电路触发设备跳转到以所述第二BIOS程序存储区引导设备启动,如果引导不成功,则再次通过硬件逻辑电路触发设备跳转到以保存有原BIOS程序的第一BIOS程序存储区引导设备启动,从而避免了在升级过程中发生升级失败,比如BIOS升级程序出现异常或用于升级的BIOS程序本身存在的缺陷引起的失败,对设备产生的潜在风险,保证了设备无论BIOS升级成功还是失败均能正常启动,提高了BIOS升级的安全性。In the BIOS upgrade method of the embodiment of the present invention, by setting two BIOS program storage areas, when the device is running normally, the BIOS program for upgrading is loaded into the second BIOS outside the first BIOS program storage area currently used to boot the device. Program storage area, when the device is powered on again, the hardware logic circuit triggers the device to jump to the second BIOS program storage area to boot the device, if the boot is unsuccessful, the hardware logic circuit triggers the device to jump to the following The first BIOS program storage area that has the original BIOS program is stored to boot the device, thereby avoiding the upgrade failure during the upgrade process, such as failure caused by an abnormality in the BIOS upgrade program or a defect in the BIOS program used for upgrade itself, which is harmful to the device. The potential risks generated ensure that the device can start normally regardless of whether the BIOS upgrade succeeds or fails, and improves the security of the BIOS upgrade.

以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以作出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。The above is only a preferred embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications should also be It is regarded as the protection scope of the present invention.

Claims (6)

1、一种电子设备,该电子设备包括一中央处理器,其特征在于,还包括有存储器、开关单元、以及基本输入输出系统BIOS切换单元,其中:1. An electronic device, which includes a central processing unit, is characterized in that it also includes a memory, a switch unit, and a basic input and output system BIOS switching unit, wherein: 存储器,设置有两个BIOS程序存储区,所述BIOS存储区存储有用于引导电子设备启动的BIOS程序;The memory is provided with two BIOS program storage areas, and the BIOS storage area stores a BIOS program for booting the electronic device; BIOS切换单元,用于在电子设备上电或电子设备复位时,触发电子设备从所述存储器中的一个BIOS程序存储区切换到从另一个BIOS程序存储区引导电子设备启动;A BIOS switching unit, configured to trigger the electronic device to switch from one BIOS program storage area in the memory to booting the electronic device from another BIOS program storage area when the electronic device is powered on or the electronic device is reset; 开关单元,用于在电子设备开机上电或电子设备复位时,断开所述中央处理器至所述存储器的分区地址线,以及用于在电子设备成功启动后,导通所述分区地址线。The switch unit is used to disconnect the partition address line from the central processing unit to the memory when the electronic device is turned on or the electronic device is reset, and is used to turn on the partition address line after the electronic device is successfully started . 2、如权利要求1所述的电子设备,其特征在于,所述BIOS切换单元具有第一输出接脚和第二输出接脚,在电子设备上电或电子设备复位时,所述第一输出接脚的输出状态为使能信号输出状态,所述使能信号用于控制所述开关单元断开所述中央处理器至所述存储器的分区地址线;2. The electronic device according to claim 1, wherein the BIOS switching unit has a first output pin and a second output pin, and when the electronic device is powered on or the electronic device is reset, the first output pin The output state of the pin is an enable signal output state, and the enable signal is used to control the switch unit to disconnect the partition address line from the central processing unit to the memory; 在电子设备成功启动后,所述第一输出接脚的输出状态为禁止使能信号输出状态,所述禁止使能信号用于控制所述开关单元导通所述中央处理器至所述存储器的分区地址线;After the electronic device is successfully started, the output state of the first output pin is the output state of the prohibition enable signal, and the prohibition enable signal is used to control the switch unit to conduct the connection between the central processing unit and the memory. Partition address line; 所述第二输出接脚的输出状态包括两个与所述各个BIOS程序存储区对应的地址输出状态,在电子设备上电或电子设备复位时,触发所述第二输出接脚的输出状态由所述两个地址输出状态中的一个地址输出状态切换到另一个地址输出状态。The output state of the second output pin includes two address output states corresponding to the respective BIOS program storage areas. When the electronic device is powered on or the electronic device is reset, the output state of the second output pin is triggered by One address output state of the two address output states is switched to the other address output state. 3、如权利要求2所述的电子设备,其特征在于,在电子设备成功启动后,所述切换单元的第二输出接脚的输出状态为高阻态。3. The electronic device according to claim 2, wherein after the electronic device is successfully started, the output state of the second output pin of the switching unit is a high-impedance state. 4、如权利要求3所述的电子设备,其特征在于,所述BIOS切换单元为可编程逻辑电路。4. The electronic device according to claim 3, wherein the BIOS switching unit is a programmable logic circuit. 5、如权利要求1至4任一项所述的电子设备,其特征在于,还包括BIOS升级控制子系统,所述升级控制子系统包括:5. The electronic device according to any one of claims 1 to 4, further comprising a BIOS upgrade control subsystem, the upgrade control subsystem comprising: 第一加载单元,用于当对电子设备进行BIOS升级时,将用于升级的BIOS程序加载到当前引导电子设备启动的BIOS程序存储区之外的另一BIOS程序存储区;The first loading unit is used to load the BIOS program used for upgrading to another BIOS program storage area other than the BIOS program storage area currently booting the electronic equipment to start when the BIOS upgrade is performed on the electronic device; 判断单元,当电子设备重新启动成功后,判断重新启动时用于引导电子设备启动的BIOS程序存储区是否为所述另一BIOS程序存储区并生成相应的判断结果;The judging unit, after the electronic device restarts successfully, judges whether the BIOS program storage area used to guide the electronic device to start is the other BIOS program storage area when restarting, and generates a corresponding judgment result; 第二加载单元,用于当所述判断单元的判断结果为是时,将所述重新启动时用于引导电子设备启动的BIOS程序存储区中的BIOS程序加载到该BIOS程序存储区之外的另一BIOS程序存储区。The second loading unit is used to load the BIOS program in the BIOS program storage area used to guide the electronic device to start when the judgment result of the judgment unit is yes to the BIOS program storage area outside the BIOS program storage area when restarting. Another BIOS program storage area. 6、如权利要求5所述的电子设备,其特征在于,所述升级控制子系统还包括:6. The electronic device according to claim 5, wherein the upgrade control subsystem further comprises: 升级结果输出单元,用于在所述判断单元判断结果为是时,输出BIOS升级成功提示信息,在所述判断单元判断结果为否时,输出BIOS升级不成功提示信息。The upgrade result output unit is used to output the prompt information of BIOS upgrade success when the judgment result of the judgment unit is yes, and output the prompt information of unsuccessful BIOS upgrade when the judgment result of the judgment unit is no.
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Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101470613A (en) * 2007-12-28 2009-07-01 华硕电脑股份有限公司 Computer system and debugging method and starting method of basic input and output system thereof
CN101222373B (en) * 2008-01-29 2010-07-28 杭州华三通信技术有限公司 Multi-master control system and master control board starting method thereof
TWI414996B (en) 2008-04-14 2013-11-11 Asustek Comp Inc Computer system
TWI382346B (en) 2008-10-20 2013-01-11 Asustek Comp Inc Computer system with dual bios protection mechanism and control method of the same
CN101739261B (en) * 2008-11-10 2015-03-25 纬创资通股份有限公司 Switching system and switching method of basic input and output system
DE112009004563T5 (en) * 2009-04-29 2012-07-05 Hewlett-Packard Development Company, L.P. BIOS IMAGE ADMINISTRATOR
CN102467626A (en) * 2010-11-10 2012-05-23 鸿富锦精密工业(深圳)有限公司 Computer system data protection device and method
CN102486733B (en) * 2010-12-03 2015-10-21 中兴通讯股份有限公司 The upgrade method of boot and device
CN102567135B (en) * 2010-12-13 2015-04-29 联想(北京)有限公司 Refreshing/recovering method and electronic equipment
CN102637009A (en) * 2012-04-25 2012-08-15 山东省计算中心 Online programmable controller and implementation method thereof
CN103678018A (en) * 2012-09-04 2014-03-26 联想(北京)有限公司 Method and device for recovering data
CN106227568A (en) * 2012-11-09 2016-12-14 青岛海信移动通信技术股份有限公司 Terminal unit start, upgrade method and equipment
CN103077060A (en) * 2013-01-10 2013-05-01 中兴通讯股份有限公司 Method, device and system for switching master basic input/output system (BIOS) and spare BIOS
CN104182289A (en) * 2013-05-27 2014-12-03 英业达科技有限公司 System restoring method
CN104239078A (en) * 2013-06-14 2014-12-24 联想(北京)有限公司 Information processing method and electronic device
CN103500110A (en) * 2013-09-30 2014-01-08 Tcl通讯(宁波)有限公司 Mobile terminal and method for downloading system software thereof
CN104750564A (en) * 2013-12-27 2015-07-01 鸿富锦精密工业(武汉)有限公司 Computer system
CN105094875A (en) * 2014-05-19 2015-11-25 中兴通讯股份有限公司 Software upgrading method and device
JP6364983B2 (en) * 2014-06-10 2018-08-01 富士ゼロックス株式会社 Electronic device and program
US10282194B2 (en) * 2014-10-07 2019-05-07 Ford Global Technologies, Llc Methods and systems to update a vehicle computing system
CN104503791A (en) * 2014-12-18 2015-04-08 天津市天安怡和信息技术有限公司 Intelligent remote upgrading and maintaining method for remote self-contained equipment
CN104503810B (en) * 2015-01-08 2018-03-23 合肥联宝信息技术有限公司 The method and device of BIOS/firmware in more new computer system
CN106033365A (en) * 2015-03-18 2016-10-19 中兴通讯股份有限公司 Electronic device starting method and device
CN105159693A (en) * 2015-07-02 2015-12-16 浪潮(北京)电子信息产业有限公司 Method and apparatus for realizing server startup
CN105653313A (en) * 2015-12-14 2016-06-08 重庆川仪自动化股份有限公司 Program updating method and apparatus
CN105653405B (en) * 2015-12-31 2018-12-14 北京锐安科技有限公司 A kind of fault handling method and system of Generic Bootstrap
CN106325857B (en) * 2016-08-11 2019-09-20 迈普通信技术股份有限公司 A kind of electronic equipment and control method of electronic device
CN106776282A (en) * 2016-11-24 2017-05-31 华为技术有限公司 The abnormality eliminating method and device of a kind of bios program
CN106775863A (en) * 2016-12-09 2017-05-31 湖南长城银河科技有限公司 A kind of method of remote automatic upgrading BIOS
CN108196858A (en) * 2017-12-22 2018-06-22 天津麒麟信息技术有限公司 A kind of double BIOS systems and its implementation based on platform of soaring
US10445088B2 (en) * 2018-01-11 2019-10-15 Macronix International Co., Ltd. System boot code clone
TWI666556B (en) * 2018-03-27 2019-07-21 緯創資通股份有限公司 Electronic device and operating method thereof
CN108196868B (en) * 2018-03-27 2021-10-22 联想(北京)有限公司 BIOS (basic input output System) upgrading method and electronic equipment
CN109117196B (en) * 2018-08-16 2021-08-03 郑州云海信息技术有限公司 A dual BIOS boot and BIOS version comparison processing system
CN109062517A (en) * 2018-09-19 2018-12-21 郑州云海信息技术有限公司 A kind of firmware redundancy approach, device, equipment and medium
CN111142961B (en) * 2018-11-02 2022-12-27 佛山市顺德区顺达电脑厂有限公司 Basic input/output system setting method
CN109358885A (en) * 2018-12-03 2019-02-19 郑州云海信息技术有限公司 A method, system, device and readable storage medium for updating startup screen
CN110134425A (en) * 2019-05-20 2019-08-16 苏州沃联网络信息科技有限责任公司 Exempt from dismantling firmware upgrade method suitable for electronic tag
CN110399152A (en) * 2019-07-22 2019-11-01 浙江鸿泉车联网有限公司 A kind of device systems double copies upgrade method and device
CN111488161B (en) * 2020-04-02 2023-04-25 深圳宝新创科技股份有限公司 BIOS upgrading system
CN111857840B (en) * 2020-06-10 2023-10-27 新华三技术有限公司 BIOS (basic input output system) starting method and device
CN113312077B (en) * 2021-06-10 2025-03-14 华云敏视达雷达(北京)有限公司 A hardware circuit and program upgrade method for a transmission acquisition module of a phased array radar
CN114021139A (en) * 2021-10-14 2022-02-08 西安超越申泰信息科技有限公司 Remote BIOS (basic input output System) upgrading implementation method and system
CN115964063A (en) * 2022-11-15 2023-04-14 中国第一汽车股份有限公司 Motor controller CPLD program upgrading method and device, motor controller and vehicle
CN115729312B (en) * 2022-11-23 2026-03-10 珠海一微科技股份有限公司 Control system and chip for automatically switching processor clock
CN117632165A (en) * 2023-12-25 2024-03-01 龙芯中科(成都)技术有限公司 BIOS program programming method and device, electronic equipment and storage medium
CN118093056B (en) * 2024-04-24 2024-07-02 中电科申泰信息科技有限公司 Primary starting program starting method adopting self-adjusting starting medium technology
CN118916219A (en) * 2024-07-10 2024-11-08 云南保利天同水下装备科技有限公司 Main and standby code memory switching circuit and method for switching main and standby code memories
CN119473412A (en) * 2024-10-30 2025-02-18 上海兆芯集成电路股份有限公司 Control systems, motherboards and electronic equipment
CN119718472B (en) * 2025-02-27 2025-05-30 山东云海国创云计算装备产业创新中心有限公司 Chip firmware management method, device, computer program product and storage medium
CN120336235B (en) * 2025-06-18 2025-09-09 苏州元脑智能科技有限公司 Electronic device and signal processing method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100395713C (en) * 2002-04-23 2008-06-18 华硕电脑股份有限公司 Method and module for automatically repairing basic input output system element
CN1294488C (en) * 2003-12-31 2007-01-10 英业达股份有限公司 Power-on switching method of multi-processor computer system
CN100390737C (en) * 2005-01-25 2008-05-28 英业达股份有限公司 Method for automatically updating and backing up BIOS

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