BR102024025624A2 - MACHINE-READABLE DEVICE AND METHOD - Google Patents

Abstract

Methods and apparatus for selecting operating widths of implements for an agricultural vehicle are described. An exemplary apparatus includes at least one processor circuit for identifying a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, generating a first guidance line and a second guidance line for the second operation, calculating a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line, and selecting one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric.

Description

DESCRIPTION FIELD

[001] This description relates generally to agricultural vehicles and, more particularly, to methods and apparatus for selecting operational widths of implements for an agricultural vehicle.

FUNDAMENTALS

[002] Agricultural vehicles have become increasingly automated. Agricultural vehicles can semi-autonomously or fully autonomously drive and perform operations in fields using implements for planting, spraying, harvesting, fertilizing, row-forming/cultivation, etc. These autonomous agricultural vehicles include multiple sensors (e.g., Global Navigation Satellite Systems (GNSS), Global Positioning Systems (GPS), Light Detection and Ranging (LIDAR), Radio Range Finding (RADAR), Acoustic Navigation and Ranging (SONAR), telematics sensors, Computer Vision (CV) with mono cameras and/or stereo cameras, etc.) to help navigate without assistance, or with limited assistance, from human users.

SUMMARY

[003] An exemplary apparatus described herein includes at least one processor circuit for identifying a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width. The at least one processor circuit is for generating a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data. The at least one processor circuit is for calculating a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line. The at least one processor circuit is for selecting one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric.

[004] At least one exemplary non-transitory machine-readable medium described herein includes machine-readable instructions to cause at least one processor circuit to identify a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width. The machine-readable instructions must cause at least one processor circuit to generate a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data. The machine-readable instructions must cause at least one processor circuit to calculate a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line. Machine-readable instructions must cause at least one processor circuit to select one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric.

[005] An exemplary method described herein includes identifying a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width. The method further includes generating a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data. The method further includes calculating, by at least one processor circuit programmed by at least one instruction, a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line. The method further includes selecting, by one or more of the at least one processor circuit, one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric.

BRIEF DESCRIPTION OF THE DRAWINGS

[006] FIG. 1 is a schematic illustration of first and second exemplary vehicles utilizing exemplary implement selection circuitry in accordance with precepts of this disclosure.

[007] FIG. 2 is a block diagram of an exemplary implementation of the implement selection circuitry of FIG. 1.

[008] FIG. 3 illustrates an exemplary field in which a second exemplary operation is to be performed.

[009] FIG. 4A illustrates a first exemplary map that may be generated and/or produced for display by the exemplary implement selection circuitry of FIGS. 1 and/or 2.

[0010] FIG. 4B illustrates a second exemplary map that may be generated and/or produced for display by the exemplary implement selection circuitry of FIGS. 1 and/or 2.

[0011] FIG. 4C illustrates a third exemplary map that may be generated and/or produced for display by the exemplary implement selection circuitry of FIGS. 1 and/or 2.

[0012] FIG. 5 is a representative flowchart of exemplary machine-readable instructions and/or exemplary operations that may be executed, instantiated, and/or performed by the programmable circuitry to implement the implement selection circuitry of FIG. 2.

[0013] FIG. 6 is a block diagram of an exemplary processing platform including programmable circuitry structured to execute, instantiate, and/or carry out the exemplary machine-readable instructions and/or perform the exemplary operations of FIG. 5 to implement the implement selection circuitry of FIG. 2.

[0014] FIG. 7 is a block diagram of an exemplary implementation of the programmable circuitry of FIG. 6.

[0015] FIG. 8 is a block diagram of another exemplary implementation of the programmable circuitry of FIG. 6.

[0016] FIG. 9 is a block diagram of an exemplary software/firmware/instructions distribution platform (e.g., one or more servers) for distributing software, instructions, and/or firmware (e.g., corresponding to the exemplary machine-readable instructions of FIG. 5) to client devices associated with end-users and/or consumers (e.g., for license, sale, and/or use), resellers (e.g., for sale, resale, license, and/or sublicense), and/or original equipment manufacturers (OEMs) (e.g., for inclusion in products to be distributed, e.g., to resellers and/or to other end-users such as direct-purchase customers).

[0017] In general, the same reference numerals will be used throughout the drawings and accompanying written description to refer to the same or similar parts. The figures are not necessarily to scale. Instead, the thickness of layers or regions may be enlarged in the drawings. Although the figures show layers and regions with clear lines and contours, some or all of these lines and/or contours may be idealized. In reality, the contours and/or lines may be unobservable, blended, and/or irregular.

DETAILED DESCRIPTION

[0018] Automation of agricultural vehicles is commercially desirable because automation can improve the accuracy with which operations are performed, reduce operator fatigue, improve efficiency, and provide other benefits. Some automated vehicles include and/or are otherwise enabled for automation functionality, but the user may need to engage and/or disengage the automation functionality. For example, a user could switch a vehicle to an autonomous mode of operation, but the vehicle would not drive autonomously until the user pressed a button or flipped a switch to "engage" automation. As such, the vehicle may be referred to as being in a "standby" autonomous mode of operation when automation is enabled but not engaged, and in a "fully" autonomous mode of operation when automation is enabled and engaged. In both standby and fully autonomous modes, a user may be present within the vehicle.

[0019] Whether in standby autonomous mode or fully autonomous mode, autonomous vehicles include one or more controllers to ensure that the autonomous vehicles traverse terrain properly. In examples described herein, the autonomous vehicles follow guidance paths when in fully autonomous mode. A controller may have many different modes of operation, including an acquisition mode of operation and a tracking mode of operation. As used herein, "tracking," "tracking mode," "tracking mode of operation," and/or derivatives thereof refer to following and/or tracking a guidance path (e.g., in a fully autonomous mode). As used herein, "acquisition," "acquisition mode," "acquisition mode of operation," and/or derivatives thereof refer to operation when the vehicle is traveling to a guidance path, a path, and/or acquiring a position that is substantially similar (e.g., within one meter, within half a meter, within two meters, etc.) to a guidance path. The path that a vehicle takes or may take during acquisition mode is referred to herein as "an acquisition path" and "an acquisition line," among others.

[0020] Guidance paths (e.g., target paths) are used by a navigation and/or location device (e.g., a Global Positioning System (GPS) receiver) and a controller in tracking mode to steer a vehicle. In some examples, the guidance path includes curves, curved lines, etc., for the vehicle to follow when operating in a field. Conventional controllers, sometimes referred to as guidance systems, allow users of a vehicle to specify a guidance path for the vehicle in the cabin. Alternatively, some guidance systems can automatically select and/or generate the guidance path for the vehicle.

[0021] In some cases, an implement may be coupled to a vehicle to perform one or more operations (e.g., planting, spraying, harvesting, fertilizing, row forming/cultivating, etc.) in a field. For example, a first implement may be used to perform the first operation (e.g., planting), and a second implement may be used to perform a second operation (e.g., spraying) after the first operation. In some cases, the first implement and the second implement may be interchangeably coupled to a vehicle. For example, the first implement may be coupled to the vehicle to allow the vehicle to perform the first operation, then the first implement may be removed, and the second implement may be coupled to the vehicle to allow the vehicle to perform the second operation. Alternatively, in some cases, the first implement and the second implement may be coupled to different respective vehicles. For example, the first implement may be coupled to a first vehicle to allow the first vehicle to perform the first operation, and the second implement may be coupled to a second vehicle to allow the second vehicle to perform the second operation.

[0022] Different implements often have different operating widths, and differences between the operating widths of implements can complicate the determination of guidance paths for the vehicle. For example, if a twelve-row planter is used to plant crops following a series of guidance lines, following those same guidance lines when subsequently using a sixteen-row cultivator/side tillage equipment for a fertilization operation may result in crop rows that are not fertilized. Therefore, some guidance systems generate different guidance lines and/or adjust the guidance lines for a vehicle based on the operating width of the implement(s) to be attached to the vehicle. In some cases, because the vehicle has followed different guidance paths during previous operations in the same field, one or more of the vehicle's tires may run over and/or damage crop rows in the field. Such crop damage may reduce crop yield and/or reduce profits associated with growing crops in the field.

[0023] Examples described herein may reduce crop damage by selecting between different implement operating widths based on predicted crop damage metrics associated with the corresponding implements. For example, the implement selection circuitry described herein identifies crop row locations in a field based on exemplary location data from a prior, first, exemplary operation (e.g., planting, cultivating, etc.), where the first operation is performed by a vehicle following a series of guidance lines in the field. In some examples, the implement selection circuitry identifies one or more candidate implements that may be used to perform a second exemplary operation (e.g., spraying, harvesting, etc.) in the field, where the second operation is to be performed after the first operation. In some examples, the candidate implements correspond to respective different operating widths. In some examples, the implement selection circuitry generates exemplary candidate guidance lines for corresponding candidate implements based on the associated operating widths of the implements and the crop row locations. Additionally, the implement selection circuitry calculates and/or estimates exemplary crop damage metrics for the respective candidate guidance lines and/or the corresponding candidate implements. In some examples, the crop damage metric(s) for a candidate implement include(s) an amount (e.g., an area, a proportion, etc.) of crop expected to be damaged as a result of a vehicle traveling the candidate guidance line with the corresponding implement.

[0024] In some examples, the implement selection circuitry selects, based on crop damage metrics, the candidate implement(s) to perform the second operation in the field. For example, the implement selection circuitry may select the candidate implement(s) expected to result in less crop damage compared to the remaining available implement(s). In some examples, the implement selection circuitry selects the candidate implement(s) based on a tradeoff between predicted crop damage and one or more exemplary parameters associated with the corresponding candidate guidance line(s) (e.g., a length of the guidance line(s), a number of turns in the guidance line(s), a speed and/or duration to travel the guidance line(s), etc.). In some examples, the implement selection circuitry indicates, through an exemplary user interface, the selected implement(s) to an operator. Additionally, or alternatively, the implement selection circuitry may cause the user interface to present crop damage metrics for multiple of the candidate implements, and an operator may manually select the implement(s) for use in performing the second operation. Advantageously, by enabling an operator to select and/or utilize implements that reduce crop damage, examples described herein may improve the efficiency of one or more operations performed in a field. In particular, examples described herein may improve the yield and/or profit associated with the operation(s).

[0025] FIG. 1 is a schematic illustration of an exemplary environment 100 including first and second exemplary vehicles 102A, 102B utilizing an exemplary implement selection circuitry 104 in accordance with provisions of this disclosure. For example, the first vehicle 102A utilizes the first exemplary implement selection circuitry 104A, and the second vehicle 102B utilizes the second exemplary implement selection circuitry 104B. In this example, implement selection circuitry 104A, 104B is implemented locally on respective vehicles 102A, 102B, and is communicatively coupled to an exemplary network 106. In some examples, implement selection circuitry 104A, 104B may be implemented in a cloud-based environment and communicatively coupled to respective vehicles 102A, 102B via network 106. In some such examples, one of the first set of implement selection circuitry 104A, or the second set of implement selection circuitry 104B may be omitted, and a remaining one of the first set of implement selection circuitry 104A or the second set of implement selection circuitry 104B may be used for one or both of the vehicles 102A, 102B.

[0026] In the illustrated example of FIG. 1, the first vehicle 102A includes an exemplary Global Positioning System (GPS) receiver 108A, an exemplary user interface 110A, front wheels (one of which is shown by reference numeral 112A), and rear wheels (one of which is shown by reference numeral 114A). The second vehicle 102B includes an exemplary Global Positioning System (GPS) sensor 108B, an exemplary user interface 110B, front wheels (one of which is shown by reference numeral 112B), and rear wheels (one of which is shown by reference numeral 114B).

[0027] As illustrated and described herein, the structure and/or function of any of the implement selection circuitry 104B, the GPS sensor 108B, the user interface 110B, the front wheels (e.g., the front wheel 112B), and/or the rear wheels (e.g., the rear wheel 114B) of the second vehicle 102B may be the same as the corresponding component in the first vehicle 102A. Therefore, for example, the description and/or illustration associated with the first implement selection circuitry 104A of the first vehicle 102A may be considered to apply equally to the second implement selection circuitry 104B of the second vehicle 102B.

[0028] As used herein, when referring to "vehicle 102," it is to be understood that the description and/or illustration applies to both the first vehicle 102A and the second vehicle 102B. Similarly, when referring to any one or more of the components of either the first vehicle 102A or the second vehicle 102B, if a component is discussed (e.g., the implement selection circuitry 104, the GPS sensor 108, the user interface 110, the front wheel 112, the rear wheel 114, etc.), it is to be understood that the illustration and/or description applies to those respective parts of both the first vehicle 102A and the second vehicle 102B.

[0029] In the example illustrated in FIG. 1, the first vehicle 102A is a planter and the second vehicle 102B is a sprayer. However, the first vehicle 102A and/or the second vehicle 102B may be any type of vehicle (e.g., a tractor, front-end loader, combine harvester, cultivator, or any other suitable vehicle) configured to perform an operation in a field. In this example, a first exemplary implement 118A is coupled (e.g., detachably coupled) to the first vehicle 102A to enable the first vehicle 102A to perform a first exemplary operation (e.g., a planting operation) in a field. Additionally, a second exemplary implement 118B is coupled (e.g., detachably coupled) to the second vehicle 102B to enable the second vehicle 102B to perform a second exemplary operation (e.g., a spraying operation) in the field. In some examples, the second vehicle 102B performs the second operation after the first vehicle 102A performs the first operation. In some examples, one of the first vehicle 102A or the second vehicle 102B may be used to perform both the first and second operations. For example, the first implement 118A may be removed from the first vehicle 102A after the first vehicle 102A performs the first operation, and the second implement 118B may be coupled to the first vehicle 102A to allow the first vehicle 102A to perform the second operation.

[0030] In some examples, different implements may be coupled to vehicle 102 (e.g., first vehicle 102A and/or second vehicle 102B) to allow vehicle 102 to perform the first operation and/or the second operation. For example, first implement 118A and/or second implement 118B may be selected from a series of candidate implements (e.g., available implements), where different candidate implements may correspond to different operations and/or different operating widths (e.g., implement widths, implement attributes, etc.). In some examples, implement(s) 118A, 118B may be manually selected (e.g., by an operator) from the series of candidate implements. However, using different candidate implements may result in different amounts of crop damage during operation, and it may be difficult and/or impractical for an operator to accurately predict the amount of crop damage expected from different implements. As a result, manual selection of implement(s) may result in inefficiencies such as reduced profit and/or reduced yield associated with one or more operations.

[0031] In the illustrated example of FIG. 1, implement selection circuitry 104 is implemented by one(s) of exemplary vehicles 102A, 102B to facilitate selection of implement(s) for use in one or more operations in a field. For example, implement selection circuitry 104 of FIG. 1 may determine exemplary crop damage metrics for the respective one(s) of implements, where the crop damage metrics may include at least one of an area of crop damage and/or a proportion (e.g., a percentage) of the area of crop damage relative to an area of the field. In some examples, implement selection circuitry 104 generates, based on the operational width(s) of the implement(s), exemplary candidate guidance lines that may be traveled by vehicle 102 to perform operation(s) using the corresponding implement(s). In some examples, based on the candidate guidance lines and crop row locations in the field, implement selection circuitry 104 identifies regions of crop damage expected to result from vehicle 102 traveling the respective candidate guidance lines. In such examples, implement selection circuitry 104 may select the candidate implement(s) expected to result in reduced crop damage compared to the remaining candidate implement(s), and indicate the selected implement(s) to an operator, for example, via user interface 110 of vehicle 102. In some examples, implement selection circuitry 104 may cause vehicle 102 to automatically traverse the candidate guidance line corresponding to the selected implement(s).

[0032] FIG. 2 is a block diagram of an exemplary implementation of the implement selection circuitry 104 of FIG. 1. The implement selection circuitry 104 of FIG. 2 may be instantiated (e.g., causing it to exist for any period of time, materialize, implement, etc.) by programmable circuitry such as a Central Processing Unit (CPU) executing first instructions. Additionally, or alternatively, the implement selection circuitry 104 of FIG. 2 may be instantiated (e.g., creating an instance, causing it to exist for any period of time, materialize, implement, etc.) by (i) an Application Specific Integrated Circuit (ASIC) and/or (ii) a Field Programmable Gate Array (FPGA) structured and/or configured in response to the execution of second instructions to perform operations corresponding to the first instructions. Some or all of the circuitry of FIG. 2 may thus be instantiated at the same time, or at different times. Some or all of the circuitry of FIG. 2 may be instantiated, for example, in one or more threads executing concurrently in hardware and/or serially in hardware. Furthermore, in some examples, some or all of the circuitry of FIG. 2 may be implemented by microcircuitry executing instructions and/or FPGA circuitry performing operations to implement one or more virtual machines and/or containers.

[0033] In the illustrated example of FIG. 2, implement selection circuitry 104 includes input interface circuitry 202, row data determination circuitry 204, path generation circuitry 206, crop damage calculation circuitry 208, user interface circuitry 210, secondary metric calculation circuitry 212, communication circuitry 214, and a database 216.

[0034] The input interface circuitry 202 of the example of FIG. 2 accesses and/or obtains exemplary input data to be used by the implement selection circuitry 104. For example, the input interface circuitry 202 accesses and/or obtains, from the GPS sensor 108 of FIG. 1, location data (e.g., GPS data) 218 associated with the vehicle 102 (e.g., the first vehicle 102A and/or the second vehicle 102B) of FIG. 1. In some examples, the location data 218 represents geographic locations of the vehicle 102 at different points in time. In some examples, the input interface circuitry 202 accesses and/or obtains the location data 218 while the vehicle 102 performs a first operation in a field. In some such examples, input interface circuitry 202 may obtain location data 218 periodically during the first operation (e.g., at predefined intervals and/or in response to request(s) to GPS sensor 108). In some examples, input interface circuitry 202 provides location data 218 to exemplary database 216 for storage therein.

[0035] In some examples, input interface circuitry 202 accesses and/or obtains vehicle data 220 associated with vehicle 102. For example, input interface circuitry 202 may obtain vehicle data 220 based on user input (e.g., exemplary user input(s) 226) at user interface 110 of FIG. 1, and/or may access vehicle data 220 from a cloud-based and/or remote storage environment (e.g., communicated coupled to implement selection circuitry 104 via exemplary network 106 of FIG. 1). In some examples, vehicle data 220 may be pre-loaded into database 216, and input interface circuitry 202 accesses vehicle data 220 from database 216. In some examples, vehicle data 220 includes dimensions associated with vehicle 102, such as a wheelbase of vehicle 102, locations (e.g., grid locations, X-, Y-, and/or Z- coordinates, etc.) of different parts of vehicle 102 relative to a reference point (e.g., a geometric center) of vehicle 102, distances between exemplary wheels 112, 114 of vehicle 102, widths (e.g., tire widths) of corresponding wheel(s) 112, 114, etc. In some examples, input interface circuitry 202 provides vehicle data 220 to database 216 for storage therein.

[0036] In the illustrated example of FIG. 2, input interface circuitry 202 accesses and/or obtains implement data 222 associated with one or more candidate implements (e.g., available implements) that may be used by vehicle 102 to perform one or more second operations (e.g., spraying, harvesting, etc.) in the field. In some examples, implement data 222 may include identifiers associated with the respective candidate implements, operating widths of the respective candidate implements, and/or one or more exemplary operations that may be performed using the respective candidate implements. In some examples, implement data 222 further includes information associated with a first implement (e.g., first implement 118A of FIG. 1) that was used by vehicle 102 to perform the first operation in the field, such as a first operating width associated with a first implement. In some examples, input interface circuitry 202 obtains implement data 222 based on user input (e.g., user input(s) 226) at user interface 110 of FIG. 1, and/or may access implement data 222 from a cloud-based and/or remote storage environment (e.g., communicated coupled to implement selection circuitry 104 via network 106 of FIG. 1). In some examples, implement data 222 is pre-loaded into database 216, and input interface circuitry 202 can access implement data 222 from database 216. In some examples, input interface circuitry 202 is instantiated by programmable circuitry executing instructions of the input interface circuitry and/or configured to perform operations such as those depicted by the flowchart(s) of FIG. 5.

[0037] The database 216 of FIG. 2 stores data used and/or obtained by the implement selection circuitry 104. For example, the database 216 may store the location data 218, the vehicle data 220, and/or the implement data 222 accessed and/or obtained by the input interface circuitry 202. The exemplary database 216 of FIG. 2 is implemented by any memory, storage device, and/or storage disk for storing data such as, for example, flash memory, magnetic media, optical media, solid state memory, hard drive(s), flash drive(s), etc. Furthermore, the data stored in the database 216 may be in any data format such as, for example, binary data, comma-delimited data, tab-delimited data, structured query language (SQL) structures, etc. Although, in the illustrated example, database 216 is illustrated as a single device, exemplary database 216 and/or any other data storage device described herein may be implemented by any number and/or types of memories and/or software.

[0038] Row data determination circuitry 204 of FIG. 2 determines and/or obtains row data (e.g., crop row locations) associated with crops planted in a field. In some examples, row data determination circuitry 204 determines row data based on implement data 222 and/or location data 218 associated with the first operation (e.g., a planting operation). For example, based on the first operating width of the first implement used by vehicle 102 during the first operation (e.g., represented in implement data 222) and/or based on the first guidance line traveled by vehicle 102 during the first operation (e.g., represented in location data 218), row data determination circuitry 204 determines the crop row locations of the rows of crops planted in the field. In some examples, row data determination circuitry 204 provides crop row locations to database 216 for storage therein. In some examples, row data determination circuitry 204 is instantiated by programmable circuitry executing instructions of the row data determination circuitry and/or configured to perform operations such as those depicted by the flowchart(s) of FIG. 5.

[0039] Path generation circuitry 206 generates and/or determines one or more exemplary candidate guidance lines for vehicle 102 to perform the second operation (e.g., a spraying operation, a harvesting operation, etc.) in the field. For example, path generation circuitry 206 generates candidate guidance line(s) for the respective of the candidate implement(s) (e.g., represented in implement data 222) that may be used to perform the second operation. In some examples, path generation circuitry 206 identifies the second operation to be performed based on user input(s) 226 at user interface 110. Additionally, path generation circuitry 206 identifies and/or selects, from the candidate implements represented in implement data 222, the candidate implement(s) that can be used to perform the second operation. In some such examples, path generation circuitry 206 identifies, based on implement data 222, operational width(s) associated with the selected candidate implement(s).

[0040] In some examples, based on the crop row locations and/or the operating width(s) of the selected candidate implement(s), the path generation circuitry 206 generates respective candidate guidance line(s) for the selected candidate implement(s). For example, the path generation circuitry 206 generates the candidate guidance line(s) along which the vehicle 102 may travel to perform the second operation in the field using the respective candidate implement(s). In some examples, path generation circuitry 206 generates candidate guidance line(s) by executing one or more exemplary path planning algorithms based on the crop row locations and/or based on the operating width(s) of the selected candidate implement(s). In some examples, path generation circuitry 206 generates multiple candidate guidance lines for a corresponding selected candidate implement(s), and selects one of the multiple candidate guidance lines that satisfies one or more thresholds and/or exemplary characteristics. In one example, path generation circuitry 206 selects one of the multiple candidate guidance lines that allows vehicle 102 to operate on at least a threshold proportion (e.g., 80%, 90%, 95%, etc.) of the crop rows using the selected candidate implement. In some examples, path generation circuitry 206 selects one of the multiple candidate guidance lines with a shortest length, a minimum number of turns, etc. (e.g., compared to the remaining multiple candidate guidance lines). In some examples, after generating and/or selecting the candidate guidance line(s) for the selected candidate implement(s), path generation circuitry 206 provides the candidate guidance line(s) to database 216 for storage therein. In some examples, path generation circuitry 206 is instantiated by programmable circuitry executing instructions of the path generation circuitry and/or configured to perform operations such as those represented by the flowchart(s) of FIG. 5.

[0041] The exemplary crop damage calculation circuitry 208 generates and/or determines exemplary crop damage metric(s) associated with the respective candidate implement(s) and/or the candidate guidance line(s). For example, crop damage calculation circuitry 208 accesses crop row locations determined by row data determination circuitry 204, and accesses candidate guidance line(s) generated by path generation circuitry 206. In some examples, crop damage calculation circuitry 208 determines crop damage metric(s) associated with respective candidate guidance line(s) by determining an amount (e.g., an area, a percentage) of overlap between the crop row locations and exemplary tire track locations of vehicle 102 when traveling along respective candidate guidance line(s).

[0042] In the illustrated example of FIG. 2, crop damage calculation circuitry 208 predicts and/or estimates, based on vehicle data 220, tire track locations of vehicle 102 associated with respective candidate guidance line(s). For example, crop damage calculation circuitry 208 accesses, from vehicle data 220, one or more exemplary distances between wheels 112, 114 of vehicle 102 (e.g., a first exemplary distance between front wheels 112 of vehicle 102 and/or a second exemplary distance between rear wheels 144 of vehicle 102). Additionally, crop damage calculation circuitry 208 accesses, from vehicle data 220, exemplary tire width(s) associated with respective wheel(s) 112, 114. In some examples, based on the distances between respective wheels 112, 114 and/or based on tire width(s), crop damage calculation circuitry 208 determines exemplary inner tire track contours and/or exemplary outer tire track contours for respective wheel(s) 112, 114 along that of candidate guidance line(s). In some such examples, crop damage calculation circuitry 208 may determine tire track locations based on the inner and outer tire track contours.

[0043] For example, the inner tire track contour for a corresponding one of the wheels 112, 114 represents a path corresponding to an exemplary inner edge of a tire of one of the wheels 112, 114, and the outer tire track contour for one of the wheels 112, 114 represents a path corresponding to an exemplary outer edge of the tire. In some examples, the inner edge is along an inner surface of the tire and the outer edge is along an outer surface of the tire, where the inner surface faces inward (e.g., toward a center of the vehicle 102) and the outer surface faces outward from the vehicle 102. In some examples, the inner tire track contours and/or the outer tire track contours for a corresponding candidate guidance line may be similar (e.g., in shape) to the candidate guidance line, but may be offset from the candidate guidance line. In some examples, crop damage calculation circuitry 208 determines exemplary offset value(s) for the inner and outer tire track contours based on the distance(s) between the front wheels 112 and/or the rear wheels 114 and/or based on the tire width(s) of the front wheels 112 and/or the rear wheels 114. For example, crop damage calculation circuitry 208 may determine that a first inner tire track contour for a first of the front wheels 112 (e.g., a left front wheel) is offset from the candidate guidance line by a first exemplary offset distance, where the first offset distance corresponds to a portion (e.g., half) of the first distance between the front wheels 112 of the vehicle 102. Additionally, crop damage calculation circuitry 208 may determine that a first outer tire track contour for the first of the front wheels 112 is offset from the candidate guidance line by a second exemplary offset distance, wherein the second offset distance corresponds to a sum of the first offset distance and a tire width of the first of the front wheels 112. The determination of the inner and outer tire track contours is further described with respect to FIG. 3 below.

[0044] In some examples, for a given candidate guidance line, crop damage calculation circuitry 208 determines and/or estimates inner and outer tire track contours for the respective wheel(s) 112, 114. In such examples, crop damage calculation circuitry 208 provides the inner and outer tire track contours to database 216 to be stored in association with the corresponding candidate guidance line. In some examples, crop damage calculation circuitry 208 determines exemplary tire track locations (e.g., a tire track coverage area) based on the inner and outer tire track contours. For example, the tire track locations correspond to the area(s) of the field that are traveled by wheels 112, 114 of vehicle 102 when vehicle 102 travels the candidate guidance line. In some examples, crop damage calculation circuitry 208 determines tire track locations for corresponding wheel(s) 112, 114 by determining the area(s) between the respective inner and outer tire track contours of corresponding wheel(s) 112, 114.

[0045] In some examples, crop damage calculation circuitry 208 calculates one or more exemplary crop damage metrics for the candidate guidance line based on tire track locations. For example, the crop damage metric(s) may include an area (e.g., a total area) of crop damage expected to occur as a result of vehicle 102 traveling the candidate guidance line. Additionally, or alternatively, the crop damage metric(s) may include a proportion (e.g., a percentage) of crop rows expected to be damaged as a result of vehicle 102 traveling the candidate guidance line. In some examples, to determine crop damage metric(s), crop damage calculation circuitry 208 compares tire track locations to crop row locations in the field, and identifies overlapping region(s) between the tire track locations and the crop row locations. In such examples, the overlapping region(s) correspond to the region(s) of the crop row expected to be traversed and/or otherwise damaged when vehicle 102 travels the candidate guidance line. In some examples, crop damage calculation circuitry 208 determines crop damage metric(s) by determining an area (e.g., a total area) of the overlapping region(s), and/or dividing the area of the overlapping region(s) by a total area of the crop rows to determine a proportion (e.g., a percentage) of the crop rows expected to be damaged. In some examples, crop damage calculation circuitry 208 provides the crop row metric(s) to database 216 to be stored in association with the candidate guidance line.

[0046] In some examples, crop damage calculation circuitry 208 repeats the above process for the remaining candidate guidance lines to determine crop damage metric(s) associated therewith. In some such examples, based on the crop damage metric(s) for the respective candidate guidance lines, crop damage calculation circuitry 208 selects the candidate guidance lines to be traveled by vehicle 102 during the second operation. For example, crop damage calculation circuitry 208 may select one of the candidate guidance lines associated with a minimum amount of crop damage (e.g., the candidate guidance line for which the predicted crop damage is less than the predicted crop damage for the remaining candidate guidance lines). In some examples, crop damage calculation circuitry 208 may select one of the candidate guidance lines based on a tradeoff, for example, between predicted crop damage and one or more exemplary parameters associated with the respective candidate guidance lines (e.g., a total length of the candidate guidance line, a predicted duration to travel the candidate guidance line, a number of turns in the candidate guidance line, a travel speed along the candidate guidance line, a time to process the field traveling the candidate guidance line, etc.). For example, crop damage calculation circuitry 208 may select the first(s) of the candidate guidance lines that satisfy an exemplary crop damage threshold (e.g., for which the predicted crop damage is less than a threshold area and/or ratio of crop rows), and may further select, from among the first(s) of the candidate guidance lines, second(s) of the candidate guidance lines associated with, for example, a shorter total length, a shorter predicted duration, a minimum number of turns, etc. In some examples, crop damage calculation circuitry 208 identifies, based on implement data 222 stored in exemplary database 216, one or more of the candidate implements corresponding to the selected one(s) of the candidate guidance lines. In some examples, crop damage calculation circuitry 208 is instantiated by programmable circuitry executing crop damage calculation circuitry instructions and/or configured to perform operations such as those depicted by the flowchart(s) of FIG. 5.

[0047] Secondary metric calculation circuitry 212 of FIG. 2 calculates and/or determines one or more exemplary secondary metrics based on the crop damage metric(s) for the respective candidate guidance line(s) and/or candidate implement(s). In some examples, the secondary metric(s) include at least one of a predicted profit and/or change in profits (e.g., in dollars) or a predicted yield (e.g., in bushels per acre) associated with the respective candidate guidance line(s) and/or candidate implement(s). In some examples, secondary metric calculation circuitry 212 determines a total area of the crop row locations in the field, and subtracts an area of the damaged crop (e.g., as indicated by the crop damage metric(s)) to determine an area of undamaged crop in the field. In such examples, secondary metric calculation circuitry 212 determines predicted yield by estimating and/or determining an amount (e.g., in bushels) of crop in the undamaged crop area, and dividing the amount of crop by a size (e.g., in acres) of the field. In some examples, secondary metric calculation circuitry 212 determines a predicted profit associated with the undamaged crop area, and/or determines the predicted profit loss associated with the damaged crop area. For example, secondary metric calculation circuitry 212 may determine predicted profit and predicted profit loss by multiplying the undamaged crop area and the damaged crop area, respectively, by a predicted profit per area, where the predicted profit per area may be input by an operator (e.g., via user input 226) and/or may be accessed from database 216. In some examples, secondary metric calculation circuitry 212 may determine relative differences in predicted profit and/or profit loss between different candidate guidance lines and/or candidate implements. In some examples, secondary metric calculation circuitry 212 may provide secondary metric(s) to database 216 to be stored in association with the corresponding candidate guidance line(s) and/or candidate implement(s). In some examples, secondary metric calculation circuitry 212 is instantiated by programmable circuitry executing instructions of the secondary metric calculation circuitry and/or configured to perform operations such as those depicted by the flowchart(s) of FIG. 5.

[0048] Exemplary user interface circuitry 210 of FIG. 2 generates and/or presents exemplary display information 224 to an operator via exemplary user interface 110 of FIG. 1. For example, user interface circuitry 210 may generate display information 224 to include at least one of candidate guidance line(s), crop damage metric(s), or secondary metric(s) associated with the candidate implement(s). In some examples, user interface circuitry 210 may indicate, via display information 224, selected candidate implement(s) (e.g., selected by crop damage calculation circuitry 208) to the operator. For example, display information 224 may provide a recommendation to the operator to use the selected candidate implement(s) for the second field operation. In some examples, user interface 110 may present, via display information 224, exemplary metrics (e.g., crop damage metric(s) and/or secondary metric(s)) associated with multiple (e.g., all) of the candidate implements available to the operator, so that the operator may manually select the candidate implement(s) based on display information 224. In some examples, the operator may select, via user input 226, the candidate implement(s), and user interface circuitry 210 may cause user interface 110 to present and/or display information corresponding to the selected candidate implement(s).

[0049] In some examples, user interface circuitry 210 generates one or more exemplary maps corresponding to the respective candidate implement(s). In some such examples, the map(s) represent crop row locations in a field and/or one or more initial guidance lines traveled by a vehicle during a first operation in the field. Additionally, the map(s) may represent the candidate guidance line(s) for the second operation in the field, the tire track location(s), and/or position(s) of the vehicle 102 implementing the respective candidate implement(s). In some examples, one or more of the maps may be presented to the operator via display information 224 to facilitate selection of one or more of the candidate implement(s). Exemplary maps that may be generated by user interface circuitry 210 are described below with respect to FIGS. 4A, 4B, and/or 4C. In some examples, user interface circuitry 210 is instantiated by programmable circuitry executing instructions of the user interface circuitry and/or configured to perform operations such as those depicted by the flowchart(s) of FIG. 5.

[0050] Exemplary communication circuitry 214 of FIG. 2 is communicatively coupled to exemplary network 106 of FIG. 1 to send, access, and/or obtain data via network 106. In some examples, communication circuitry 214 may send, via network 106, one or more metrics (e.g., crop damage metric(s) and/or secondary metric(s)) to an exemplary cloud-based storage environment for storage therein. Additionally, or alternatively, communication circuitry 214 may send the metric(s) and/or at least one of location data 218, vehicle data 220, and/or implement data 222 to one or more instances of implement selection circuitry 104 implemented in one or more different vehicles.

[0051] In some examples, communication circuitry 214 may access and/or obtain (e.g., via exemplary network 106 of FIG. 1) data associated with multiple vehicles operating in multiple respective fields. For example, communication circuitry 214 may be communicatively coupled to multiple of the vehicles to obtain exemplary location data, exemplary vehicle data, and/or exemplary implement data associated therewith. In some examples, communication circuitry 214 provides the obtained data to row data determination circuitry 204, path generation circuitry 206, and/or crop damage calculation circuitry 208 to enable calculation of crop damage metrics for the respective of the vehicles. In some examples, crop damage calculation circuitry 208 may compare and/or evaluate crop damage metrics to select one or more implements and/or operating widths that result in better performance (e.g., reduced crop damage) compared to the remaining implements and/or operating widths thereof. Stated differently, crop damage calculation circuitry 208 evaluates crop damage metrics to determine the implement(s) and/or operating widths corresponding to a minimum amount of crop damage across a portion (e.g., all) of multiple fields. In some examples, the selected implement(s) and/or operating widths for the multiple fields are presented to an operator via display information 224. In some examples, the results obtained for the multiple fields may be used by the operator to select implement(s) for use in a given field, and/or may be used to facilitate the design and/or manufacture of new implement(s).

[0052] In some examples, communication circuitry 214 is communicatively coupled to an exemplary vehicle control system (e.g., an autonomous driving system) of exemplary vehicle 102 of FIG. 1. In some such examples, communication circuitry 214 may provide data to the vehicle control system to facilitate one or more operations of vehicle 102. For example, communication circuitry 214 may provide to the vehicle control system the generated guidance line(s) corresponding to the selected implement(s), such that communication circuitry 214 causes the vehicle control system to steer (e.g., automatically steer) vehicle 102 along the guidance line(s). In some examples, communication circuitry 214 is instantiated by programmable circuitry executing instructions of the communication circuitry and/or configured to perform operations such as those represented by the flowchart(s) of FIG. 5.

[0053] FIG. 3 illustrates a portion of an exemplary field 300 in which a second exemplary operation (e.g., a spraying operation, a harvesting operation, etc.) is to be performed by an exemplary vehicle 302. In the illustrated example of FIG. 3, the field 300 includes exemplary crop rows 304 generated and/or operated during a first exemplary operation in the field 300. Furthermore, the field 300 includes first exemplary guidance lines 306 representative of a path traveled by the vehicle 302 (e.g., and/or by a different vehicle) during the first operation, and a second exemplary guidance line (e.g., a candidate guidance line) 308 to be traveled by the vehicle 302 during the second operation. In some examples, vehicle 302 performs the first operation using a first exemplary implement having a first exemplary operating width, and vehicle 302 may perform the second operation using a second exemplary implement having a second exemplary operating width different from the first operating width. In some examples, because of the change in operating widths between the first and second operations, traversing the first guidance line 306 during the second operation may result in one(s) of the crop row(s) 304 (e.g., and/or portion(s) thereof) not being operated and/or may result in repeated operations on those crop row(s) 304. As such, the exemplary implement selection circuitry 104 of FIGS. 1 and/or 2 generates, based on the second operating width, the second guidance line 308 to improve coverage of that(those) of the crop row(s) 304.

[0054] In the illustrated example of FIG. 3 , to facilitate determining exemplary crop damage metric(s) associated with second guidance line 308 and/or the second implement, implement selection circuitry 104 determines and/or predicts locations of exemplary tire tracks 310A, 310B produced by vehicle 302 as vehicle 302 travels along second guidance line 308. In this example, implement selection circuitry 104 determines the first tire track 310A corresponding to an exemplary first wheel (e.g., a first rear wheel, a left rear wheel) 312A of vehicle 302 and the second tire track 310B corresponding to an exemplary second wheel (e.g., a second rear wheel, a right rear wheel) 312B of vehicle 302. Although the first and second tire tracks 310A, 310B corresponding to the first and second wheels 312A, 312B are shown in this example, the implement selection circuitry 104 may additionally, or alternatively, determine the tire brand(s) corresponding to an exemplary third wheel (e.g., a left front wheel) 312C and/or an exemplary fourth wheel (e.g., a right front wheel) 312D of the vehicle 302.

[0055] In the illustrated example of FIG. 3 , implement selection circuitry 104 determines tire tracks 310A, 310B based on exemplary vehicle data associated with vehicle 302, where the vehicle data includes a first exemplary distance 314 between the first and second wheels 312A, 312B, a first tire width 316 of the first wheel 312C, and a second tire width 318 of the second wheel 312B. For example, implement selection circuitry 104 determines a first inner contour 320 and a first outer contour 322 of the first tire track 310A, and a second inner contour 324 and a second outer contour 326 of the second tire track 310B. In this example, each of the contours 320, 322, 324, 326 has generally the same shape and/or curvature as the second guideline 308, but is offset from a longitudinal axis 328 of the vehicle 302. In this example, the wheels 312A, 312B are spaced symmetrically about the longitudinal axis 328, such that the implement selection circuitry 104 determines that the first inner contour 320 is offset in a first direction (e.g., a leftward direction) 330 from the longitudinal axis 328 approximately one-half of the first distance 314, and the second inner contour 324 is offset in a second direction (e.g., a rightward direction) 332 from the longitudinal axis 328 approximately one-half of the first distance 314. Additionally, the implement selection circuitry 104 determines that the first outer contour 322 is offset (e.g., in the first direction 330) from the first inner contour 320 by the first tire width 316, and the second outer contour 326 is offset (e.g., in the second direction 332) from the second inner contour 324 by the second tire width 316. In some examples, the offset(s) between the contour(s) 320, 322, 324, 326 and the longitudinal axis 328 may be different.

[0056] In the illustrated example of FIG. 3, implement selection circuitry 104 determines that first tire track 310A corresponds to a first area between first inner and outer contours 320, 322, and second tire track 310B corresponds to a second area between second inner and outer contours 324, 326. In some examples, implement selection circuitry 104 determines crop damage metric(s) based on an overlap between tire track(s) 310A, 310B and crop row(s) 304 (and/or portions thereof). For example, implement selection circuitry 104 determines exemplary locations 334 at which contours 320, 322, 324, 326 intersect one of crop rows 304, and identifies exemplary damaged crop row portion(s) 336 between one of locations 334. In the illustrated example of FIG. 3, implement selection circuitry 104 identifies a first location 334A at which second inner contour 324 intersects a first crop row 304A and a second location 334B at which second outer contour 326 intersects first crop row 304A. In such an example, implement selection circuitry 104 identifies a damaged first crop row portion 336A of first crop row 304A between first location 334A and second location 334B.

[0057] In some examples, implement selection circuitry 104 determines length(s) (e.g., individual length(s) and/or a total length) of damaged crop row portion(s) 336, and determines an exemplary crop damage area (e.g., a total crop damage area) by multiplying the exemplary crop length(s) by width(s) of corresponding crop rows 304. Additionally, or alternatively, implement selection circuitry 104 may determine a proportion (e.g., a percentage) of the crop damage area relative to a total area of field 300. In some examples, implement selection circuitry 104 stores the determined crop damage area and/or the determined proportion relative to the total area of the field as one or more exemplary crop damage metrics associated with second guidance line 308. and/or the second implement.

[0058] FIGS. 4A, 4B, and 4C illustrate first, second, and third exemplary maps 402, 404, 406, respectively, that may be generated and/or produced for presentation by the exemplary implement selection circuitry 104 of FIGS. 1 and/or 2. For example, the maps 402, 404, 406 may be included in the exemplary display information 224 generated by the exemplary user interface circuitry 210 of FIG. 2 and/or presented to an operator (e.g., via the user interface 110 of FIG. 1, via a remote device, etc.). In the illustrated examples of FIGS. 4A, 4B, and/or 4C, exemplary maps 402, 404, 406 indicate locations of exemplary crop rows 408 generated and/or operated during a first exemplary operation (e.g., a planting operation) in an exemplary field, and further indicate a first exemplary guidance line 410A traveled by a first exemplary vehicle (e.g., first vehicle 102A of FIG. 1) during the first exemplary operation. In some examples, the first vehicle performs the first operation using a first exemplary implement (e.g., first implement 114A of FIG. 1) with a first exemplary operational width, and the first guidance line 410 is generated and/or selected for the first vehicle based on the first operational width.

[0059] Returning to FIG. 4A, the first map 402 illustrates a second exemplary vehicle 412A utilizing a second exemplary implement 414A to perform a second exemplary operation (e.g., a spraying operation, a harvesting operation, etc.) on crop rows 408. In this example, the second implement 414A has a second exemplary operating width, and the second operating width corresponds to the first operating width of the first implement used for the first operation. As such, a second exemplary guidance line 416A generated for the second vehicle 412A for the second operation is substantially the same as the first guidance line 410 generated for the first operation.

[0060] Similarly, the second map 404 of FIG. 4B includes exemplary third guidance lines 416B generated for a third exemplary vehicle 412B utilizing a third exemplary implement 414B, and the third map 406 of FIG. 4C illustrates exemplary fourth guidance lines 416C generated for a fourth exemplary vehicle 412C utilizing a fourth exemplary implement 414C. In the illustrated example of FIG. 4B, the third implement 414B has an exemplary third operational width that is approximately half the first operational width of the first implement used during the first operation. As a result, the third vehicle 412B must travel two of the third guidance lines 416B to cover the same area of the field as the second vehicle 412A. Additionally, in the illustrated example of FIG. 4C, the fourth implement 416C has an exemplary fourth operating width that is approximately one-quarter of the first operating width (e.g., half of the third operating width). As a result, the fourth vehicle 412C must travel four of the four guidance lines 416C to cover the same area of the field as the second vehicle 412A and/or the third vehicle 412B.

[0061] In some examples, as a result of vehicles 412A, 412B, 412C traveling along different respective guidance lines 416A, 416B, 416C, one or more wheels of vehicles 412A, 412B, 412C may run over and/or damage different portions of crop rows 408. For example, first map 402 of FIG. 4A includes a first region of exemplary crop damage 418A corresponding to second vehicle 412A, second map 404 of FIG. 4B includes a second region of exemplary crop damage 418B corresponding to third vehicle 412B, and third map 406 of FIG. 4C includes a third region of exemplary crop damage 418C corresponding to fourth vehicle 412C. In some examples, maps 402, 404, 406 may indicate crop damage metric(s) corresponding to respective crop damage regions 418A, 418B, 418C, where the crop damage metric(s) may include total area(s) and/or proportion(s) of crop damage region(s) 418A, 418B, 418C relative to a total area of the field. In some examples, maps 402, 404, 406 are presented to an operator to facilitate selection of one of implements 414A, 414B, 414C for use in performing the second operation.

[0062] In some examples, implement selection circuitry 104 includes means for obtaining. For example, the means for obtaining may be implemented by input interface circuitry 202. In some examples, input interface circuitry 202 may be instantiated by programmable circuitry such as exemplary programmable circuitry 612 of FIG. 6. For example, input interface circuitry 202 may be instantiated by exemplary microprocessor 700 of FIG. 7 executing machine-executable instructions such as those implemented by at least block 502 of FIG. 5. In some examples, input interface circuitry 202 may be instantiated by hardware logic circuitry, which may be implemented by an ASIC, XPU, or FPGA circuitry 800 of FIG. 8 configured and/or structured to perform operations corresponding to the machine-readable instructions. Additionally, or alternatively, the input interface circuitry 202 may be instantiated by any other combination of hardware, software, and/or firmware. For example, the input interface circuitry 202 may be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and/or integrated analog and/or digital circuitry, an FPGA, an ASIC, an XPU, a comparator, an operational amplifier (op-amp), a logic circuit, etc.) configured and/or structured to execute some or all of the machine-readable instructions and/or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are similarly appropriate.

[0063] In some examples, implement selection circuitry 104 includes means for determining row data. For example, the means for determining row data may be implemented by row data determination circuitry 204. In some examples, row data determination circuitry 204 may be instantiated by programmable circuitry such as exemplary programmable circuitry 612 of FIG. 6. For example, row data determination circuitry 204 may be instantiated by exemplary microprocessor 700 of FIG. 7 executing machine-executable instructions such as those implemented by at least block 504 of FIG. 5. In some examples, the row data determination circuitry 204 may be instantiated by the hardware logic circuitry, which may be implemented by an ASIC, XPU, or the FPGA circuitry 800 of FIG. 8 configured and/or structured to perform operations corresponding to machine-readable instructions. Additionally, or alternatively, the row data determination circuitry 204 may be instantiated by any other combination of hardware, software, and/or firmware. For example, the row data determination circuitry 204 may be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and/or integrated analog and/or digital circuitry, an FPGA, an ASIC, an XPU, a comparator, an operational amplifier (op-amp), a logic circuit, etc.) configured and/or structured to execute some or all of the machine-readable instructions and/or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are similarly appropriate.

[0064] In some examples, implement selection circuitry 104 includes means for generating a path. For example, the means for generating a path may be implemented by path generation circuitry 206. In some examples, path generation circuitry 206 may be instantiated by programmable circuitry such as exemplary programmable circuitry 612 of FIG. 6. For example, path generation circuitry 206 may be instantiated by exemplary microprocessor 700 of FIG. 7 by executing machine-executable instructions such as those implemented by at least blocks 506, 508, 512 of FIG. 5. In some examples, path generation circuitry 206 may be instantiated by hardware logic circuitry, which may be implemented by an ASIC, XPU, or the FPGA circuitry 800 of FIG. 8 configured and/or structured to perform operations corresponding to machine-readable instructions. Additionally, or alternatively, path generation circuitry 206 may be instantiated by any other combination of hardware, software, and/or firmware. For example, path generation circuitry 206 may be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and/or integrated analog and/or digital circuitry, an FPGA, an ASIC, an XPU, a comparator, an operational amplifier (op-amp), a logic circuit, etc.) configured and/or structured to execute some or all of the machine-readable instructions and/or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are similarly appropriate.

[0065] In some examples, implement selection circuitry 104 includes means for calculating crop damage. For example, the means for calculating crop damage may be implemented by crop damage calculation circuitry 208. In some examples, crop damage calculation circuitry 208 may be instantiated by programmable circuitry such as exemplary programmable circuitry 612 of FIG. 6. For example, crop damage calculation circuitry 208 may be instantiated by exemplary microprocessor 700 of FIG. 7 executing machine-executable instructions such as those implemented by at least blocks 510, 514, 520, 524 of FIG. 5. In some examples, crop damage calculation circuitry 208 may be instantiated by hardware logic circuitry, which may be implemented by an ASIC, XPU, or FPGA circuitry 800 of FIG. 8 configured and/or structured to perform operations corresponding to machine-readable instructions. Additionally, or alternatively, crop damage calculation circuitry 208 may be instantiated by any other combination of hardware, software, and/or firmware. For example, crop damage calculation circuitry 208 may be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and/or integrated analog and/or digital circuitry, an FPGA, an ASIC, an XPU, a comparator, an operational amplifier (op-amp), a logic circuit, etc.) configured and/or structured to execute some or all of the machine-readable instructions and/or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are similarly appropriate.

[0066] In some examples, implement selection circuitry 104 includes means for generating display information. For example, the means for generating display information may be implemented by user interface circuitry 210. In some examples, user interface circuitry 210 may be instantiated by programmable circuitry such as exemplary programmable circuitry 612 of FIG. 6. For example, user interface circuitry 210 may be instantiated by exemplary microprocessor 700 of FIG. 7 executing machine-executable instructions such as those implemented by at least block 518 of FIG. 5. In some examples, user interface circuitry 210 may be instantiated by hardware logic circuitry, which may be implemented by an ASIC, XPU, or the FPGO circuitry 800 of FIG. 8 configured and/or structured to perform operations corresponding to machine-readable instructions. Additionally, or alternatively, user interface circuitry 210 may be instantiated by any other combination of hardware, software, and/or firmware. For example, user interface circuitry 210 may be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and/or integrated analog and/or digital circuitry, an FPGA, an ASIC, an XPU, a comparator, an operational amplifier (op-amp), a logic circuit, etc.) configured and/or structured to execute some or all of the machine-readable instructions and/or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are similarly appropriate.

[0067] In some examples, implement selection circuitry 104 includes means for calculating a secondary metric. For example, the means for calculating a secondary metric may be implemented by secondary metric calculation circuitry 212. In some examples, secondary metric calculation circuitry 212 may be instantiated by programmable circuitry such as exemplary programmable circuitry 612 of FIG. 6. For example, secondary metric calculation circuitry 212 may be instantiated by exemplary microprocessor 700 of FIG. 7 executing machine-executable instructions such as those implemented by at least block 516 of FIG. 5. In some examples, secondary metric calculation circuitry 212 may be instantiated by hardware logic circuitry, which may be implemented by an ASIC, XPU, or the FPGO circuitry 800 of FIG. 8 configured and/or structured to perform operations corresponding to machine-readable instructions. Additionally, or alternatively, secondary metric calculation circuitry 212 may be instantiated by any other combination of hardware, software, and/or firmware. For example, secondary metric calculation circuitry 212 may be implemented by at least one or more hardware circuitry (e.g., processor circuitry, discrete and/or integrated analog and/or digital circuitry, an FPGA, an ASIC, an XPU, a comparator, an operational amplifier (op-amp), a logic circuit, etc.) configured and/or structured to execute some or all of the machine-readable instructions and/or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are similarly appropriate.

[0068] In some examples, implement selection circuitry 104 includes means for communicating. For example, the means for communicating may be implemented by communication circuitry 214. In some examples, communication circuitry 214 may be instantiated by programmable circuitry such as exemplary programmable circuitry 612 of FIG. 6. For example, communication circuitry 214 may be instantiated by exemplary microprocessor 700 of FIG. 7 executing machine-executable instructions such as those implemented by at least block 522 of FIG. 5. In some examples, communication circuitry 214 may be instantiated by hardware logic circuitry, which may be implemented by an ASIC, XPU, or FPGO circuitry 800 of FIG. 8 configured and/or structured to perform operations corresponding to machine-readable instructions. Additionally, or alternatively, communication circuitry 214 may be instantiated by any other combination of hardware, software, and/or firmware. For example, communication circuitry 214 may be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and/or integrated analog and/or digital circuitry, an FPGA, an ASIC, an XPU, a comparator, an operational amplifier (op-amp), a logic circuit, etc.) configured and/or structured to execute some or all of the machine-readable instructions and/or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are similarly appropriate.

[0069] Although an exemplary manner of implementing the implement selection circuitry 104 of FIG. 1 is illustrated in FIG. 2, one or more of the elements, processes, and/or devices illustrated in FIG. 2 may be combined, divided, rearranged, omitted, eliminated, and/or implemented in any other manner. Additionally, exemplary input interface circuitry 202, exemplary row data determination circuitry 204, exemplary path generation circuitry 206, exemplary crop damage calculation circuitry 208, exemplary user interface circuitry 210, exemplary secondary metric calculation circuitry 212, exemplary communication circuitry 214, exemplary database 216, and/or, more generally, exemplary implement selection circuitry 104 of FIG. 2 may be implemented by hardware alone or by hardware in combination with software and/or firmware. Thus, for example, any of exemplary input interface circuitry 202, exemplary row data determination circuitry 204, exemplary path generation circuitry 206, exemplary crop damage calculation circuitry 208, exemplary user interface circuitry 210, exemplary secondary metric calculation circuitry 212, exemplary communication circuitry 214, exemplary database 216, and/or, more generally, exemplary implement selection circuitry 104, could be implemented by programmable circuitry in combination with machine-readable instructions (e.g., firmware or software), processor circuitry, analog circuit(s), digital circuit(s), circuit(s) logic processor(s), programmable processor(s), programmable microcontroller(s), graphics processing unit(s) (GPU(s)), digital signal processor(s) (DSP(s)), ASIC(s), programmable logic device(s) (PLD(s)), and/or field programmable logic device(s) (FPLD(s)) such as FPGAs. Still further, the exemplary implement selection circuitry 104 of FIG. 2 may include one or more elements, processes, and/or devices in addition to, or in place of, those illustrated in FIG. 2, and/or may include more than one of any or all of the elements, processes, and devices illustrated.

[0070] A flowchart representative of exemplary machine-readable instructions that may be executed by the programmable circuitry to implement and/or instantiate the implement selection circuitry 104 of FIG. 2 and/or representative of exemplary operations that may be performed by the programmable circuitry to implement and/or instantiate the implement selection circuitry 104 of FIG. 2 is shown in FIG. 5. The machine-readable instructions may be one or more executable programs or portion(s) of one or more executable programs for execution by the programmable circuitry such as the programmable circuitry 612 shown in the exemplary processor platform 600 discussed below with respect to FIG. 6 and/or may be one or more function(s) or portion(s) of functions to be performed by the exemplary programmable circuitry (e.g., an FPGA) discussed below with respect to FIGS. 7 and/or 8. In some examples, the machine-readable instructions cause an operation, task, etc., to be carried out and/or performed in an automatic manner in the real world. As used herein, "automatic" means without human involvement.

[0071] The program may be embodied in instructions (e.g., software and/or firmware) stored on one or more computer-readable and/or non-transitory machine-readable storage media such as cache memory, a magnetic storage device or disk (e.g., a floppy disk, a Hard Disk Drive (HDD), etc.), an optical storage device or disk (e.g., a Blu-ray Disc, a Compact Disc (CD), a Digital Versatile Disc (DVD), etc.), a Redundant Array of Independent Disks (RAID), a registry, ROM, a solid-state drive (SSD), SSD memory, non-volatile memory (e.g., Electrically Erasable Programmable Read-Only Memory (EEPROM), flash memory, etc.), volatile memory (e.g., Random Access Memory (RAM) of any type, etc.), and/or any other storage device or storage disk. The instructions on the computer-readable and/or non-transitory machine-readable medium may be programmed and/or executed by programmable circuitry located in one or more hardware devices, but the entire program and/or portions thereof could alternatively be executed and/or instantiated by one or more hardware devices other than the programmable circuitry and/or embodied in dedicated hardware. The machine-readable instructions may be distributed across multiple hardware devices and/or executed by two or more hardware devices (e.g., a server and a client hardware device). For example, the client hardware device may be implemented by an endpoint client hardware device (e.g., a hardware device associated with a human and/or machine user) or an intermediate client hardware device port (e.g., a radio access network (RAN)) that can facilitate communication between a server and an endpoint client hardware device. Similarly, the non-transitory computer-readable storage medium may include one or more media. Additionally, although the exemplary program is described with reference to the flowchart(s) illustrated in FIG. 5, many other methods of implementing the exemplary implement selection circuitry 104 may alternatively be used. For example, the order of execution of the blocks of the flowchart(s) may be changed, and/or some of the described blocks may be changed, eliminated, or combined. Additionally, or alternatively, any or all of the blocks of the flowchart may be implemented by one or more hardware circuits (e.g., processor circuitry, discrete and/or integrated analog and/or digital circuitry, an FPGA, an ASIC, a comparator, an operational amplifier (op-amp), a logic circuit, etc.) structured to perform the corresponding operation without executing software or firmware. The programmable circuitry may be distributed across different network locations and/or be local to one or more hardware devices (e.g., a single-core processor (e.g., a single-core CPU), a multi-core processor (e.g., a multi-core CPU, an XPU, etc.)). For example, the programmable circuitry may be a CPU and/or an FPGA located in the same package (e.g., in the same integrated circuit (IC) package or in two or more separate housings), one or more processors in a single machine, multiple processors distributed across multiple servers of a server fabric, multiple processors distributed across one or more server fabrics, etc., and/or any combination(s) thereof.

[0072] Machine-readable instructions described herein may be stored in one or more of a compressed format, an encrypted format, a fragmented format, a compiled format, an executable format, a packed format, etc. Machine-readable instructions as described herein may be stored as data (e.g., computer-readable data, machine-readable data, one or more bits (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), a bit stream (e.g., a computer-readable bit stream, a machine-readable bit stream, etc.), etc.) or a data structure (e.g., as portion(s) of instructions, code, code representations, etc.) that may be used to create, manufacture, and/or produce machine-executable instructions. For example, machine-readable instructions may be fragmented and stored on one or more storage devices, disks, and/or computing devices (e.g., servers) located in the same or different locations of a network or collection of networks (e.g., in the clouds, on edge devices, etc.). Machine-readable instructions may require one or more of installation, modification, adaptation, updating, combining, supplementing, configuration, decryption, decompression, unpacking, distribution, reassignment, compilation, etc., in order to make them directly readable, interpretable, and/or executable by a computing device and/or another machine. For example, machine-readable instructions may be stored in multiple parts, which are individually compressed, encrypted, and/or stored on separate computing devices, where the parts, when decrypted, decompressed, and/or combined, form a series of computer-executable and/or machine-executable instructions that implement one or more functions and/or operations that may together form a program as described herein.

[0073] In another example, machine-readable instructions may be stored in a state in which they can be read by the programmable circuitry, but require the addition of a library (e.g., a dynamic link library (DLL)), a software development kit (SDK), an application programming interface (API), etc., in order to execute the machine-readable instructions on a particular computing device or other device. In another example, the machine-readable instructions may need to be configured (e.g., settings stored, data input, network addresses written, etc.) before the machine-readable instructions and/or the corresponding program(s) can be executed in whole or in part. Thus, machine-readable, computer-readable, and/or machine-readable medium, as used herein, may include instructions and/or program(s) regardless of the particular format or state of the machine-readable instructions and/or program(s).

[0074] The machine-readable instructions described herein may be represented by any past, present, or future instruction language, scripting language, programming language, etc. For example, the machine-readable instructions may be represented using any of the following languages: C, C++, Java, C#, Perl, Python, JavaScript, HyperText Markup Language (HTML), Structured Query Language (SQL), Swift, etc.

[0075] As mentioned herein, the exemplary operations of FIG. 5 may be implemented using executable instructions (e.g., computer-readable and/or machine-readable instructions) stored on one or more computer-readable and/or non-transitory machine-readable media. As used herein, the terms non-transitory computer-readable medium, non-transitory computer-readable storage medium, non-transitory machine-readable medium, and/or non-transitory machine-readable storage medium are expressly defined to include any type of computer-readable storage device and/or storage disk and in a manner that excludes propagation signals and excludes transmission media. Examples of such non-transitory computer-readable media, non-transitory computer-readable storage media, non-transitory machine-readable media, and/or non-transitory machine-readable storage media include optical storage devices, magnetic storage devices, a hard drive, flash memory, read-only memory (ROM), a CD, a DVD, a cache, RAM of any type, a record, and/or any other storage device or storage disk on which information is stored for any duration (e.g., for extended periods of time, permanently, for brief instances, to temporarily store, and/or to cache information). As used herein, the terms "non-transitory computer-readable storage device" and "non-transitory machine-readable storage device" are defined to include any physical hardware (mechanical, magnetic, and/or electrical) for holding information for a period of time, but do not exclude signal propagation and to exclude transmission media. Examples of non-transitory computer-readable storage devices and/or non-transitory machine-readable storage devices include random-access memory of any type, read-only memory of any type, solid-state memory, flash memory, optical disks, magnetic disks, disk drives, and/or redundant array of independent disks (RAID) systems. As used herein, the term "device" refers to a physical structure such as mechanical and/or electrical equipment, hardware, and/or circuitry that may or may not be configured by computer-readable instructions, machine-readable instructions, etc., and/or manufactured to execute computer-readable instructions, machine-readable instructions, etc.

[0076] FIG. 5 is a representative flowchart of exemplary machine-readable instructions and/or exemplary operations 500 that may be executed, instantiated, and/or performed by programmable circuitry to implement exemplary implement selection circuitry 104 of FIGS. 1 and/or 2. The exemplary machine-readable instructions and/or exemplary operations 500 of FIG. 5 begin at block 502, in which exemplary implement selection circuitry 104 accesses exemplary location data 218 associated with a first exemplary operation (e.g., planting) performed by a vehicle (e.g., vehicle 102 of FIG. 1) in an exemplary field. For example, exemplary input interface circuitry 202 of FIG. 2 accesses and/or obtains location data 218 from exemplary GPS sensor 108 of vehicle 102, where location data 218 represents locations (e.g., geographic locations) of vehicle 102 at corresponding points in time during the first operation.

[0077] At block 504, exemplary implement selection circuitry 104 determines exemplary crop row locations based on location data 218. For example, exemplary row data determination circuitry 204 of FIG. 2 accesses location data 218 and/or exemplary implement data 222 of FIG. 2, wherein implement data 222 includes a first exemplary operational width of a first exemplary implement used by vehicle 102 (e.g., and/or a different vehicle) to perform the first operation. In some examples, based on the first operating width of the first implement and/or based on a first exemplary guidance line traveled by vehicle 102 during the first operation (e.g., depicted in location data 218), row data determination circuitry 204 determines the crop row locations of crop rows planted in the field.

[0078] At block 506, exemplary implement selection circuitry 104 identifies one or more exemplary candidate implements that may be used (e.g., by vehicle 102) to perform a second exemplary operation (e.g., spraying, harvesting, etc.) in the field. For example, exemplary path generation circuitry 206 of FIG. 2 identifies the second operation to be performed based on, for example, exemplary user input 226 at exemplary user interface 110 of FIG. 1. Additionally, path generation circuitry 206 identifies and/or selects, from the one or more exemplary implements represented in implement data 222, one or more exemplary candidate implements that may be used to perform the second operation.

[0079] At block 508, exemplary implement selection circuitry 104 generates one or more exemplary candidate guidance lines for the respective candidate implement(s) based on the crop row locations and exemplary operating width(s) of the candidate implement(s). For example, exemplary path generation circuitry 206 determines the operational width(s) for the corresponding candidate implement(s) based on implement data 222. Based on the operational width(s), path generation circuitry 206 generates candidate guidance line(s) along which vehicle 102 may travel to perform the second operation at the crop row locations using the respective candidate implement(s). In some examples, path generation circuitry 206 executes one or more exemplary path planning algorithms based on the crop row locations and/or the operational width(s) to produce the candidate guidance line(s).

[0080] At block 510, exemplary implement selection circuitry 104 calculates one or more exemplary crop damage metric(s) for the corresponding candidate guidance line(s) and/or candidate implement(s). For example, exemplary crop damage calculation circuitry 208 of FIG. 2 calculates and/or determines crop damage metric(s) by determining tire track locations of exemplary vehicle 102 as it travels the respective candidate guidance line(s), and identifying overlapping regions between the tire track locations and the crop row locations in the field. In some examples, crop damage calculation circuitry 208 determines crop damage metric(s) corresponding to an amount (e.g., an area, a percentage, etc.) of overlap between tire track locations and crop row locations.

[0081] At block 512, exemplary implement selection circuitry 104 determines whether there are any additional candidate implements to analyze. For example, path generation circuitry 206 determines whether there is at least one additional candidate implement (e.g., represented in implement data 222) that can be used to perform the second operation in the field. In response to path generation circuitry 206 determining that there is at least one additional candidate implement to analyze (e.g., block 512 returns a result of YES), control returns to block 506. Alternatively, in response to path generation circuitry 206 determining that there are no additional candidate implements to analyze (e.g., block 512 returns a result of NO), control proceeds to block 514.

[0082] In block 514, exemplary implement selection circuitry 104 selects the candidate implement(s) based on the corresponding crop damage metric(s). For example, crop damage calculation circuitry 208 selects the candidate implement(s) corresponding to the least predicted crop damage (e.g., as represented in the crop damage metric(s)) compared to the remainder of the candidate implement(s). In some examples, crop damage calculation circuitry 208 selects the candidate implement(s) based on a tradeoff between predicted crop damage and one or more exemplary parameters associated with the candidate guidance line(s) of the corresponding candidate implement(s). For example, the parameter(s) may include total length(s) of the candidate guidance line(s), predicted duration(s) to travel the candidate guidance line(s), number(s) of turns in the candidate guidance line(s), etc.

[0083] At block 516, exemplary implement selection circuitry 104 calculates one or more exemplary secondary metric(s) based on the crop damage metric(s). For example, exemplary secondary metric calculation circuitry 212 of FIG. 2 calculates secondary metric(s) corresponding to that of the candidate implement(s), where the secondary metric(s) includes at least one of a predicted profit and/or a predicted yield associated with the respective candidate implement(s). In some examples, secondary metric calculation circuitry 212 calculates secondary metric(s) based on the area(s) of damaged crop and/or undamaged crop (e.g., as represented in the crop damage metric(s)) predicted for the candidate implement(s).

[0084] At block 518, exemplary implement selection circuitry 104 generates and/or outputs exemplary display information 224 for presentation to an operator. For example, exemplary user interface circuitry 210 generates display information 224 corresponding to candidate implement(s), where display information 224 may include at least one of candidate guidance line(s), crop damage metric(s), or secondary metric(s) associated with candidate implement(s). In some examples, user interface circuitry 210 causes display information 224 to be presented to the operator (e.g., via exemplary user interface 110 of FIG. 1) to facilitate selection of one of the candidate implements for use during a second operation.

[0085] In block 520, exemplary implement selection circuitry 104 stores one or more exemplary metrics associated with the candidate implement(s) and/or the field. For example, crop damage calculation circuitry 208 provides the crop damage metric(s) to exemplary database 216 for storage in association with information (e.g., implement data 222) corresponding to the candidate implement(s) and/or the field on which the second operation is to be performed. Additionally, or alternatively, secondary metric calculation circuitry 212 provides the secondary metric(s) to exemplary database 216 for storage therein.

[0086] In block 522, exemplary implement selection circuitry 104 determines whether there are one or more additional fields to analyze. For example, exemplary communication circuitry 214 determines whether additional exemplary data (e.g., vehicle data, implement data, location data, etc.) is available for one or more additional fields. For example, communication circuitry 214 may access and/or obtain (e.g., via exemplary network 106 of FIG. 1) the additional data from one or more different vehicles operating in the additional field(s). In response to communication circuitry 214 determining that there are additional field(s) to analyze (e.g., block 522 returns a result of YES), control returns to block 502. Alternatively, in response to communication circuitry 214 determining that there are no additional fields to analyze (e.g., block 522 returns a result of NO), control proceeds to block 524.

[0087] In block 524, exemplary implement selection circuitry 104 analyzes exemplary data stored in database 216 to select implement(s) based on multiple fields. For example, crop damage calculation circuitry 208 may access crop damage metrics determined for multiple implements based on their respective different multiple fields, and crop damage calculation circuitry 208 may evaluate and/or compare the crop damage metrics to select the implement(s). In some examples, crop damage calculation circuitry 208 selects the implement(s) that result in a minimal amount of crop damage across multiple fields (e.g., compared to the remaining implement(s). In some examples, information (e.g., the operating width(s)) associated with the selected implement(s) may be stored and/or presented to an operator via display information 224.

[0088] FIG. 6 is a block diagram of an exemplary programmable circuitry platform 600 structured to execute and/or instantiate the exemplary machine-readable instructions and/or the exemplary operations of FIG. 5 to implement the implement selection circuitry 104 of FIG. 2. The programmable circuitry platform 600 may be, for example, a server, a personal computer, a workstation, a self-learning machine (e.g., a neural network), a mobile device (e.g., a cell phone, a smart phone, a tablet such as an iPad™), a personal digital assistant (PDA), an Internet device, a DVD player, a CD player, a digital video recorder, a Blu-ray player, a game console, a personal video recorder, a set-top box, a headset (e.g., an augmented reality (AR) headset, a virtual reality (VR) headset, etc.) or other wearable device, or any other type of computing and/or electronic device.

[0089] The programmable circuitry platform 600 of the illustrated example includes programmable circuitry 612. The programmable circuitry 612 of the illustrated example is hardware. For example, the programmable circuitry 612 may be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs, and/or microcontrollers from any desired family or manufacturer. The programmable circuitry 612 may be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, programmable circuitry 612 implements exemplary input interface circuitry 202, exemplary row data determination circuitry 204, exemplary path generation circuitry 206, exemplary crop damage calculation circuitry 208, exemplary user interface circuitry 210, exemplary secondary metric calculation circuitry 212, exemplary communication circuitry 214, and exemplary database 216.

[0090] The programmable circuitry 612 of the illustrated example includes a local memory 613 (e.g., a cache, registers, etc.). The programmable circuitry 612 of the illustrated example is in communication with the main memory 614, 616, which includes a volatile memory 614 and a non-volatile memory 616, by a bus 618. The volatile memory 614 may be implemented by Synchronous Dynamic Random Access Memory (SDRAM), Dynamic Random Access Memory (DRAM), RAMBUS® Dynamic Random Access Memory (RDRAM®), and/or any other type of RAM device. The non-volatile memory 616 may be implemented by flash memory and/or any other desired type of memory device. Access to main memory 614, 616 of the illustrated example is controlled by a memory controller 617. In some examples, memory controller 617 may be implemented by one or more integrated circuits, logic circuits, microcontrollers of any desired family or manufacturer, or any other type of circuitry to manage the flow of data to and from main memory 614, 616.

[0091] The programmable circuitry platform 600 of the illustrated example also includes interface circuitry 620. Interface circuitry 620 may be hardware-implemented in accordance with any type of interface standard, such as an Ethernet interface, a universal serial bus (USB) interface, a Bluetooth® interface, a near-field communication (NFC) interface, a Peripheral Component Interconnect (PCI) interface, and/or a Peripheral Component Interconnect Express (PCIe) interface.

[0092] In the illustrated example, one or more input devices 622 are connected to interface circuitry 620. Input device(s) 622 allow a user (e.g., a human user, a machine user, etc.) to input data and/or commands to programmable circuitry 612. Input device(s) 622 may be implemented by, for example, an audio sensor, a microphone, a camera (still or video), a keyboard, a button, a mouse, a touchscreen, a trackpad, a trackball, an isopoint device, and/or a speech recognition system.

[0093] One or more output devices 624 are also connected to the interface circuitry 620 of the illustrated example. The output device(s) 624 may be implemented, for example, by display devices (e.g., a light-emitting diode (LED), an organic light-emitting diode (OLED), a liquid crystal display (LCD), a cathode ray tube (CRT) display, an in-plane switch display (IPS), a touch screen, etc.), a tactile output device, a printer, and/or a speaker. The interface circuitry 620 of the illustrated example thus typically includes a graphics card, a graphics chip, and/or graphics processor circuitry such as a GPU.

[0094] The interface circuitry 620 of the illustrated example also includes a communication device such as a transmitter, a receiver, a transceiver, a modem, a home gateway, a wireless access point, and/or a network interface to facilitate the exchange of data with external machines (e.g., computing devices of any type) over a network 626. Communication may be, for example, over an Ethernet connection, a digital subscriber line (DSL) connection, a telephone line connection, a coaxial cable system, a satellite system, a beyond-line-of-sight wireless system, a line-of-sight wireless system, a cellular telephone system, an optical connection, etc.

[0095] The programmable circuitry platform 600 of the illustrated example also includes one or more disks or mass storage devices 628 for storing firmware, software, and/or data. Examples of such disks or mass storage devices 628 include magnetic storage devices (e.g., floppy disk drives, HDDs, etc.), optical storage devices (e.g., Blu-ray Discs, CDs, DVDs, etc.), RAID systems, and/or solid-state storage devices or disks such as flash memory devices and/or SSDs.

[0096] Machine-readable instructions 632, which may be implemented by the machine-readable instructions of FIG. 5, may be stored in mass storage device 628, volatile memory 614, non-volatile memory 616, and/or on at least one non-transitory computer-readable storage medium such as a CD or DVD that may be removable.

[0097] FIG. 7 is a block diagram of an exemplary implementation of the programmable circuitry 612 of FIG. 6. In this example, the programmable circuitry 612 of FIG. 6 is implemented by a microprocessor 700. For example, the microprocessor 700 may be a general-purpose microprocessor (e.g., general-purpose microprocessor circuitry). The microprocessor 700 executes some or all of the machine-readable instructions of the flowchart of FIG. 5 to effectively instantiate the circuitry of FIG. 2 as logic circuits for performing operations corresponding to the machine-readable instructions. In some such examples, the circuitry of FIG. 2 is instantiated by the hardware circuitry of the microprocessor 700 in combination with the machine-readable instructions. For example, microprocessor 700 may be implemented by a multi-core hardware circuitry such as a CPU, a DSP, a GPU, an XPU, etc. While it may include any number of exemplary cores 702 (e.g., 1 core), microprocessor 700 of this example is a multi-core semiconductor device comprising N cores. The cores 702 of microprocessor 700 may operate independently or may cooperate to execute machine-readable instructions. For example, machine code corresponding to a firmware program, an embedded software program, or a software program may be executed by one of the cores 702, or may be executed by multiple of the cores 702 at the same time, or at different times. In some examples, the machine code corresponding to the firmware program, the embedded software program, or the software program is divided into threads and executed in parallel by two or more of the cores 702. The software program may correspond to a portion or all of the machine-readable instructions and/or operations represented by the flowchart of FIG. 5.

[0098] The cores 702 may communicate over an exemplary first bus 704. In some examples, the first bus 704 may be implemented by a communication bus for effecting communication associated with the core(s) 702. For example, the first bus 704 may be implemented by at least one of an Inter-Integrated Circuit (I2C) bus, a Serial Peripheral Interface (SPI) bus, a PCI bus, or a PCIe bus. Additionally, or alternatively, the first bus 704 may be implemented by any other type of computing or electrical bus. The cores 702 may obtain data, instructions, and/or signals from one or more external devices via the exemplary interface circuitry 706. The cores 702 may output data, instructions, and/or signals to the one or more external devices via the interface circuitry 706. Although the cores 702 of this example include exemplary local memory 720 (e.g., Level 1 (L1) cache that may be divided into an L1 data cache and an L1 instruction cache), the microprocessor 700 also includes exemplary shared memory 710 that may be shared by the cores (e.g., Level 2 (L2 cache)) for high-speed access to data and/or instructions. Data and/or instructions may be transferred (e.g., shared) by writing to and/or reading from shared memory 710. Local memory 720 of each of cores 702 and shared memory 710 may be part of a hierarchy of storage devices including multiple levels of cache memory and main memory (e.g., main memory 614, 616 of FIG. 6). Typically, higher levels of memory in the hierarchy exhibit slower access times and have lower storage capacity than lower levels of memory. Changes to the various levels of the cache hierarchy are managed (e.g., coordinated) by a cache coherence policy.

[0099] Each core 702 may be referred to as a CPU, DSP, GPU, etc., or any other type of hardware circuitry. Each core 702 includes control unit circuitry 714, arithmetic and logic (AL) circuitry (sometimes referred to as an ALU) 716, a plurality of registers 718, local memory 720, and a second exemplary bus 722. Other structures may be present. For example, each core 702 may include vector unit circuitry, single instruction multiple data (SIMD) unit circuitry, load/store unit (LSU) circuitry, tap/jump unit circuitry, floating point unit (FPU) circuitry, etc. The control unit circuitry 714 includes structured semiconductor-based circuitry for controlling (e.g., coordinating) the movement of data within the corresponding core 702. The AL circuitry 716 includes structured semiconductor-based circuitry for performing one or more mathematical and/or logical operations on the data within the corresponding core 702. The AL circuitry 716 in some examples performs integer-based operations. In other examples, the AL circuitry 716 also performs floating-point operations. In still other examples, the AL circuitry 716 may include a first AL circuitry that performs integer-based operations and a second AL circuitry that performs floating-point operations. In some examples, the AL circuitry 716 may be referred to as an Arithmetic Logic Unit (ALU).

[00100] Registers 718 are semiconductor-based structures for storing data and/or instructions such as results of one or more of the operations performed by circuitry AL 716 of corresponding core 702. For example, registers 718 may include vector register(s), SIMD register(s), general purpose register(s), flag register(s), segment register(s), machine specific register(s), instruction pointer register(s), control register(s), debug register(s), memory management register(s), machine check register(s), etc. Registers 718 may be arranged in a bank as shown in FIG. 7. Alternatively, registers 718 may be organized in any other arrangement, format, or structure, such as being distributed throughout core 702 to reduce access time. The second bus 722 may be implemented by at least one of an I2C bus, an SPI bus, a PCI bus, or a PCIe bus.

[00101] Each core 702 and/or, more generally, the microprocessor 700 may include additional and/or alternative structures to those shown and described herein. For example, one or more clock circuits, one or more power supplies, one or more power gates, one or more cache home agents (CHAs), one or more converged/common mesh stops (CMSs), one or more shifters (e.g., barrel shifter(s), and/or other circuitry may be present. The microprocessor 700 is a fabricated semiconductor device including many interconnected transistors to implement the above-described structures in one or more integrated circuits (ICs) contained in one or more packages.

[00102] The microprocessor 700 may include and/or cooperate with one or more accelerators (e.g., accelerator circuitry, hardware accelerators, etc.). In some examples, accelerators are implemented by logic circuitry to perform certain tasks faster and/or more efficiently than can be done by a general-purpose processor. Examples of accelerators include ASICs and FPGAs such as those discussed herein. A GPU, DSP, and/or other programmable device may also be an accelerator. Accelerators may be internal to the microprocessor 700, in the same chip package as the microprocessor 700, and/or in one or more packages separate from the microprocessor 700.

[00103] FIG. 8 is a block diagram of another exemplary implementation of the programmable circuitry 612 of FIG. 6. In this example, the programmable circuitry 612 is implemented by FPGO circuitry 800. For example, the FPGO circuitry 800 may be implemented by an FPGA. The FPGO circuitry 800 may be used, for example, to perform operations that could otherwise be performed by the exemplary microprocessor 700 of FIG. 7 executing corresponding machine-readable instructions. However, once configured, the FPGO circuitry 800 instantiates the operations and/or functions corresponding to the machine-readable instructions in hardware, and thus can often perform the operations/functions faster than they could be performed by a general-purpose microprocessor executing corresponding software.

[00104] More specifically, unlike the microprocessor 700 of FIG. 7 described above (which is a general-purpose device that can be programmed to execute some or all of the machine-readable instructions represented by the flowchart(s) of FIG. 5, but whose interconnections and logic circuitry are fixed once manufactured), the FPGO circuitry 800 of the example of FIG. 8 includes interconnections and logic circuitry that can be configured, structured, programmed, and/or interconnected in different ways after fabrication to instantiate, for example, some or all of the operations/functions corresponding to the machine-readable instructions represented by the flowchart(s) of FIG. 5. In particular, the FPGO circuitry 800 can be considered an arrangement of logic gates, interconnections, and switches. The switches may be programmed to change how the logic gates are interconnected by the interconnects, effectively forming one or more dedicated logic circuits (unless and until the FPGO circuitry 800 is reprogrammed). The configured logic circuits allow the logic gates to cooperate in different ways to perform different operations on data received by the input circuitry. These operations may correspond to some or all of the instructions (e.g., the software and/or firmware) represented by the flowchart(s) of FIG. 5. As such, the FPGO circuitry 800 may be configured and/or structured to effectively instantiate some or all of the operations/functions corresponding to the machine-readable instructions of the flowchart(s) of FIG. 5 as dedicated logic circuits to perform the operations/functions corresponding to the software instructions in a dedicated manner analogous to an ASIC. Therefore, the FPGO circuitry 800 can perform the operations/functions corresponding to some or all of the machine-readable instructions of FIG. 5 faster than the general-purpose microprocessor can perform the same.

[00105] In the example of FIG. 8, the FPGO circuitry 800 is configured and/or structured in response to being programmed (and/or reprogrammed one or more times) based on a binary file. In some examples, the binary file may be compiled and/or generated based on instructions in a hardware description language (HDL) such as Lucid, Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL), or Verilog. For example, a user (e.g., a human user, a machine user, etc.) may write code or a program corresponding to one or more operations/functions in an HDL; the code/program may be translated into a low-level language in the manner needed; and the code/program (e.g., the code/program in the low-level language) may be converted (e.g., by a compiler, a software application, etc.) into the binary file. In some examples, the FPGO circuitry 800 of FIG. 8 may access and/or load the binary file to cause the FPGO circuitry 800 of FIG. 8 to be configured and/or structured to perform the one or more operations/functions. For example, the binary file may be implemented by a stream of bits (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.), and/or machine-readable instructions accessible to the FPGO circuitry 800 of FIG. 8 to cause the configuration and/or structuring of the FPGO circuitry 800 of FIG. 8, or portion(s) thereof.

[00106] In some examples, the binary file is compiled, generated, transformed, and/or otherwise produced from a uniform software platform used to program FPGAs. For example, the uniform software platform may translate first instructions (e.g., code or a program) that correspond to one or more operations/functions in a high-level language (e.g., C, C++, Python, etc.) into second instructions that correspond to one or more operations/functions in an HDL. In some such examples, the binary file is compiled, generated, and/or otherwise produced from the uniform software platform based on the second instructions. In some examples, the FPGO circuitry 800 of FIG. 8 may access and/or load the binary file to cause the FPGO circuitry 800 of FIG. 8 to be configured and/or structured to perform the one or more operations/functions. For example, the binary file may be implemented by a stream of bits (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.), and/or machine-readable instructions accessible to the FPGO circuitry 800 of FIG. 8 to cause configuration and/or structuring of the FPGO circuitry 800 of FIG. 8, or portion(s) thereof.

[00107] The FPGO circuitry 800 of FIG. 8 includes exemplary input/output (I/O) circuitry 802 for obtaining and/or producing data to/from exemplary configuration circuitry 804 and/or external hardware 806. For example, configuration circuitry 804 may be implemented by interface circuitry that may also be a binary file, which may be implemented by a stream of bits, data, and/or machine-readable instructions, for configuring the FPGO circuitry 800, or portion(s) thereof. In some such examples, the configuration circuitry 804 may obtain the binary file from a user, a machine (e.g., hardware circuitry (e.g., programmable or dedicated circuitry) that may implement an Artificial Intelligence/Machine Learning (AI/ML) model to generate the binary file), etc., and/or any combination(s) thereof). In some examples, the external hardware 806 may be implemented by external hardware circuitry. For example, the external hardware 806 may be implemented by the microprocessor 700 of FIG. 7.

[00108] The FPGO circuitry 800 also includes an arrangement of exemplary logic gate circuitry 808, a plurality of exemplary configurable interconnects 810, and exemplary storage circuitry 812. The logic gate circuitry 808 and the configurable interconnects 810 are configurable to instantiate one or more operations/functions that may correspond to at least some of the machine-readable instructions of FIG. 5 and/or other desired operations. The logic gate circuitry 808 shown in FIG. 8 is fabricated in blocks or groups. Each block includes semiconductor-based electrical structures that can be configured into logic circuits. In some examples, the electrical structures include logic gates (e.g., AND gates, OR gates, NOR gates, etc.) that provide basic building blocks for logic circuits. Electrically controllable switches (e.g., transistors) are present within each of the 808 logic gate circuitry to allow configuration of the electrical structures and/or the logic gates to form circuits to perform desired operations/functions. The 808 logic gate circuitry may include other electrical structures such as look-up tables (LUTs), registers (e.g., flip-flops or latches), multiplexers, etc.

[00109] The configurable interconnects 810 of the illustrated example are conductive paths, traces, vias, or the like that may include electrically controllable switches (e.g., transistors) whose state can be changed by programming (e.g., using an HDL instruction language) to activate or deactivate one or more connections between one or more of the logic gate circuitry 808 to program desired logic circuits.

[00110] Storage circuitry 812 of the illustrated example is structured to store result(s) of one or more of the operations performed by corresponding logic gates. Storage circuitry 812 may be implemented by registers or the like. In the illustrated example, storage circuitry 812 is distributed among logic gate circuitry 808 to facilitate access and increase execution speed.

[00111] The exemplary FPGO circuitry 800 of FIG. 8 also includes exemplary dedicated operations circuitry 814. In this example, the dedicated operations circuitry 814 includes special-purpose circuitry 816 that can be invoked to implement commonly used functions to avoid the need to program those functions in the field. Examples of such special-purpose circuitry 816 include memory (e.g., DRAM) controller circuitry, PCIe controller circuitry, clock circuitry, transceiver circuitry, memory, and multiplier-accumulator circuitry. Other types of special-purpose circuitry may be present. In some examples, FPGO circuitry 800 may also include exemplary programmable general-purpose circuitry 818 such as an exemplary CPU 820 and/or an exemplary DSP 822. Other general-purpose programmable circuitry 818 may additionally, or alternatively, be present such as a GPU, an XPU, etc., which may be programmed to perform other operations.

[00112] Although FIGS. 7 and 8 illustrate two exemplary implementations of the programmable circuitry 612 of FIG. 6, many other approaches are contemplated. For example, the FPGO circuitry may include an internal CPU, such as one or more of the exemplary CPU 820 of FIG. 7. Therefore, the programmable circuitry 612 of FIG. 6 may further be implemented by combining at least the exemplary microprocessor 700 of FIG. 7 and the exemplary FPGO circuitry 800 of FIG. 8. In some such hybrid examples, one or more cores 702 of FIG. 7 may execute a first portion of the machine-readable instructions represented by the flowchart(s) of FIG. 5 to perform first operation(s)/function(s), the FPGO circuitry 800 of FIG. 8 may be configured and/or structured to perform second operation(s)/function(s) corresponding to a second portion of the machine-readable instructions represented by the flowchart of FIG. 5, and/or an ASIC may be configured and/or structured to perform third operation(s)/function(s) corresponding to a third portion of the machine-readable instructions represented by the flowchart of FIG. 5.

[00113] It should be understood that some or all of the circuitry of FIG. 2 may thus be instantiated at the same time, or at different times. For example, the same and/or different portion(s) of the microprocessor 700 of FIG. 7 may be programmed to execute portion(s) of machine-readable instructions at the same time and/or different times. In some examples, the same and/or different portion(s) of the FPGO circuitry 800 of FIG. 8 may be configured and/or structured to perform operations/functions corresponding to the portion(s) of machine-readable instructions at the same time and/or different times.

[00114] In some examples, some or all of the circuitry of FIG. 2 may be instantiated, for example, in one or more threads executing concurrently and/or serially. For example, the microprocessor 700 of FIG. 7 may execute machine-readable instructions in one or more threads executing concurrently and/or serially. In some examples, the FPGO circuitry 800 of FIG. 8 may be configured and/or structured to perform operations/functions concurrently and/or serially. Furthermore, in some examples, some or all of the circuitry of FIG. 2 may be implemented within one or more virtual machines and/or containers executing on the microprocessor 700 of FIG. 7.

[00115] In some examples, the programmable circuitry 612 of FIG. 6 may be in one or more packages. For example, the microprocessor 700 of FIG. 7 and/or the FPGO circuitry 800 of FIG. 8 may be in one or more packages. In some examples, an XPU may be implemented by the programmable circuitry 612 of FIG. 6, which may be in one or more packages. For example, the XPU may include a CPU (e.g., the microprocessor 700 of FIG. 7, the CPU 820 of FIG. 8, etc.) in one package, a DSP (e.g., the DSP 822 of FIG. 8) in another package, a GPU in yet another package, and an FPGA (e.g., the FPGO circuitry 800 of FIG. 8) in yet another package.

[00116] A block diagram illustrating an exemplary software distribution platform 905 for distributing software such as the exemplary machine-readable instructions 632 of FIG. 6 to other hardware devices (e.g., hardware devices owned and/or operated by third parties of the owner and/or operator of the software distribution platform) is illustrated in FIG. 9. The exemplary software distribution platform 905 may be implemented by any server computer, data facility, cloud service, etc., capable of storing and transmitting software to other computing devices. The third parties may be customers of the entity that owns and/or operates the software distribution platform 905. For example, the entity that owns and/or operates the software distribution platform 905 may be a developer, a vendor, and/or a licensor of software such as the exemplary machine-readable instructions 632 of FIG. 6. Third parties may be consumers, users, resellers, OEMs, etc., who purchase and/or license the software for use and/or resale and/or sublicense. In the illustrated example, the software distribution platform 905 includes one or more servers and one or more storage devices. The storage devices store machine-readable instructions 632, which may correspond to the exemplary machine-readable instructions of FIG. 5, as described herein. The one or more servers of the exemplary software distribution platform 905 are in communication with an exemplary network 910, which may correspond to any one or more of the Internet and/or any of the exemplary networks described above. In some examples, the one or more servers are responsive to requests to transmit the software to a requesting party as part of a commercial transaction. Payment for the delivery, sale, and/or license of the software may be handled by one or more servers of the software distribution platform and/or a third-party payment entity. The servers allow purchasers and/or licensors to transfer machine-readable instructions 632 from the software distribution platform 905. For example, software that may correspond to the exemplary machine-readable instructions of FIG. 5 may be transferred to the exemplary programmable circuitry platform 600, which must execute the machine-readable instructions 632 to implement the implement selection circuitry 104. In some examples, one or more servers of the software distribution platform 905 periodically offer, transmit, and/or force updates to the software (e.g., the exemplary machine-readable instructions 632 of FIG. 6) to ensure that improvements, patches, updates, etc. are distributed and applied to the software on end-user devices. Although referred to here as software, the distributed "software" could alternatively be firmware.

[00117] "Including" and "comprising" (and all forms and tenses thereof) are used herein as open terms. Thus, whenever a claim employs any form of "include" or "comprise" (e.g., comprises, includes, comprising, including, having, etc.) as a preamble or within a claim citation of any kind, it should be understood that additional elements, terms, etc. may be present without falling outside the scope of the corresponding claim or citation. As used herein, when the phrase "at least" is used as a transitional term, e.g., in a preamble to a claim, it is open in the same way that the terms "comprising" and "including" are open. The term "and/or", when used, for example, in a form such as A, B, and/or C, refers to any combination or subset of A, B, and C such as (1) A alone, (2) B alone, (3) C alone, (4) A with B, (5) A with C, (6) B with C, or (7) A with B and with C. As used herein in the context of describing structures, components, items, objects, and/or things, the phrase "at least one of A and B" shall refer to implementations including any one of (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing structures, components, items, objects, and/or things, the phrase "at least one of A or B" shall refer to implementations including any one of (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. least one B. As used herein in the context of describing the realization or execution of processes, instructions, actions, activities, etc., the phrase "at least one of A and B" shall refer to implementations including any one of (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the realization or execution of processes, instructions, actions, activities, etc., the phrase "at least one of A or B" shall refer to implementations including any one of (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.

[00118] As used herein, singular references (e.g., "a," "an," "first," "second," etc.) do not exclude a plurality. The term "any" or "a" specific object, as used herein, refers to one or more such object. The terms "any" (or "an") specific, "one or more," and "at least one" are used interchangeably herein. Furthermore, although individually listed, a plurality of means, elements, or actions may be implemented by, for example, the same entity or object. Furthermore, although individual features may be included in different examples or claims, these may possibly be combined, and inclusion in different examples or claims does not imply that a combination of features is not feasible and/or advantageous.

[00119] As used herein, unless otherwise stated, the term "above" describes the relationship of two parties relative to the ground. A first party is above a second party if the second party has at least one party between the ground and the first party. Similarly, as used herein, a first party is "below" a second party when the first party is closer to the ground than the second party. As noted herein, a first party may be above or below a second party with one or more of: other parties between them, with no other parties between them, with the first and second parties touching, or without the first and second parties being in direct contact with each other.

[00120] Regardless of the foregoing, when referring to a semiconductor device (e.g., a transistor), a semiconductor die containing a semiconductor device, and/or an integrated circuit (IC) package containing a semiconductor die during fabrication or manufacturing, "above" is not with reference to ground, but rather is with reference to an underlying substrate on which relevant components are fabricated, assembled, mounted, supported, or otherwise provided. Thus, as used herein, and unless otherwise stated or implied by context, a first component within a semiconductor die (e.g., a transistor or other semiconductor device) is "above" a second component within the semiconductor die when the first component is further away from a substrate (e.g., a semiconductor gap) during fabrication/manufacturing than the second component on which the two components are fabricated or otherwise provided. Similarly, unless otherwise stated or implied by context, a first component within an IC package (e.g., a semiconductor die) is "above" a second component within the IC package during fabrication when the first component is furthest from a printed circuit board (PCB) on which the IC package is to be mounted or bonded. It should be understood that semiconductor devices are often used in an orientation different from their orientation during fabrication. Thus, when referring to a semiconductor device (e.g., a transistor), a semiconductor die containing a semiconductor device, and/or an integrated circuit (IC) package containing a semiconductor die during use, the definition of "above" in the preceding paragraph (i.e., the term "above" describes the relationship of two parts relative to ground) will likely govern based on the context of use.

[00121] As used in this patent, the statement that any part (e.g., a layer, film, area, region, or plate) is in any manner on (e.g., positioned on, located in, disposed in, or formed in, etc.) another part indicates that the referenced part is either in contact with the other, or that the referenced part is above the other part with one or more intermediate part(s) located therebetween.

[00122] As used herein, references to connections (e.g., linked, coupled, connected, and joined) may include intermediate members between those elements referenced by the connection reference and/or relative motion between those elements, unless otherwise indicated. As such, connection references do not necessarily infer that two elements are directly connected and/or in fixed relation to each other. As used herein, the statement that any part is in "contact" with another part is defined to mean that no intermediate part exists between the two parts.

[00123] Unless specifically stated otherwise, descriptors such as "first," "second," "third," etc. are used herein without implying or otherwise indicating any meaning of priority, physical order, arrangement in a list, and/or ordering in any manner, but are merely used as labels and/or arbitrary names to distinguish elements for ease of understanding of the described examples. In some examples, the descriptor "first" may be used to refer to an element in the detailed description, although the same element may be referred to in a claim with a different descriptor such as "second" or "third." In such cases, it should be understood that such descriptors are used merely to identify these elements distinctly within the context of the discussion (e.g., within a claim) in which the elements may, for example, otherwise share a common name.

[00124] As used herein, "approximately" and "about" modify their subjects/values to recognize the potential presence of variations that occur in real-world applications. For example, "approximately" and "about" may modify dimensions that may not be exact because of manufacturing tolerances and/or other real-world imperfections as will be understood by those skilled in the art. For example, "approximately" and "about" may indicate that such dimensions may be within a tolerance range of +/- 10% unless otherwise specified herein.

[00125] As used herein, "substantially real time" refers to occurring in a near-instantaneous manner, recognizing that there may be real-world delays in computing time, transmission, etc. Thus, unless otherwise specified, "substantially real time" refers to real time + 1 second.

[00126] As used herein, the term "in communication," including variations thereof, encompasses direct communication and/or indirect communication through one or more intermediate components, and does not require direct physical communication (e.g., by wire) and/or constant communication, but instead further includes selective communication at periodic intervals, scheduled intervals, aperiodic intervals, and/or one-time events.

[00127] As used herein, "programmable circuitry" is defined to include (i) one or more special-purpose electrical circuits (e.g., an application-specific circuit (ASIC)) structured to perform specific operation(s) and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors), and/or (ii) one or more general-purpose semiconductor-based electrical circuits programmable with instructions to perform specific function(s) and/or operation(s) and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuitry include programmable microprocessors such as Central Processing Units (CPUs) that can execute first instructions to perform one or more operations and/or functions, Field Programmable Gate Arrays (FPGAs) that can be programmed with second instructions to cause the configuration and/or structuring of the FPGAs to instantiate one or more operations and/or functions corresponding to the first instructions, Graphics Processor Units (GPUs) that can execute first instructions to perform one or more operations and/or functions, Digital Signal Processors (DSPs) that can execute first instructions to perform one or more operations and/or functions, XPUs, Network Processing Units (NPUs) one or more microcontrollers that can execute first instructions to perform one or more operations and/or functions, and/or integrated circuits such as Application Specific Integrated Circuits (ASICs). For example, an XPU may be implemented by a heterogeneous computing system including multiple types of programmable circuitry (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and/or any combination(s) thereof), and orchestration technology (e.g., application programming interface(s) (API(s)) that can assign computing task(s) to any of the multiple types of programmable circuitry is/are suitable and available) to perform the computing task(s).

[00128] As used herein, integrated circuit/circuitry is defined as one or more semiconductor packages containing one or more circuit elements such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit may be implemented as one or more of an ASIC, an FPGA, a chip, a microchip, programmable circuitry, a semiconductor substrate coupling multiple circuit elements, a system-on-chip (SoC), etc.

[00129] From the foregoing, it is understood that exemplary systems, apparatus, articles of manufacture, and methods have been described that reduce crop damage by selecting operating width(s) of implement(s) to be used with an agricultural vehicle. The examples described herein generate exemplary candidate guidance lines to be traveled by the vehicle during an exemplary operation in a field, where the candidate guidance lines are generated based on respective different implements having respective different operating widths. Additionally, the described examples calculate one or more exemplary crop damage metrics (e.g., the area(s) of crop damage and/or ratio(s) of the area(s) of crop damage relative to the area(s) of the field) associated with crop damage expected to occur when the vehicle travels the corresponding candidate guidance lines. The examples described select, based on crop damage metric(s), the implement(s) to be used for operation in the field, where the selected implement(s) are expected to result in reduced crop damage (e.g., compared to the remaining implement(s). Advantageously, the examples described herein can reduce crop damage resulting from one or more operations in a field, thereby improving the yield and/or profit associated with the crops in the field. Additionally, by automatically generating guidance paths for steering a vehicle based on the implement(s) to be used by the vehicle, the systems, apparatus, articles of manufacture, and methods described improve the efficiency of use of a computing device by reducing the amount of user input required from an operator. The systems, apparatus, articles of manufacture, and methods described are thus directed toward one or more improvement(s) in the operation of a machine such as a computer or other electronic and/or mechanical device.

[00130] Exemplary methods, apparatus, systems, and articles of manufacture for selecting operational widths of implements for an agricultural vehicle are described herein. Additional examples and combinations thereof include the following: Example 1 includes an apparatus comprising interface circuitry, machine-readable instructions, and at least one processor circuit to be programmed by the machine-readable instructions to identify a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width, generate a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data, calculate a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line, and select one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric.

[00131] Example 2 includes the apparatus of example 1, wherein one or more of the at least one processor circuits are for determining at least one secondary metric based on at least one of the first crop damage metric or the second crop damage metric, the at least one secondary metric including at least one of a predicted crop yield or a predicted profit associated with at least one of the first implement or the second implement.

[00132] Example 3 includes the apparatus of example 1, wherein one or more of the at least one processor circuits are for causing the vehicle to steer along one of the first guidance line or the second guidance line corresponding to the selected one of the first implement or the second implement.

[00133] Example 4 includes the apparatus of example 1, wherein one or more of the at least one processor circuits are for calculating the first crop damage metric based on a first area of overlap between crop row locations and first vehicle tire tracks along the first guidance line, and calculating the second crop damage metric based on a second area of overlap between crop row locations and second vehicle tire tracks along the second guidance line.

[00134] Example 5 includes the apparatus of example 1, wherein one or more of the at least one processor circuits are for selecting the first implement in response to determining that the first crop damage metric is less than the second crop damage metric, and selecting the second implement in response to determining that the second crop damage metric is less than the first crop damage metric.

[00135] Example 6 includes the apparatus of example 1, wherein the field is a first field, and wherein one or more of the at least one processor circuits are for selecting the selected one of the first implement or the second implement for use in performing a third operation in a second field, the second field different from the first field.

[00136] Example 7 includes the apparatus of example 1, wherein one or more of the at least one processor circuits are for presenting, via a user interface, display information corresponding to the selected one of the first implement or the second implement.

[00137] Example 8 includes at least one non-transitory machine-readable medium comprising machine-readable instructions to cause at least one processor circuit to at least identify a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width, generate a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data, calculate a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line, and select one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric.

[00138] Example 9 includes the at least one non-transitory machine-readable medium of example 8, wherein the machine-readable instructions must cause one or more of the at least one processor circuit to determine at least one secondary metric based on at least one of the first crop damage metric or the second crop damage metric, the at least one secondary metric including at least one of a predicted crop yield or a predicted profit associated with at least one of the first implement or the second implement.

[00139] Example 10 includes the at least one non-transitory machine-readable medium of example 8, wherein the machine-readable instructions are to cause one or more of the at least one processor circuit to cause the vehicle to steer along one of the first guidance line or the second guidance line corresponding to the selected one of the first implement or the second implement.

[00140] Example 11 includes the at least one non-transitory machine-readable medium of example 8, wherein the machine-readable instructions must cause one or more of the at least one processor circuit to calculate a first crop damage metric based on a first area of overlap between crop row locations and first vehicle tire tracks along the first guidance line, and calculate a second crop damage metric based on a second area of overlap between crop row locations and second vehicle tire tracks along the second guidance line.

[00141] Example 12 includes the at least one non-transitory machine-readable medium of example 8, wherein the machine-readable instructions must cause one or more of the at least one processor circuit to select the first implement in response to determining that the first crop damage metric is less than the second crop damage metric, and select the second implement in response to determining that the second crop damage metric is less than the first crop damage metric.

[00142] Example 13 includes the at least one non-transitory machine-readable medium of example 8, wherein the field is a first field, and wherein the machine-readable instructions must cause one or more of the at least one processor circuit to select the selected one of the first implement or the second implement for use in performing a third operation on a second field, the second field being different from the first field.

[00143] Example 14 includes the at least one non-transitory machine-readable medium of example 8, wherein the machine-readable instructions must cause one or more of the at least one processor circuit to present, via a user interface, display information corresponding to the selected one of the first implement or the second implement.

[00144] Example 15 includes a method comprising identifying a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width, generating a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data, calculating, by at least one processor circuit programmed by at least one instruction, a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line, and selecting, by one or more of the at least one processor circuit, one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric.

[00145] Example 16 includes the method of example 15, further including determining at least one secondary metric based on at least one of the first crop damage metric or the second crop damage metric, the at least one secondary metric including at least one of a predicted crop yield or a predicted profit associated with at least one of the first implement or the second implement.

[00146] Example 17 includes the method of example 15, further including causing the vehicle to steer along one of the first guidance line or the second guidance line corresponding to the selected one of the first implement or the second implement.

[00147] Example 18 includes the method of example 15, further including calculating the first crop damage metric based on a first area of overlap between crop row locations and first vehicle tire tracks along the first guidance line, and calculating the second crop damage metric based on a second area of overlap between crop row locations and second vehicle tire tracks along the second guidance line.

[00148] Example 19 includes the method of example 15, further including selecting the first implement in response to determining that the first crop damage metric is less than the second crop damage metric, and selecting the second implement in response to determining that the second crop damage metric is less than the first crop damage metric.

[00149] Example 20 includes the method of example 15, wherein the field is a first field, further including selecting the selected from a first implement or the second implement for use in performing a third operation on a second field, the second field different from the first field.

[00150] The following claims are hereby incorporated into this Detailed Description by this reference. Although certain exemplary systems, apparatus, articles of manufacture, and methods have been described herein, the scope of coverage of this patent is not limited thereto. Rather, this patent covers all systems, apparatus, articles of manufacture, and methods that reasonably fall within the scope of the claims of this patent.

Claims (15)

1. Apparatus, characterized by the fact that it comprises: a set of interface circuits; machine-readable instructions; and at least one processor circuit to be programmed by the machine-readable instructions to: identify a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width; generate a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data; calculate a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line; and select one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric. 2. The apparatus of claim 1, wherein one or more of the at least one processor circuits are for determining at least one secondary metric based on at least one of the first crop damage metric or the second crop damage metric, the at least one secondary metric including at least one of a predicted crop yield or a predicted profit associated with at least one of the first implement or the second implement. 3. Apparatus according to claim 1 or 2, characterized in that one or more of the at least one processor circuits are for causing steering of the vehicle along one of the first guidance line or the second guidance line corresponding to the selected one of the first implement or the second implement. 4. The apparatus of claim 1 or 2, wherein one or more of the at least one processor circuits are for: calculating the first crop damage metric based on a first area of overlap between crop row locations and first vehicle tire tracks along the first guidance line; and calculating the second crop damage metric based on a second area of overlap between the crop row locations and second vehicle tire tracks along the second guidance line. 5. The apparatus of claim 1 or 2, wherein one or more of the at least one processor circuits are for: selecting the first implement in response to determining that the first crop damage metric is less than the second crop damage metric; and selecting the second implement in response to determining that the second crop damage metric is less than the first crop damage metric. 6. Apparatus according to claim 1 or 2, characterized in that the field is a first field, and in which one or more of the at least one processor circuits are for selecting the selected one of the first implement or the second implement for use in performing a third operation in a second field, the second field different from the first field. 7. Apparatus according to claim 1 or 2, characterized in that one or more of the at least one processor circuits are for presenting, via a user interface, display information corresponding to the selected one of the first implement or the second implement. 8. At least one machine-readable medium, characterized in that it comprises machine-readable instructions for causing at least one processor circuit to at least: identify a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width; generate a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data; calculate a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line; and select one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric. 9. The at least one machine-readable medium of claim 8, wherein the machine-readable instructions must cause one or more of the at least one processor circuit to determine at least one secondary metric based on at least one of the first crop damage metric or the second crop damage metric, the at least one secondary metric including at least one of a predicted crop yield or a predicted profit associated with at least one of the first implement or the second implement. 10. At least one machine-readable medium according to claim 8 or 9, characterized in that the machine-readable instructions must cause one or more of the at least one processor circuit to cause the vehicle to steer along one of the first guidance line or the second guidance line corresponding to the selected one of the first implement or the second implement. 11. At least one machine-readable medium according to claim 8 or 9, characterized in that the machine-readable instructions must cause one or more of the at least one processor circuit to: calculate the first crop damage metric based on a first area of overlap between crop row locations and first vehicle tire tracks along the first guidance line; and calculate the second crop damage metric based on a second area of overlap between crop row locations and second vehicle tire tracks along the second guidance line. 12. The at least one machine-readable medium of claim 8 or 9, wherein the machine-readable instructions must cause one or more of the at least one processor circuit to: select the first implement in response to determining that the first crop damage metric is less than the second crop damage metric; and select the second implement in response to determining that the second crop damage metric is less than the first crop damage metric. 13. A method comprising: identifying a first implement and a second implement available for a second operation in a field, the second operation to be performed after a first operation in the field, the first implement having a first operating width, the second implement having a second operating width different from the first operating width; generating a first guidance line and a second guidance line for the second operation, the first guidance line based on the first operating width and location data of a vehicle during the first operation, the second guidance line based on the second operating width and location data; calculating, by at least one processor circuit programmed by at least one instruction, a first crop damage metric corresponding to the first guidance line and a second crop damage metric corresponding to the second guidance line; and selecting, by one or more of the at least one processor circuit, one of the first implement or the second implement based on the first crop damage metric and the second crop damage metric. 14. The method of claim 13, further including determining at least one secondary metric based on at least one of the first crop damage metric or the second crop damage metric, the at least one secondary metric including at least one of a predicted crop yield or a predicted profit associated with at least one of the first implement or the second implement. 15. The method of claim 13 or 14, further including causing the vehicle to steer along one of the first guidance line or the second guidance line corresponding to the selected one of the first implement or the second implement.