AU2001296911A1 - Method and apparatus for reducing power consumption - Google Patents
Method and apparatus for reducing power consumptionInfo
- Publication number
- AU2001296911A1 AU2001296911A1 AU2001296911A AU9691101A AU2001296911A1 AU 2001296911 A1 AU2001296911 A1 AU 2001296911A1 AU 2001296911 A AU2001296911 A AU 2001296911A AU 9691101 A AU9691101 A AU 9691101A AU 2001296911 A1 AU2001296911 A1 AU 2001296911A1
- Authority
- AU
- Australia
- Prior art keywords
- signal
- components
- power consumption
- reducing power
- coponents
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/20—Cooling means
- G06F1/206—Cooling means comprising thermal management
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Power Sources (AREA)
- Control Of Temperature (AREA)
- Communication Control (AREA)
- Mobile Radio Communication Systems (AREA)
- Transceivers (AREA)
- Diaphragms For Electromechanical Transducers (AREA)
Abstract
A method is provided for controlling transitions between a first and second clock frequency signal in first and second coponents electrically coupled together and in communication with one another. The method comprises asserting a freeze signal to cause communications between the first and second components to cease. A freeze acknowledge signal is then received from the first and second components, indicating that communications therebetween have ceased. A change signal is delivered to the first and second coponents to cause the components to switch between the first and second clock frequency signals.
Applications Claiming Priority (19)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/670,368 US6836824B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for reducing power consumption in a cache memory system |
| US09/670,368 | 2000-09-26 | ||
| US09/670,417 US6728890B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for controlling a bus clock frequency in response to a signal from a requesting component |
| US09/670,143 US6608476B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for reducing power consumption |
| US09/670,143 | 2000-09-26 | ||
| US09/670,417 | 2000-09-26 | ||
| US09/669,825 | 2000-09-26 | ||
| US09/669,357 US6528974B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for reducing power consumption |
| US09/670,419 | 2000-09-26 | ||
| US09/670,418 | 2000-09-26 | ||
| US09/670,420 | 2000-09-26 | ||
| US09/670,041 | 2000-09-26 | ||
| US09/669,357 | 2000-09-26 | ||
| US09/670,418 US6691215B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for reducing power consumption |
| US09/670,041 US6748546B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for reducing power consumption |
| US09/670,420 US6718473B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for reducing power consumption |
| US09/669,825 US6700421B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for reducing power consumption |
| US09/670,419 US6845457B1 (en) | 2000-09-26 | 2000-09-26 | Method and apparatus for controlling transitions between a first and a second clock frequency |
| PCT/US2001/042320 WO2002027451A2 (en) | 2000-09-26 | 2001-09-26 | Method and apparatus for reducing power consumption |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001296911A1 true AU2001296911A1 (en) | 2002-04-08 |
Family
ID=27578896
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001296911A Abandoned AU2001296911A1 (en) | 2000-09-26 | 2001-09-26 | Method and apparatus for reducing power consumption |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP1451669B1 (en) |
| JP (1) | JP2004528613A (en) |
| AT (1) | ATE514989T1 (en) |
| AU (1) | AU2001296911A1 (en) |
| WO (1) | WO2002027451A2 (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7725759B2 (en) * | 2005-06-29 | 2010-05-25 | Sigmatel, Inc. | System and method of managing clock speed in an electronic device |
| US7861113B2 (en) | 2007-03-16 | 2010-12-28 | Dot Hill Systems Corporation | Method and apparatus for operating storage controller system in elevated temperature environment |
| CN100456211C (en) * | 2007-03-19 | 2009-01-28 | 中国人民解放军国防科学技术大学 | Request-based low-power instruction memory |
| US8356155B2 (en) | 2010-09-13 | 2013-01-15 | Advanced Micro Devices, Inc. | Dynamic RAM Phy interface with configurable power states |
| US8775838B2 (en) * | 2012-02-01 | 2014-07-08 | Texas Instruments Incorporated | Limiting the number of unexpected wakeups in a computer system implementing a power-saving preemptive wakeup method from historical data |
| CN103927131B (en) * | 2014-03-25 | 2017-02-15 | 四川和芯微电子股份有限公司 | Synchronous flash memory and USB (universal serial bus) flash disk starting method and control system thereof |
| GB2537855B (en) | 2015-04-28 | 2018-10-24 | Advanced Risc Mach Ltd | Controlling transitions of devices between normal state and quiescent state |
| GB2537852B (en) | 2015-04-28 | 2019-07-17 | Advanced Risc Mach Ltd | Controlling transitions of devices between normal state and quiescent state |
| US10515670B1 (en) * | 2018-06-13 | 2019-12-24 | Nanya Technology Corporation | Memory apparatus and voltage control method thereof |
| US10310549B1 (en) * | 2018-06-21 | 2019-06-04 | Nanya Technology Corporation | Clock signal generating circuit and operating method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5666538A (en) * | 1995-06-07 | 1997-09-09 | Ast Research, Inc. | Disk power manager for network servers |
| US5740087A (en) * | 1996-05-31 | 1998-04-14 | Hewlett-Packard Company | Apparatus and method for regulating power consumption in a digital system |
| US6088806A (en) * | 1998-10-20 | 2000-07-11 | Seiko Epson Corporation | Apparatus and method with improved power-down mode |
| US6118306A (en) * | 1998-12-03 | 2000-09-12 | Intel Corporation | Changing clock frequency |
-
2001
- 2001-09-26 JP JP2002530965A patent/JP2004528613A/en active Pending
- 2001-09-26 WO PCT/US2001/042320 patent/WO2002027451A2/en not_active Ceased
- 2001-09-26 AT AT01977822T patent/ATE514989T1/en not_active IP Right Cessation
- 2001-09-26 EP EP01977822A patent/EP1451669B1/en not_active Expired - Lifetime
- 2001-09-26 AU AU2001296911A patent/AU2001296911A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002027451A2 (en) | 2002-04-04 |
| JP2004528613A (en) | 2004-09-16 |
| EP1451669A2 (en) | 2004-09-01 |
| WO2002027451A3 (en) | 2004-05-06 |
| ATE514989T1 (en) | 2011-07-15 |
| EP1451669B1 (en) | 2011-06-29 |
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