DC offset on power amplifiers output

Question

I have a couple of questions about the DC offset on the output of the power amplifier. Lately, I've been trying a couple of designs in LtSpice and I noticed that DC offset is much too high(or so I think). I know that in practice DC offset can be big, but it's simualtion so this much of DC offset seems wrong.

Circuit below is a pretty standard power amplifier and DC offset is around 7 mV. This amount seems to be expected and normal. Second circuit is when i add an additional BJT in VAS stage to buffer the stages, it should increase the input impedance of VAS stage and increase input stage gain and open loop gain in general(around 2x the gain). After this modification offset increases to almost 40 mV.

Why is that? Why does increasing open loop gain changes DC offset so drasticly, is there something I don't see it that change? After staring on DC op analysis for a couple of hours I'm out of ideas, it seems that I fundamentaly don't understand something about the design. I attached both circuits below with some voltages and currents labeled, if there are some crucial information missing let me know and I will edit the post.

On the other hand, even though this design is pretty generic, do you see any problems with this implementation in general? Any advice would be great, thanks.

First version of the amplifier

Second version of the amplifier

Answer 1

It appears to me that you've taken your schematic directly from either the 1st or 2nd edition of Bob Cordell's Designing Audio Power Amplifiers.

I won't waste time. There is a primary problem and a secondary problem. Let's zero in on the primary problem:

There's a voltage drop across my NFB \$R_{11}\$ (your \$R_9\$.) You've effectively grounded the base for your \$Q_1\$ (my \$Q_3\$.) The base current for my \$Q_3\$ doesn't cause any voltage drop. But the base current for my \$Q_4\$ does cause a voltage drop.

That is the primary problem.

There's another problem that can be remedied by using a helper for the current mirror. Bob Cordell discusses it -- though not well enough.

(He also completely fails to provide a good explanation for the details underlying the "Hawksford compensation" for the Vbe multiplier, as well, leaving someone high and dry trying to understand exactly why it may help.)

So, start by adding a \$19\:\text{k}\Omega\$ resistor to ground for my \$Q_3\$ (your \$Q_1\$) -- this makes a huge difference:

That's a very significant improvement, all by itself.

(Ignore the floating parts for now, I'll connect them in a moment.)

Then add a helper to the current mirror. The new circuit should be:

Note that with the added helper for the current mirror (and please note that he does not describe this particular form, either), the output is within a few microvolts of zero.

The Vbe multiplier still needs help.

But at least things are closer, now.

Answer 2

On the second schematic, due to buffer transistor Q7, collector current in the input pair is much better balanced. Therefore, offset voltage should be lower, right?

Not so fast... At DC, in the input pair, Q2's base sees R9 which is 19k, whereas Q1 sees zero impedance as it is driven by a voltage source. Thus the base current from Q2 creates a voltage drop across the 19k resistor, which is not present in the other transistor. This adds some input offset voltage. This seems to compensate the offset due to the input stage having to output enough current to drive the VAS base. In other words, offset is low, but this is a coincidence. Changing the input source impedance (add a resistor in series with the input source to check) will change the offset.

With BJT input amplifiers (or opamps) it is common practice to drive both inputs with the same impedance to reduce offset due to base current in the input pair. At DC, you can achieve this by AC coupling the input and adding a resistor between Q1 base and ground equal to R9.

In the second schematic, Q7 adds gain, thus reduces the current that must be output by the differential pair. This would normally reduce offset, but it prevents the two previously mentioned mechanisms from canceling each other, so instead it increases. Also, Q7 shifts Q1 Vce by one Vbe drop, which means the input pair Vce's are different between the two schematics, thus Early effect manifests and changes the offset voltage too.