In-System Test For AI Data Centers


Testing inside the fab or packaging house can determine whether a chip or package meets all the functional requirements at time zero, but how that chip behaves in the field during its lifetime and under different workloads and environmental conditions may be very different. This is particularly true in AI data centers, where utilization of one or more dies may be significantly higher than in pr... » read more

Critical Optimization Factors For GenAI Chipmakers


Today’s GenAI arms race is fought with novel chip architectures and packaging. Specialized hardware designs are proliferating in the form of GPUs, TPUs, NPUs, and more, all tuned for parallelism and matrix-heavy AI math. In this hyper-competitive landscape, chip vendors scramble to differentiate their products on multiple fronts. They promise some mix of better performance, efficiency, or ... » read more

Unearthing Hidden Reliability Risks


Successful automotive electronic design requires a focus on safety, performance and customer satisfaction. This makes IC reliability not just a “nice to have” feature, but a fundamental requirement. From advanced driver-assistance systems (ADAS) to infotainment and powertrain controls, every IC must work with exceptional reliability, even in tough conditions. Imagine a tiny circuit flaw in ... » read more

How Multiphysics Is Powering The Future Of 3D-ICs


It’s surprising to learn that the idea of 3D integrated circuits (3D ICs) has been kicking around for over sixty years. Not long after the first MOS IC emerged in 1960, researchers were already thinking vertically. By 1983, Fujitsu manufactured the first 3D IC prototype using through-silicon via (TSV) technology, using laser beam recrystallization. That’s a long time for a good idea to catc... » read more

Silicon Lifecycle Management


How chips are used is changing, and so are the requirements. In the past, markets were largely segmented by application, which determined how chips were designed. High-performance processors went into notebook computers, low-power chipsets were deployed in mobile devices, and complex SoCs and advanced packages were used in data centers. But with the spread of AI everywhere, traditional segmenta... » read more

Navigating Reliability Potholes: Early 3D Stress Analysis For Automotive ICs


The rise of 3D integrated circuits (ICs) and heterogeneous packaging is reshaping how automotive ICs fulfill demanding analog and sensor requirements. Whether for radar, lidar, sensor fusion or domain controllers, advanced packaging enables new levels of integration—and performance—in automotive electronics. Yet, as these architectures grow more complex, they also introduce new forms of mec... » read more

Issues In Ramping Advanced Packaging


Multi-die assemblies require significantly more test data than a monolithic chip. Thermal mismatch between different layers can cause warping, which puts stress on the bonds that connect those layers, resulting in failures during testing. The big problem is that traditional daisy-chained test approaches cannot pinpoint where problems are occurring. Instead, they provide a go/no-go for the entir... » read more

Changes In Scan Test Data


Bigger designs with hundred of cores are creating an explosion in the volume of scan test data, significantly bumping up the amount of time spent on test. That raises the cost of test, forcing chipmakers to trade off higher costs with reliability. The solution is to raise the level of abstraction for scan tests, using a bus and packetized data that can run at much higher frequencies than is pos... » read more

Efficient Failure-Detection Methods for GPU Control-Logic (Hitachi, Osaka Univ., Kyoto Univ.)


A new technical paper titled "A Hardware-Aware Failure-Detection Method for GPU Control-Logic" was published by researchers at Hitachi, Ltd., Osaka University, and Kyoto University. Excerpt "Various failure detection methods have been proposed for SDCs caused by faults in data units such as registers. However, effective methods for detecting SDCs resulting from faults in control logic, such... » read more

Silent Data Corruption


Everyone expects their compute systems to generate the correct answer. When they don't, it's cause for alarm, because it's not always clear how long the problem has persisted. Even worse, chips and systems are now so complex that it may require a unique sequence of operations to trigger a silent data error, and they may show up only occasionally, and maybe only after months or years of use in t... » read more

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