KR20040038312A - Apparatus and method for driving plasma display panel - Google Patents

Abstract

The present invention relates to a driving apparatus of a plasma display panel which can improve the uniformity of luminance.

The apparatus for driving a plasma display panel of the present invention includes a panel and a luminance control unit for adding or subtracting data luminance of a specific portion of data input from outside corresponding to an image to be displayed on the panel.

Description

Driving apparatus and driving method of plasma display panel {APPARATUS AND METHOD FOR DRIVING PLASMA DISPLAY PANEL}

The present invention relates to a driving apparatus and a driving method of a plasma display panel, and more particularly, to a driving apparatus and a driving method of a plasma display panel to improve the uniformity of brightness.

Plasma Display Panel (hereinafter referred to as "PDP") is a display device using visible light generated from a phosphor when vacuum ultraviolet rays generated by gas discharge excite the phosphor. PDP is thinner and lighter than Cathode Ray Tube (CRT), which has been the mainstay of display means, and has the advantage of being able to realize high definition large screen. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type PDP.

Referring to FIG. 1, a discharge cell of a conventional three-electrode AC surface discharge type PDP is formed on a first electrode 12Y and a second electrode 12Z formed on an upper substrate 10, and on a lower substrate 18. The address electrode 20X is provided.

The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the first electrode 12Y and the second electrode 12Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the first electrode 12Y and the second electrode 12Z.

The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 10, the lower substrate 18, and the partition wall 24.

Such a PDP is driven by dividing one frame into several subfields having different discharge times in order to express gray levels of an image. Each subfield is further divided into an initialization period for generating discharge uniformly, an address period for selecting discharge cells, and a sustain period for expressing gray levels according to the number of discharges.

For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8 as shown in FIG. In addition, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. Here, the initialization period and the address period of each subfield are the same for each subfield, while the sustain period is 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. As it is increased, an image according to the gradation is displayed.

3 is a view showing a driving apparatus of a conventional plasma display panel.

Referring to FIG. 3, a conventional PDP driving apparatus includes a first reverse gamma correction unit 32A, a gain control unit 34, an error diffusion unit 36 connected between an input line 1 and a panel 46. A subfield mapping unit 38 and a data alignment unit 40; Frame memory 30 connected between input line 1 and panel 46, second inverse gamma correction unit 32B, average picture level (APL) 42 and waveform generator 44 ).

The first and second inverse gamma correction units 32A and 32B linearly convert the luminance value according to the gray value of the image signal by performing inverse gamma correction on the gamma corrected video signal. The frame memory 30 stores one frame of data R, G, and B, and supplies the stored data to the second inverse gamma correction unit 32B.

The APL unit 42 receives the video data corrected by the second inverse gamma correction unit 32B and generates an N (N is a natural number) step signal for adjusting the number of sustain pulses. The gain controller 34 amplifies the video data corrected by the first inverse gamma correction unit 32A by the effective gain.

The error diffusion unit 36 finely adjusts the luminance value by diffusing an error component of a cell into adjacent cells. The subfield mapping unit 38 reallocates the video data corrected by the error diffusion unit 36 for each subfield.

The data alignment unit 40 converts the video data input from the subfield mapping unit 38 in accordance with the resolution format of the panel 46 to convert the address data into an integrated circuit (IC) of the panel 46. Supply).

The waveform generator 44 generates a timing control signal based on the N-stage signal input from the APL unit 42, and converts the generated timing control signal into an address driving IC, a scan driving IC, and a sustain driving IC of the panel 46. Supply.

In the conventional PDP, there is a problem in that an image of a desired luminance cannot be expressed in a specific portion 48 of the panel 46 due to mismatch of process conditions of the panel 46. In other words, an image having a luminance lower or higher than a desired luminance is displayed on the specific portion 48 of the panel 46, thereby decreasing uniformity of the entire screen.

Accordingly, an object of the present invention is to provide a driving apparatus and a driving method of a plasma display panel which can improve the uniformity of luminance.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a view showing one frame of a conventional three-electrode AC surface discharge type plasma display panel.

3 is a block diagram showing a driving apparatus of a conventional plasma display panel.

4 is a diagram for showing luminance unevenness of a conventional plasma display panel.

5 is a block diagram showing a driving apparatus of a plasma display panel according to an embodiment of the present invention;

6 shows an address address of a panel.

7 is a view showing a process in which the luminance is corrected in the present invention.

8 is a block diagram illustrating a driving apparatus of a plasma display panel according to another embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

1,51,81: Input line 10: Upper board

12Y: first electrode 12Z: second electrode

14,22 dielectric layer 16: protective film

18: lower substrate 20X: address electrode

24: partition 26: phosphor layer

30, 50, 78: Frame memories 32A, 32B, 52A, 52B: Inverse gamma correction unit

34,54: gain control unit 36,56: error diffusion unit

38, 58: subfield mapping unit 40, 60: data alignment unit

42,62: average luminance level 44,62: waveform generator

46,66: Panel 68,74: Selective Mapping Unit

70: memory 71,80: luminance control unit

72,76: input unit

In order to achieve the above object, a driving apparatus of a plasma display panel of the present invention includes a panel and a luminance control unit for adding or subtracting data luminance of a specific portion of data input from the outside corresponding to an image to be displayed on the panel.

The luminance controller is configured to store a start address, a vertical address, and a horizontal address corresponding to a specific portion of an address of the panel, as well as an addition value or a subtraction value of luminance, a start address, a vertical address, a horizontal address, and a luminance stored in the memory. And a selective mapping unit for adding or subtracting the luminance of data input from the outside using an addition value or a subtraction value of.

The vertical address refers to the vertical end address where the luminance is added or subtracted from the start address, and the horizontal address refers to the horizontal end address where the luminance is added or decreased from the start address.

And an input unit for inputting a start address, a vertical address, a horizontal address, and an added value and a reduced value of luminance into the memory.

The memory is a frame memory for storing video data input from the outside in units of frames.

The driving method of the plasma display panel of the present invention includes the step of inputting data from the outside, and the step of adding or subtracting the luminance of some of the data.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 8.

5 is a view showing a driving apparatus of a plasma display panel according to an embodiment of the present invention.

Referring to FIG. 5, a driving apparatus of a PDP according to an embodiment of the present invention includes a luminance controller 71 provided between an input line 51, a first reverse gamma correction unit 52A, and a frame memory 50. A first inverse gamma correction unit 52A, a gain control unit 54, an error diffusion unit 56, a subfield mapping unit 58, and a data alignment unit connected between the luminance control unit 71 and the panel 66; 60); Frame memory 50, second reverse gamma correction unit 52B, APL (average luminance level) unit 62 and waveform generator 64 connected between luminance control unit 71 and panel 66; ).

The first and second inverse gamma correction units 52A and 52B perform linear gamma correction on the gamma corrected video signal to linearly convert luminance values according to grayscale values of the video signal. The frame memory 50 stores one frame of data R, G, and B, and supplies the stored data to the second inverse gamma correction unit 52B.

The APL unit 62 receives the video data corrected by the second inverse gamma correction unit 52B and generates an N (N is a natural number) signal for adjusting the number of sustain pulses. The gain controller 54 amplifies the video data corrected by the first inverse gamma correction unit 52A by the effective gain.

The error diffusion unit 56 finely adjusts the luminance value by diffusing an error component of a cell into adjacent cells. The subfield mapping unit 58 reallocates the video data corrected by the error diffusion unit 56 for each subfield.

The data aligning unit 60 converts the video data input from the subfield mapping unit 58 according to the resolution format of the panel 66 to convert the address data into an integrated circuit (IC) of the panel 66. Supply).

The waveform generator 64 generates a timing control signal based on the N-stage signal input from the APL unit 62 and converts the generated timing control signal into an address driving IC, a scan driving IC, and a sustain driving IC of the panel 66. Supply.

The brightness controller 71 adds or subtracts the brightness of the video signal of the specific portion of the video signal supplied from the input line 51. To this end, the brightness controller 71 includes a selective mapping unit 68, a memory 70, and an input unit 72.

The operation process of the luminance control unit 71 will be described in detail. First, an address address of a portion where luminance is added or decreased is stored in the memory 70. In detail, the panel 66 (for example, 1280x768) has a unique address address as shown in FIG. Here, as shown in FIG. 7, the memory 70 stores a start address 100, a horizontal address 102, and a vertical address 104 where luminance is added or subtracted from among the addresses of the panel 66. Here, the horizontal address 102 refers to the horizontal end address where the luminance is added or subtracted from the start address 100, and the vertical address 104 refers to the vertical end address where the luminance is added or decreased from the start address 100. it means. In addition, the memory 70 stores an addition value or a subtraction value of luminance.

The input unit 72 provides a user interface for storing information in the memory 70. That is, the user manipulates the input unit 72 to designate a place where the luminance is to be added or decreased. The selective mapping unit 68 changes the luminance of the specific portion 106 by using the start address 100, the horizontal address 102 and the vertical address 104 stored in the memory 70, and the addition value or the subtraction value. In other words, if the luminance of the specific portion 106 is lower than the desired luminance, the luminance value is added to display the desired luminance value. In addition, if the luminance of the specific portion 106 is higher than the desired luminance, the luminance value is subtracted so that the desired luminance value appears. In addition, the selective mapping unit 68 supplies data included in regions other than the specific portion 106 to the first inverse gamma correction unit 52A and the frame memory 50 without adding or subtracting luminance.

That is, in the present invention, the luminance of the specific portion of the panel 66 can be added or subtracted to improve the uniformity of the luminance. On the other hand, information values stored in the memory 70 are mainly input by the developer or the producer in the development stage or production process of the PDP.

8 is a view showing a driving apparatus of a plasma display panel according to another embodiment of the present invention. In FIG. 8, portions having the same functions as the driving apparatus of the PDP shown in FIG. 5 are assigned the same reference numerals.

Referring to FIG. 8, the driving apparatus of the PDP according to another embodiment of the present invention includes a selective mapping unit 74 disposed between the input line 81, the first reverse gamma correction unit 52A, and the frame memory 78. And a first inverse gamma correction unit 52A, a gain control unit 54, an error diffusion unit 56, a subfield mapping unit 58, and data alignment connected between the selective mapping unit 74 and the panel 66. Section 60; Frame memory 78 connected between the selective mapping unit 74 and the panel 66, the second inverse gamma correction unit 52B, an average picture level (APL) unit 62, and a waveform generator unit ( 64).

Here, the selective mapping unit 74, the frame memory 78, and the input unit 76 are used as the luminance control unit 80 for adding or subtracting a video signal of a specific portion.

The first and second inverse gamma correction units 52A and 52B perform linear gamma correction on the gamma corrected video signal to linearly convert luminance values according to grayscale values of the video signal. The frame memory 78 stores one frame of data R, G, and B, and supplies the stored data to the second inverse gamma correction unit 52B.

The APL unit 62 receives the video data corrected by the second inverse gamma correction unit 52B and generates an N-stage signal for adjusting the number of sustain pulses. The gain controller 54 amplifies the video data corrected by the first inverse gamma correction unit 52A by the effective gain.

The error diffusion unit 56 finely adjusts the luminance value by diffusing an error component of a cell into adjacent cells. The subfield mapping unit 58 reallocates the video data corrected by the error diffusion unit 56 for each subfield.

The data aligning unit 60 converts the video data input from the subfield mapping unit 58 according to the resolution format of the panel 66 to convert the address data into an integrated circuit (IC) of the panel 66. Supply).

The waveform generator 64 generates a timing control signal based on the N-stage signal input from the APL unit 62 and converts the generated timing control signal into an address driving IC, a scan driving IC, and a sustain driving IC of the panel 66. Supply.

On the other hand, in the frame memory 78, the address address of the portion where the luminance is added or decreased is stored. That is, the start address 100, the horizontal address 102, and the vertical address 104 are stored in the frame memory 78. In addition, the frame memory 78 stores an added value or a subtracted value of luminance.

The input unit 76 provides a user interface for storing information in the frame memory 78. That is, the user operates the input unit 76 to designate a place where the brightness is to be added or decreased. The selective mapping unit 74 changes the luminance of the specific portion 106 by using the start address 100, the horizontal address 102 and the vertical address 104 stored in the frame memory 78, and the addition value or the subtraction value. . In other words, if the luminance of the specific portion 106 is lower than the desired luminance, the luminance value is added to display the desired luminance value. In addition, if the luminance of the specific portion 106 is higher than the desired luminance, the luminance value is subtracted so that the desired luminance value appears. In addition, the selective mapping unit 74 supplies data included in regions other than the specific portion 106 to the first inverse gamma correction unit 52A and the frame memory 50 without adding or subtracting luminance.

That is, in another embodiment of the present invention, the luminance of the specific portion of the panel 66 may be added or subtracted to improve the uniformity of the luminance. On the other hand, the information values stored in the frame memory 78 are mainly input by the developer or the producer during the development stage or production process of the PDP.

As described above, according to the driving apparatus and driving method of the plasma display panel according to the present invention, the uniformity of the panel can be improved by adding or subtracting the luminance of a specific portion of the panel.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

Panel, And a luminance control unit for adding or subtracting data luminance of a specific portion of data input from the outside corresponding to the image to be displayed on the panel. The method of claim 1, The brightness control unit A memory for storing a start address, a vertical address, and a horizontal address corresponding to the specific portion of the address of the panel, and an addition value or a subtraction value of the luminance; And a selective mapping unit for adding or subtracting the luminance of data input from the outside by using the start address, the vertical address and the horizontal address stored in the memory, and the addition or subtraction of the luminance. . The method of claim 2, The vertical address means a vertical end address of a place where luminance is added or subtracted from the start address, and the horizontal address means a horizontal end address of a place where luminance is added or decreased from the start address. Device. The method of claim 2, And an input unit for inputting the start address, the vertical address, the horizontal address, and the added value and the added value of the luminance into the memory. The method of claim 2, And the memory is a frame memory for storing video data input from the outside in units of frames. Inputting data from the outside, And subtracting luminance of some data of the data.