JPH11219150A - Driving method of AC type plasma display panel - Google Patents
Driving method of AC type plasma display panelInfo
- Publication number
- JPH11219150A JPH11219150A JP10021715A JP2171598A JPH11219150A JP H11219150 A JPH11219150 A JP H11219150A JP 10021715 A JP10021715 A JP 10021715A JP 2171598 A JP2171598 A JP 2171598A JP H11219150 A JPH11219150 A JP H11219150A
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- Japan
- Prior art keywords
- discharge
- voltage
- electrode
- charge
- dielectric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Control Of Gas Discharge Display Tubes (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明はプラズマディスプレ
イパネル(以降PDPとする)装置の駆動方式に関す
る。[0001] 1. Field of the Invention [0002] The present invention relates to a driving method for a plasma display panel (hereinafter referred to as PDP) device.
【0002】[0002]
【従来の技術】PDPの駆動に於いて、特開平8−31
4405号公報に開示されるように、誘電体上に蓄積し
た電荷を利用して自己放電を行えば、同じパルス数で発
光回数を倍にすることが可能となる。しかし、セルが小
さく、電極が狭い場合などでは自己放電で誘電体上に蓄
積した電荷をほとんど消去してしまい、次の放電を行う
ことができるだけの電荷を誘電体上に残すことは難し
い。従って、自己放電を起こしつつ放電を維持すること
は困難であった。2. Description of the Related Art In driving a PDP, Japanese Patent Application Laid-Open No. 8-31
As disclosed in Japanese Patent No. 4405, if self-discharge is performed using charges accumulated on a dielectric, the number of times of light emission can be doubled with the same number of pulses. However, when the cell is small and the electrodes are narrow, most of the charge accumulated on the dielectric by self-discharge is erased, and it is difficult to leave enough charge on the dielectric for the next discharge. Therefore, it has been difficult to maintain discharge while causing self-discharge.
【0003】[0003]
【発明が解決しようとする課題】本発明の課題は自己放
電を起こしつつ放電を継続し、印加パルス数に対する発
光回数の増加を行うことが可能な手段を提供することに
ある。SUMMARY OF THE INVENTION An object of the present invention is to provide means capable of continuing discharge while causing self-discharge and increasing the number of times of light emission with respect to the number of applied pulses.
【0004】[0004]
【課題を解決するための手段】上記課題に対して本発明
では、継続して放電を起こすパルスの間隔を0.3μs
以上1μs以下の時間内として、空間に残留する電荷に
より放電を継続させる。According to the present invention, in order to solve the above-mentioned problem, the interval between pulses for continuously generating a discharge is set to 0.3 μs.
The discharge is continued by the charge remaining in the space within the time of 1 μs or less.
【0005】[0005]
【発明の実施の形態】以下図1から図6を用い本発明の
実施形態を説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.
【0006】図2は本発明を適用するPDPの構造の一
部を示す分解斜視図であり、前面ガラス基板21の下面
には透明な共通電極(以降X電極と称す)22と、透明
な独立電極(以降Y電極と称す)23を付設する。ま
た、X電極22とY電極23には、それぞれXバス電極
24とYバス電極25を積層付設する。さらに、X電極
22、Y電極23、Xバス電極24、Yバス電極25を
誘電体26によって被覆し、MgO等の保護層27を付
設する。FIG. 2 is an exploded perspective view showing a part of the structure of a PDP to which the present invention is applied. A transparent common electrode (hereinafter referred to as an X electrode) 22 and a transparent independent electrode 22 are provided on the lower surface of a front glass substrate 21. An electrode (hereinafter referred to as a Y electrode) 23 is provided. Further, an X bus electrode 24 and a Y bus electrode 25 are laminated on the X electrode 22 and the Y electrode 23, respectively. Further, the X electrode 22, the Y electrode 23, the X bus electrode 24, and the Y bus electrode 25 are covered with a dielectric 26, and a protective layer 27 such as MgO is provided.
【0007】一方、背面ガラス基板28の上面には、X
電極22、Y電極23と直角に立体交差する電極(以降
A電極と称す)29を付設し、該A電極29を誘電体3
0によって被覆し、該誘電体30の上に隔壁31をA電
極29と平行に設ける。さらに、隔壁31の壁面と誘電
体30の上面によって形成される凹領域のうちA電極2
9を挾む部分の内側に蛍光体32を塗布する。On the other hand, on the upper surface of the rear glass substrate 28, X
An electrode (hereinafter referred to as an A electrode) 29 which three-dimensionally intersects the electrode 22 and the Y electrode 23 at a right angle is provided, and the A electrode 29 is
0, and a partition 31 is provided on the dielectric 30 in parallel with the A electrode 29. Further, the A electrode 2 in a concave region formed by the wall surface of the partition wall 31 and the upper surface of the dielectric 30 is formed.
The phosphor 32 is applied to the inside of the portion sandwiching 9.
【0008】図3は図2中の矢印D1の方向から見たP
DPの断面図であり、画素の最小単位であるセル1個を
示している。FIG. 3 is a plan view of P seen from the direction of arrow D1 in FIG.
FIG. 3 is a cross-sectional view of the DP, showing one cell which is a minimum unit of a pixel.
【0009】図3より、A電極29は2つの隔壁31の
中間に位置し前面ガラス基板21と背面ガラス基板2
8、隔壁31に囲まれた放電空間33には放電を行わせ
るためのガスを充填する。As shown in FIG. 3, the A electrode 29 is located between the two partition walls 31 and is located between the front glass substrate 21 and the rear glass substrate 2.
8. The discharge space 33 surrounded by the partition walls 31 is filled with a gas for causing discharge.
【0010】図4は図2中の矢印D2の方向からみたP
DPの断面図であり、1個のセルを示している。セルの
境界は概略点線で示す位置であるが、実際には隔壁等に
よって区切られているわけではない。FIG. 4 shows P as viewed from the direction of arrow D2 in FIG.
FIG. 3 is a cross-sectional view of the DP, showing one cell. The boundaries of the cells are roughly indicated by dotted lines, but are not actually separated by partitions or the like.
【0011】図5(a)は図2に示したPDPに1枚の
画を表示するのに要するフィールド期間の動作を示す図
である。1フィールド期間40は複数のサブフィールド
41乃至48に分割され、各サブフィールドは(b)に
示すように予備放電期間49、発光セルを規定する書き
込み放電期間50、発光表示期間51からなる。FIG. 5A is a diagram showing an operation in a field period required to display one image on the PDP shown in FIG. One field period 40 is divided into a plurality of subfields 41 to 48, and each subfield includes a preliminary discharge period 49, a write discharge period 50 defining a light emitting cell, and a light emitting display period 51 as shown in FIG.
【0012】図6は1つのサブフィールドに於いて、各
電極に印加する電圧波形を示している。波形52はX電
極に印加する電圧波形、53は一本のY電極に印加する
電圧波形、54は1本のアドレス電極29に印加する電
圧波形である。予備放電期間49では、X電極22にリ
セットパルス57を印加する。書き込み期間50ではY
電極23に印加するYスキャンパルス55、アドレス電
極29に印加するアドレスパルス56によって書き込み
放電を行う。発光表示期間51はY電極23に印加する
第1のサステインパルス58、Xサステインパルス5
9、Yサステインパルス60、全面アドレスパルス61
からなる。FIG. 6 shows a voltage waveform applied to each electrode in one subfield. A waveform 52 is a voltage waveform applied to the X electrode, 53 is a voltage waveform applied to one Y electrode, and 54 is a voltage waveform applied to one address electrode 29. In the preliminary discharge period 49, a reset pulse 57 is applied to the X electrode 22. In the writing period 50, Y
Write discharge is performed by a Y scan pulse 55 applied to the electrode 23 and an address pulse 56 applied to the address electrode 29. In the light emitting display period 51, the first sustain pulse 58 applied to the Y electrode 23 and the X sustain pulse 5
9, Y sustain pulse 60, overall address pulse 61
Consists of
【0013】予備放電期間49に於いて、X電極22に
印加するリセットパルス57による放電で誘電体上に蓄
積した電荷の消去を行っている。その後、Y電極23に
スキャンパルス56が印加された時、アドレス電極29
にアドレスパルス56を印加すると、その交点に位置す
るセルで書き込み放電が起こる。In the pre-discharge period 49, the electric charge accumulated on the dielectric by the discharge by the reset pulse 57 applied to the X electrode 22 is erased. Thereafter, when the scan pulse 56 is applied to the Y electrode 23, the address electrode 29
When an address pulse 56 is applied to a cell, a write discharge occurs in a cell located at the intersection.
【0014】書き込み放電期間56において、X電極2
2には正の電圧を、Y電極23には負の電圧を印加して
いるため、X,Y電極は書き込み放電によって生じた電
荷を集め、該X電極22近傍の誘電体上には負の電荷、
該Y電極23近傍の誘電体上には正の電荷を蓄積する。
一方、Y電極23にスキャンパルス56が印加された
時、アドレス電極29がグランド電位であれば書き込み
放電は起こらず、そのセルは非発光セルとなる。In the write discharge period 56, the X electrode 2
2, a positive voltage is applied to the Y electrode 23 and a negative voltage is applied to the Y electrode 23. Therefore, the X and Y electrodes collect charges generated by the write discharge, and the negative electrode is placed on the dielectric near the X electrode 22. charge,
Positive charges are accumulated on the dielectric near the Y electrode 23.
On the other hand, when the scan pulse 56 is applied to the Y electrode 23, if the address electrode 29 is at the ground potential, no write discharge occurs, and the cell becomes a non-light emitting cell.
【0015】図1は、本発明による放電維持の方法を示
す発光表示期間51の詳細図である。52,53はそれ
ぞれX電極22、Y電極23に印加する電圧波形であ
り、V1が放電維持電圧、t1が放電維持電圧V1を印
加している通電期間、5がX電極22、Y電極23とも
に接地されている通電停止期間、V2が放電開始電圧で
ある。また、1は放電による発光を表している。FIG. 1 is a detailed view of a light emitting display period 51 showing a method of sustaining discharge according to the present invention. Reference numerals 52 and 53 denote voltage waveforms applied to the X electrode 22 and the Y electrode 23, respectively, where V1 is a current during which the discharge maintaining voltage V1 is applied, and t1 is a conduction period during which the discharge maintaining voltage V1 is applied. V2 is the discharge start voltage during the grounding stop period. Reference numeral 1 denotes light emission due to discharge.
【0016】発光表示期間51の第1のサステインパル
ス58をY電極23に印加したとき、書き込み放電期間
50でX電極22近傍の誘電体、Y電極23近傍の誘電
体に蓄積した電荷によって形成される電位差(以降壁電
圧とする)と放電維持電圧V1を加えた実効電圧がX,
Y電極間に生じる。そして、実効電圧が放電開始電圧V
2以上になるように、放電維持電圧V1を設定すること
により放電を起こす。When the first sustain pulse 58 in the light emitting display period 51 is applied to the Y electrode 23, the first sustain pulse 58 is formed by charges accumulated in the dielectric near the X electrode 22 and the dielectric near the Y electrode 23 during the writing discharge period 50. The effective voltage obtained by adding the potential difference (hereinafter referred to as the wall voltage) and the sustaining voltage V1 is X,
This occurs between the Y electrodes. And the effective voltage is the discharge starting voltage V
The discharge is generated by setting the discharge maintaining voltage V1 so as to be 2 or more.
【0017】放電後は、通電期間t1の間に放電によっ
て空間を生じた電荷を誘電体上に引き付けることによっ
て、電荷を蓄積する。ただし、第1のサステインパルス
58による放電だけは、書き込み放電期間50で誘電体
上に蓄積した電荷量が十分ではない等の理由で、放電が
弱く誘電体上に電荷を集めにくい。従って、通電期間t
1を長くすることによってより多くの電荷を誘電体上に
集める。通電期間t1が終了し、通電休止期間t2にな
ると、X電極22、Y電極23両方の電位が接地電位に
なる。すなわち、通電期間t1中に形成した壁電圧が実
効電圧となる。ここで、放電維持電圧V1を高く、通電
期間t1を長く設定することにより、通電期間t1中
に、X,Y電極間の壁電圧の差を放電開始電圧V2以上
にする。そして、通電期間t1から通電停止期間t2に
したときに、実効電圧が放電開始電圧V2以上になるた
め自己放電が生じ、特に小さいセルや電極幅が狭い場合
は誘電体上に蓄積した電荷は消滅する。After the discharge, the electric charge generated by the discharge during the energizing period t1 is attracted onto the dielectric to accumulate the electric charge. However, only the discharge by the first sustain pulse 58 is weak in the discharge and is difficult to collect the charge on the dielectric because the amount of charge accumulated on the dielectric during the writing discharge period 50 is not sufficient. Therefore, the energization period t
By increasing the length of one more charge is collected on the dielectric. When the energization period t1 ends and the energization suspension period t2 starts, the potentials of both the X electrode 22 and the Y electrode 23 become the ground potential. That is, the wall voltage formed during the energization period t1 becomes the effective voltage. Here, by setting the discharge sustaining voltage V1 to be high and the energizing period t1 to be long, the difference between the wall voltages between the X and Y electrodes during the energizing period t1 is equal to or higher than the discharge starting voltage V2. Then, when the power supply period is changed from the power supply period t1 to the power supply stop period t2, the self-discharge occurs because the effective voltage becomes equal to or higher than the discharge start voltage V2. I do.
【0018】このように誘電体上に蓄積した電荷が消滅
した状態では、電圧を印加しても実効電圧は放電開始電
圧V2以下であるため放電は継続しない。これに対し、
空間に電荷が残留している状態で電圧を印加すると実効
電圧が放電開始電圧V2以下であっても放電を行うこと
ができる。該放電を行った後には、以前と同様に通電期
間t1にX,Y間の電位差が放電開始電圧V2以上にな
るように誘電体上に電荷を蓄積し、以降自己放電と空間
に残留した電荷による放電を交互に繰り返して放電を維
持することが可能となる。この方法で放電を維持する
と、1個のサステインパルスで空間電荷を利用した放電
と自己放電による発光があるため、発光表示期間51中
の発光回数がサステインパルスの印加回数の二倍にな
り、輝度を高めることができる。In the state where the charges accumulated on the dielectric have disappeared, the discharge does not continue even if the voltage is applied because the effective voltage is equal to or lower than the discharge starting voltage V2. In contrast,
If a voltage is applied in a state where charges remain in the space, discharge can be performed even if the effective voltage is equal to or lower than the discharge starting voltage V2. After the discharge, the electric charge is accumulated on the dielectric so that the potential difference between X and Y becomes equal to or higher than the discharge starting voltage V2 during the energizing period t1 as before, and the self-discharge and the electric charge remaining in the space thereafter. It is possible to maintain the discharge by alternately repeating the discharge caused by the discharge. When the discharge is maintained by this method, the discharge using the space charge and the light emission due to the self-discharge are generated by one sustain pulse, so that the number of times of light emission during the light emitting display period 51 is twice the number of times of application of the sustain pulse, and the luminance is increased. Can be increased.
【0019】尚、通電休止期間t2が1μs以下のとき
に、空間に残留した電荷を種火とした放電を行うことが
できる。従って、通電休止期間t2は1μs以下、自己
放電の放電遅れを考慮して0.3μs以上の長さが適当
である。It should be noted that when the power supply suspension period t2 is 1 μs or less, discharge can be performed using the charge remaining in the space as a pilot light. Therefore, it is appropriate that the energization suspension period t2 is 1 μs or less, and 0.3 μs or more in consideration of the discharge delay of the self-discharge.
【0020】[0020]
【発明の効果】本発明を適用することによって印加した
パルス数の倍の発光を行う。従って、同じ放電維持期間
で輝度を上げることができる。According to the present invention, light emission is performed twice as many times as the number of applied pulses. Therefore, the brightness can be increased in the same discharge sustaining period.
【図1】本発明の実施例である発光表示期間を示す特性
図。FIG. 1 is a characteristic diagram illustrating a light emitting display period according to an embodiment of the present invention.
【図2】本発明のプラズマディスプレイパネルの構造の
一部を示す分解斜視図。FIG. 2 is an exploded perspective view showing a part of the structure of the plasma display panel of the present invention.
【図3】図2中の矢印D1の方向から見たプラズマディ
スプレイパネルの断面図。FIG. 3 is a cross-sectional view of the plasma display panel viewed from the direction of arrow D1 in FIG.
【図4】図2中の矢印D2の方向から見たプラズマディ
スプレイパネルの断面図。FIG. 4 is a cross-sectional view of the plasma display panel viewed from the direction of arrow D2 in FIG.
【図5】1枚の画を構成する1フィールド期間の動作を
示した図。FIG. 5 is a diagram showing an operation in one field period forming one image.
【図6】1サブフィールド内における駆動電圧の動作を
示した特性図。FIG. 6 is a characteristic diagram showing an operation of a driving voltage in one subfield.
1…放電による発光、21…前面ガラス基板、22…X
電極、23…Y電極、24…Xバス電極、25…Yバス
電極、26…誘電体、27…保護層、28…背面ガラス
基板、29…A電極、30…誘電体、31…隔壁、32
…蛍光体、33…放電空間、40…1フィールド、41
乃至48…サブフィールド、49…予備放電期間、50
…書き込み放電期間、51…発光表示期間、52…X電
極に印加する電圧波形、53…Y電極に印加する電圧波
形、54…アドレス電極に印加する電圧波形、55…Y
スキャンパルス、56…アドレスパルス、57…リセッ
トパルス、58…第1のサステインパルス、59…Xサ
ステインパルス、60…Yサステインパルス、61…全
面アドレスパルス。1: light emission by discharge, 21: front glass substrate, 22: X
Electrodes, 23: Y electrode, 24: X bus electrode, 25: Y bus electrode, 26: dielectric, 27: protective layer, 28: back glass substrate, 29: A electrode, 30: dielectric, 31: partition, 32
... fluorescent material, 33 ... discharge space, 40 ... 1 field, 41
To 48: subfield, 49: preliminary discharge period, 50
... write discharge period, 51 ... light emission display period, 52 ... voltage waveform applied to the X electrode, 53 ... voltage waveform applied to the Y electrode, 54 ... voltage waveform applied to the address electrode, 55 ... Y
Scan pulse, 56 ... address pulse, 57 ... reset pulse, 58 ... first sustain pulse, 59 ... X sustain pulse, 60 ... Y sustain pulse, 61 ... full address pulse.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 佐々木 孝 神奈川県横浜市戸塚区吉田町292番地株式 会社日立製作所家電・情報メディア事業本 部内 (72)発明者 水田 尊久 神奈川県横浜市戸塚区吉田町292番地株式 会社日立製作所家電・情報メディア事業本 部内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Takashi Sasaki 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Home Appliances and Information Media Business Unit of Hitachi, Ltd. (72) Inventor Takahisa Mizuta Yoshida, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture No. 292, Hitachi, Ltd. Home Appliances & Information Media Business Division
Claims (2)
と該第一の電極群に平行に配置された第二の電極群と該
電極をおおう誘電体層とを有し、該第一の電極群及び第
二の電極群に交互に電圧を印加して継続して放電を行う
AC型プラズマディスプレイパネルの駆動方法に於い
て、一方の電極群に電圧を印加して電圧の立ち上がりで
起こる第一の放電と、該第一の放電により電離した電荷
を誘電体層上に蓄積し、通電を止めた場合に該誘電体上
に蓄積した電荷による第二の放電を起こし、かつ第二の
放電により発生した空間の電荷が中和消去する前に他方
の電極に電圧を印加して放電させることを特徴とするA
C型プラズマディスプレイパネルの駆動方法。A first electrode group disposed on a light-transmitting substrate, a second electrode group disposed in parallel with the first electrode group, and a dielectric layer covering the electrodes; In a method for driving an AC plasma display panel in which a voltage is alternately applied to the first electrode group and the second electrode group to continuously discharge, a voltage is applied to one of the electrode groups to The first discharge that occurs at the rise, the charge ionized by the first discharge is accumulated on the dielectric layer, and when the current is stopped, a second discharge is caused by the charge accumulated on the dielectric, and A is characterized in that a voltage is applied to the other electrode to discharge it before the charge in the space generated by the second discharge is neutralized and erased.
A method for driving a C-type plasma display panel.
に於いて、継続して放電を行うため前記第一及び第二の
電極に交互に印加する電圧の間隔を0.3μs以上1μ
s以下にしたことを特徴とするAC型プラズマディスプ
レイパネルの駆動方法。2. The plasma display apparatus according to claim 1, wherein the interval between the voltages alternately applied to said first and second electrodes is 0.3 μs or more and 1 μm to continuously discharge.
s or less, a method for driving an AC plasma display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10021715A JPH11219150A (en) | 1998-02-03 | 1998-02-03 | Driving method of AC type plasma display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10021715A JPH11219150A (en) | 1998-02-03 | 1998-02-03 | Driving method of AC type plasma display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11219150A true JPH11219150A (en) | 1999-08-10 |
Family
ID=12062777
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10021715A Pending JPH11219150A (en) | 1998-02-03 | 1998-02-03 | Driving method of AC type plasma display panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11219150A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001037250A1 (en) * | 1999-11-12 | 2001-05-25 | Matsushita Electric Industrial Co., Ltd. | Display and method for driving the same |
| KR20010098372A (en) * | 2000-04-25 | 2001-11-08 | 추후제출 | Method of driving ac type pdp |
| US7417602B2 (en) | 2003-04-29 | 2008-08-26 | Samsung Sdi Co., Ltd. | Plasma display panel and driving method thereof |
-
1998
- 1998-02-03 JP JP10021715A patent/JPH11219150A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001037250A1 (en) * | 1999-11-12 | 2001-05-25 | Matsushita Electric Industrial Co., Ltd. | Display and method for driving the same |
| US6900781B1 (en) | 1999-11-12 | 2005-05-31 | Matsushita Electric Industrial Co., Ltd. | Display and method for driving the same |
| KR20010098372A (en) * | 2000-04-25 | 2001-11-08 | 추후제출 | Method of driving ac type pdp |
| US7417602B2 (en) | 2003-04-29 | 2008-08-26 | Samsung Sdi Co., Ltd. | Plasma display panel and driving method thereof |
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