CN111221770A - Kernel correlation filtering target tracking method and system - Google Patents
Kernel correlation filtering target tracking method and system Download PDFInfo
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Abstract
The invention provides a tracking method and a system for a coring related filtering target, wherein the method comprises the following steps: after an image to be processed is obtained, the FPGA transmits the image to be processed to the multi-core DSP through a high-speed serial interface SRIO; and the multi-core DSP executes a related filtering tracking algorithm in parallel to track and position the single target in the image to be processed. By the scheme, the problem that the processing speed of the front-end embedded platform is low when the front-end embedded platform processes high-resolution and large-scale image data is solved, the image data processing speed can be effectively increased, and the real-time performance and robustness of target tracking are guaranteed.
Description
Technical Field
The invention relates to the field of image processing, in particular to a method and a system for tracking a nucleation related filtering target.
Background
In the field of computer vision, target tracking is an important research direction, can realize continuous tracking of an interested target in a continuous image sequence, and is applied to the fields of intelligent monitoring, photoelectric detection and the like. In the front-end embedded equipment, after an image is collected, the image needs to be processed in real time, and a target is quickly detected and positioned so as to realize target tracking.
At present, a target tracking algorithm has better robustness and real-time performance, and an embedded chip is used for carrying out processing such as multi-dimensional Fourier change, inverse transformation and the like on Hog characteristics and color characteristics with complex images to obtain a detection target. However, with the improvement of image resolution and the increase of data volume, the processing speed of the front-end embedded data processing platform is limited, and it is difficult to meet the real-time image processing requirement.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method and a system for tracking a coring related filtering target, so as to solve the problem that a front-end embedded hardware device has a slow processing speed when processing image data with high resolution and large data volume.
In a first aspect of the embodiments of the present invention, a coring correlation filtering target tracking method is provided, including:
after an image to be processed is obtained, the FPGA transmits the image to be processed to the multi-core DSP through a high-speed serial interface SRIO;
the multi-core DSP executes a related filtering tracking algorithm in parallel to track and position a single target in the image to be processed;
the method comprises the steps that each time the FPGA sends a frame of image to be processed, Doorbell interruption is sent, EDMA data transmission inside the DSP is triggered, the image to be processed is transmitted to MSMC inside the multi-core DSP, and a master core in the multi-core DSP controls a slave core to execute a related filtering tracking algorithm through inter-core interruption.
In a second aspect of the embodiments of the present invention, there is provided a coring correlation filtering target tracking system, including:
the image transmission module is used for transmitting the image to be processed to the multi-core DSP through the high-speed serial interface SRIO by the FPGA after the image to be processed is obtained;
the algorithm execution module is used for the multi-core DSP to execute related filtering tracking algorithm in parallel so as to track and position a single target in the image to be processed;
the method comprises the steps that each time the FPGA sends a frame of image to be processed, Doorbell interruption is sent, EDMA data transmission inside the DSP is triggered, the image to be processed is transmitted to MSMC inside the multi-core DSP, and a master core in the multi-core DSP controls a slave core to execute a related filtering tracking algorithm through inter-core interruption.
In the embodiment of the invention, the image to be processed is transmitted to the multi-core DSP through the high-speed serial interface SRIO; the multi-core DSP executes a related filtering tracking algorithm in parallel to perform single-target tracking and positioning; the FPGA sends a Doorbell interrupt when sending a frame of image to be processed every time, triggers the EDMA data transmission inside the DSP, transmits the image to be processed to the internal MSMC, and the main core controls the auxiliary core to execute a related filtering tracking algorithm through the inter-core interrupt. Based on inter-core communication among multiple cores, an SRIO high-speed transmission link and an EDMA data relocation mechanism, parallel execution of a related filtering target tracking algorithm on hardware equipment can be achieved, so that the image processing efficiency is improved, the problems that the existing front-end embedded hardware equipment is low in image processing speed and difficult to meet the real-time requirement are solved, the image processing speed and the target positioning speed can be effectively improved through cooperative processing among the multiple cores, the real-time performance and the robustness of target tracking are guaranteed, the embedded image processing equipment can perform real-time processing of high-resolution images, and the reliable and rapid target tracking is guaranteed.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram illustrating a method for tracking a coring correlation filtering target according to an embodiment of the present invention;
fig. 2 is a schematic flowchart of a coring correlation filtering target tracking method according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a coring correlation filtering target tracking system according to an embodiment of the present invention.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the embodiments described below are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons skilled in the art without any inventive work shall fall within the protection scope of the present invention, and the principle and features of the present invention shall be described below with reference to the accompanying drawings.
The terms "comprises" and "comprising," when used in this specification and claims, and in the accompanying drawings and figures, are intended to cover non-exclusive inclusions, such that a process, method or system, or apparatus that comprises a list of steps or elements is not limited to the listed steps or elements.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a principle of a coring correlation filtering target tracking method according to an embodiment of the present invention, as follows:
the FPGA (Field Programmable Gate Array) is a semi-custom circuit in an integrated circuit, and is a Programmable logic Array, and each logic unit and surrounding logic units on the FPGA are determined during reprogramming, so that the FPGA has the characteristic of high processing speed. Image data collected by external connection equipment is sent to a DSP (digital Signal processing) micro-processing chip through a high-speed Serial interface (SRIO) by FPGA control.
The DSP chip includes a plurality of cores, one of which is a master core 201, and the other of which is a slave core 202, where the slave cores 202 are generally a plurality of cores for executing a related filtering algorithm to perform image data processing, and the master core 201 is configured to control the slave cores to execute corresponding image data processing tasks.
The DSP chip may also communicate with an external servo control system through a UART (Universal Asynchronous Receiver/Transmitter), which regulates and controls the process based on the data processing result.
Based on fig. 1, fig. 2 is a schematic flowchart of a coring correlation filtering target tracking method according to an embodiment of the present invention, including:
s201, after an image to be processed is obtained, the FPGA transmits the image to be processed to a multi-core DSP through a high-speed serial interface SRIO;
image data is collected by an external device, such as a camera, and the image can be an image of each frame in a video stream. The image data is controlled by the FPGA to be transmitted to a DSP chip, the DSP chip comprises a plurality of kernels such as four kernels, eight kernels and the like, and the image data processing is carried out by the multi-kernel DSP chip
S202, the multi-core DSP executes a related filtering tracking algorithm in parallel to track and position a single target in an image to be processed;
the method comprises the steps that each time the FPGA sends a frame of image to be processed, Doorbell interruption is sent, EDMA data transmission inside the DSP is triggered, the image to be processed is transmitted to MSMC inside the multi-core DSP, and a master core in the multi-core DSP controls a slave core to execute a related filtering tracking algorithm through inter-core interruption.
The Doorbell is a short message of a quick notification type, is used for a master srio device to notify a slavisio device, can be used for message notification between DSPs, and can also be used for message notification between an FPGA and the DSPs. EDMA (Enhanced Direct Memory Access, i.e., a fast data exchange technology) is triggered by the DoorBell to perform data transmission, the preprocessed image is transmitted to the MSMC (Enhanced Direct Memory Access, i.e., a multi-core shared Memory controller) in the DSP, and data transmission among the core, the Memory and other devices is managed through the MSMC.
The master control core with the number of 0 can be set, the other cores are used as slave cores, the slave cores acquire execution tasks from the master core, the execution results are fed back to the master core, the master core realizes inter-core communication through inter-core interruption, and the acquisition of the tasks of the slave cores is controlled.
Optionally, in an embodiment, training of the correlation filter is further included, including:
selecting an interest target to be detected in advance in an acquired image, acquiring interest target information and sampling window information, and generating and outputting a Gaussian label according to the sampling window size information;
extracting features of the interest target, and performing normalization processing, image cutting and PCA analysis to obtain a feature map of the interest target;
performing fast Fourier transform on the windowed feature map to obtain autocorrelation distribution of the feature map;
and training a correlation filter for target tracking according to the Gaussian label and the autocorrelation distribution.
Further, for the image to be processed, the method comprises the following steps:
performing Hog feature extraction on the image to be processed, and performing normalization processing, cutting and PCA analysis to obtain a feature map;
performing fast Fourier transform on the windowed characteristic diagram to obtain cross-correlation analysis;
and (3) calculating a frequency response diagram of the characteristic diagram by using the trained correlation filter, carrying out inverse Fourier transform on the frequency response diagram, and taking the position corresponding to the maximum value in the time domain as a target position.
Illustratively, a two-dimensional hamming window coswinows is generated according to windows _ sz, each feature windowing window z is map coswinows, the target feature graph is subjected to fourier transformation zf fft (z), a cross-correlation coefficient Kxz zf conj (xf) is obtained, a frequency domain response graph yf alphaf kxz is output, and a position corresponding to the maximum response value is obtained.
Optionally, extracting an image to be processed and calculating a fourier spectrum of the image to be processed;
if the image to be processed is not the initial frame, calculating a confidence distribution map of the current initial frame in a Fourier domain, selecting a point corresponding to the maximum response value as a positioning position, and updating a related filter;
and if the image to be processed is an initial frame, obtaining the autocorrelation analysis of the image to be processed, and initializing a correlation filter.
The method provided by the embodiment can improve the image processing speed, is applied to equipment such as a monitoring camera and photoelectric detection, can realize real-time processing of image data with high resolution and large data volume, and solves the problem of limited image data processing speed of the existing embedded equipment.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
Fig. 3 is a schematic structural diagram of a coring correlation filtering target tracking system according to an embodiment of the present invention, including:
the image transmission module 310 is used for transmitting the image to be processed to the multi-core DSP by the FPGA through the high-speed serial interface SRIO after the image to be processed is acquired;
the algorithm execution module 320 is used for the multi-core DSP to execute the related filtering tracking algorithm in parallel so as to track and position the single target in the image to be processed;
the method comprises the steps that each time the FPGA sends a frame of image to be processed, Doorbell interruption is sent, EDMA data transmission inside the DSP is triggered, the image to be processed is transmitted to MSMC inside the multi-core DSP, and a master core in the multi-core DSP controls a slave core to execute a related filtering tracking algorithm through inter-core interruption.
Optionally, the algorithm executing module 310 includes a training module, where the training module includes:
the acquisition unit is used for selecting a pre-detected interest target in the acquired image, acquiring the interest target information and the sampling window information, and generating and outputting a Gaussian label according to the sampling window size information;
the extraction unit is used for extracting the features of the interest target, and performing normalization processing, image cutting and PCA analysis to obtain a feature map of the interest target;
the autocorrelation analysis unit is used for carrying out fast Fourier transform on the windowed characteristic diagram to obtain autocorrelation distribution of the characteristic diagram;
and the training unit is used for training a correlation filter for target tracking according to the Gaussian label and the autocorrelation distribution.
Optionally, the algorithm executing module includes:
the extraction unit is used for carrying out Hog feature extraction on the image to be processed and carrying out normalization processing, cutting and PCA analysis to obtain a feature map;
the cross-correlation analysis unit is used for carrying out fast Fourier transform on the windowed characteristic diagram to obtain cross-correlation analysis;
and the acquisition unit is used for solving a frequency response diagram of the characteristic diagram by using the trained correlation filter, carrying out inverse Fourier transform on the frequency response diagram, and taking the position corresponding to the maximum value in a time domain as a target position.
Optionally, the algorithm executing module further includes:
the computing unit is used for extracting an image to be processed and computing a Fourier spectrum of the image to be processed;
the judging unit is used for calculating a confidence distribution map of the current initial frame in a Fourier domain if the image to be processed is not the initial frame, selecting a point corresponding to the maximum response value as a positioning position, and updating a related filter;
and if the image to be processed is an initial frame, obtaining the autocorrelation analysis of the image to be processed, and initializing a correlation filter.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
It will be understood by those skilled in the art that all or part of the steps in the method for implementing the above embodiments may be implemented by a program to instruct associated hardware, where the program may be stored in a computer-readable storage medium, and when the program is executed, the steps S201-S202 are executed in real time, and the storage medium includes, for example: ROM/RAM, magnetic disk, optical disk, etc.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (8)
1. A coring correlation filtering target tracking method is characterized by comprising the following steps:
after an image to be processed is obtained, the FPGA transmits the image to be processed to the multi-core DSP through a high-speed serial interface SRIO;
the multi-core DSP executes a related filtering tracking algorithm in parallel to track and position a single target in the image to be processed;
the method comprises the steps that each time the FPGA sends a frame of image to be processed, Doorbell interruption is sent, EDMA data transmission inside the DSP is triggered, the image to be processed is transmitted to MSMC inside the multi-core DSP, and a master core in the multi-core DSP controls a slave core to execute a related filtering tracking algorithm through inter-core interruption.
2. The method of claim 1, wherein before the multi-core DSP executing the correlation filtering tracking algorithm in parallel to perform single-target tracking and positioning in the image to be processed, the method further comprises:
selecting an interest target to be detected in advance in an acquired image, acquiring interest target information and sampling window information, and generating and outputting a Gaussian label according to the sampling window size information;
extracting features of the interest target, and performing normalization processing, image cutting and PCA analysis to obtain a feature map of the interest target;
performing fast Fourier transform on the windowed feature map to obtain autocorrelation distribution of the feature map;
and training a correlation filter for target tracking according to the Gaussian label and the autocorrelation distribution.
3. The method of claim 1, wherein the multi-core DSP executing the correlation filtering tracking algorithm in parallel to perform single-target tracking and positioning in the image to be processed comprises:
performing Hog feature extraction on the image to be processed, and performing normalization processing, cutting and PCA analysis to obtain a feature map;
performing fast Fourier transform on the windowed characteristic diagram to obtain cross-correlation analysis;
and (3) calculating a frequency response diagram of the characteristic diagram by using the trained correlation filter, carrying out inverse Fourier transform on the frequency response diagram, and taking the position corresponding to the maximum value in the time domain as a target position.
4. The method of claim 1, wherein the multi-core DSP executing the correlation filtering tracking algorithm in parallel for single-target tracking and positioning in the image to be processed further comprises:
extracting an image to be processed and calculating a Fourier spectrum of the image to be processed;
if the image to be processed is not the initial frame, calculating a confidence distribution map of the current initial frame in a Fourier domain, selecting a point corresponding to the maximum response value as a positioning position, and updating a related filter;
and if the image to be processed is an initial frame, obtaining the autocorrelation analysis of the image to be processed, and initializing a correlation filter.
5. A coring correlation filtering target tracking system, comprising:
the image transmission module is used for transmitting the image to be processed to the multi-core DSP through the high-speed serial interface SRIO by the FPGA after the image to be processed is obtained;
the algorithm execution module is used for the multi-core DSP to execute related filtering tracking algorithm in parallel so as to track and position a single target in the image to be processed;
the method comprises the steps that each time the FPGA sends a frame of image to be processed, Dorbel interruption is sent, EDMA data transmission inside the DSP is triggered, the image to be processed is transmitted to MSMC inside the multi-core DSP, and a master core in the multi-core DSP controls a slave core to execute a related filtering tracking algorithm through inter-core interruption.
6. The system of claim 5, wherein the algorithm execution module comprises a training module, wherein the training module comprises:
the acquisition unit is used for selecting a pre-detected interest target in the acquired image, acquiring the interest target information and the sampling window information, and generating and outputting a Gaussian label according to the sampling window size information;
the extraction unit is used for extracting the features of the interest target, and performing normalization processing, image cutting and PCA analysis to obtain a feature map of the interest target;
the autocorrelation analysis unit is used for carrying out fast Fourier transform on the windowed characteristic diagram to obtain autocorrelation distribution of the characteristic diagram;
and the training unit is used for training a correlation filter for target tracking according to the Gaussian label and the autocorrelation distribution.
7. The system of claim 5, wherein the algorithm execution module comprises:
the extraction unit is used for carrying out Hog feature extraction on the image to be processed and carrying out normalization processing, cutting and PCA analysis to obtain a feature map;
the cross-correlation analysis unit is used for carrying out fast Fourier transform on the windowed characteristic diagram to obtain cross-correlation analysis;
and the acquisition unit is used for solving a frequency response diagram of the characteristic diagram by using the trained correlation filter, carrying out inverse Fourier transform on the frequency response diagram, and taking the position corresponding to the maximum value in a time domain as a target position.
8. The system of claim 5, wherein the algorithm execution module further comprises:
the computing unit is used for extracting an image to be processed and computing a Fourier spectrum of the image to be processed;
the judging unit is used for calculating a confidence distribution map of the current initial frame in a Fourier domain if the image to be processed is not the initial frame, selecting a point corresponding to the maximum response value as a positioning position, and updating a related filter;
and if the image to be processed is an initial frame, obtaining the autocorrelation analysis of the image to be processed, and initializing a correlation filter.
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