CN110286537B - Array substrate, driving method thereof, liquid crystal display panel and display device - Google Patents

Abstract

The invention discloses an array substrate, a driving method thereof, a liquid crystal display panel and a display device. Since adjacent sub-pixels in the same column are connected to different data lines, two adjacent sub-pixels in the same row are connected to different data lines; For each row of sub-pixels, the same data line connects two sub-pixels that are located on both sides of the data line and are not adjacent to each other, and among the two sub-pixels in the same row that are connected to the same data line, one sub-pixel is adjacent to the data line , and another sub-pixel is separated from the data line by one sub-pixel. Therefore, when the same data signal is applied to the data line, although the coupling of the two sub-pixels connected to the same data line in the same row is also different, since the sub-pixels with different brightness are not adjacent, it can be improved due to the adjacent sub-pixels. Vertical streaks caused by the different brightness of column sub-pixels.

Description

Array substrate, driving method thereof, liquid crystal display panel and display device

technical field

The present invention relates to the field of display technology, in particular to an array substrate, a driving method thereof, a liquid crystal display panel and a display device.

Background technique

Thin Film Transistor-Liquid Crystal Display (TFT-LCD) panels are widely used in mobile products such as mobile phones and tablet computers. At present, in order to realize a full-screen narrow border product, the double gate design as shown in Figure 1 is adopted. Two rows of gate lines gatem control the opening or closing of one row of sub-pixels Pix, and one data line datan connects two columns of sub-pixels Pix, so that the data line datan can be reduced by half.

During display, the brightness of the LCD panel is determined by the pixel voltage (ie, the voltage difference between the common electrode and the pixel electrode). During display, the applied common voltage is fixed, and the voltage of the pixel electrode is applied through the data line. However, in the above double gate design, as shown in FIG. 2 , after the scanning of the gate line gate1 of the first row is completed, since the gate line gate2 of the second row is still scanning, the adjacent two columns of sub-pixels Pix are coupled by the gate line gatem Different situations lead to different optimal common voltages. When the same data signal is applied to two adjacent columns of sub-pixels Pix, due to different coupling conditions, the pixel voltages on the final two columns of sub-pixels Pix are different, resulting in vertical stripes due to different brightness during display.

SUMMARY OF THE INVENTION

In view of this, embodiments of the present invention provide an array substrate, a driving method thereof, a liquid crystal display panel and a display device, so as to alleviate the problem of vertical stripes existing in the prior art.

An array substrate provided by an embodiment of the present invention includes a base substrate, 2N columns of sub-pixels arranged in a matrix on the base substrate, N+2 data lines and a plurality of gate lines; wherein,

One of the grid lines is respectively provided on both sides of each row of sub-pixels, and two of the grid lines are provided between two adjacent rows of sub-pixels;

The 2nth column of sub-pixels and the 2n+1 column of sub-pixels are used as a unit group; one of the data lines is respectively provided on both sides of each of the unit groups, and one of the data lines is provided between two adjacent unit groups. a data line; and one side of the first column of sub-pixels close to the base substrate and one side of the last column of sub-pixels close to the other side of the base substrate are respectively provided with one of the data lines;

Each of the sub-pixels is respectively connected to one of the data lines located on both sides of the sub-pixel, adjacent sub-pixels in the same column are connected to different data lines, and two adjacent sub-pixels in the same row are connected to different data lines ;

For each row of sub-pixels, the same data line connects two sub-pixels that are located on both sides of the data line and are not adjacent to each other, and among the two sub-pixels in the same row that are connected to the same data line, one sub-pixel is connected to the data line. Adjacent, another sub-pixel is separated from the data line by one sub-pixel;

The two sub-pixels located in the same row and connected to the same data line are respectively connected to different gate lines located on both sides of the sub-pixels in the row.

An array substrate provided by an embodiment of the present invention includes a base substrate, 2N columns of sub-pixels arranged in a matrix on the base substrate, N+1 data lines and a plurality of gate lines; wherein,

One grid line is respectively provided on both sides of the sub-pixels in each row, and two grid lines are provided between the sub-pixels in two adjacent rows;

Take the 2n-1 column of sub-pixels and the 2n-column sub-pixels as a unit group; one of the data lines is respectively provided on both sides of each of the unit groups, and one of the data lines is provided between two adjacent unit groups. Data line; n is any integer greater than 0 and less than or equal to N;

Each of the sub-pixels is respectively connected to one of the data lines located on both sides of the sub-pixel, adjacent sub-pixels in the same column are connected to different data lines, and two adjacent sub-pixels in the same row are connected to different data lines ;

For each row of sub-pixels, the same data line connects two sub-pixels that are located on both sides of the data line and are not adjacent to each other, and among the two sub-pixels in the same row that are connected to the same data line, one sub-pixel is connected to the data line. Adjacent, another sub-pixel is separated from the data line by one sub-pixel;

The two sub-pixels located in the same row and connected to the same data line are respectively connected to different gate lines located on both sides of the sub-pixels in the row.

Correspondingly, the embodiments of the present invention also provide a liquid crystal display panel, including the array substrate provided by the embodiments of the present invention.

Correspondingly, an embodiment of the present invention further provides a display device including the liquid crystal display panel provided by the embodiment of the present invention.

Correspondingly, an embodiment of the present invention also provides a method for driving the above-mentioned array substrate, including:

When each frame is displayed, the scanning signal is output to the gate line line by line;

And in one frame, the polarity of the data signal output to the same data line is the same, and the polarity of the data signal output to the adjacent data line is opposite; in two adjacent frames, the polarity of the data signal output to the same data line is opposite. Sex is the opposite.

The beneficial effects of the present invention are as follows:

In the array substrate, the driving method thereof, the liquid crystal display panel and the display device provided by the embodiments of the present invention, since adjacent sub-pixels in the same column are connected to different data lines, and two adjacent sub-pixels in the same row are connected to different data lines; For each row of sub-pixels, the same data line connects two sub-pixels that are located on both sides of the data line and are not adjacent to each other, and among the two sub-pixels in the same row that are connected to the same data line, one sub-pixel is adjacent to the data line , and another sub-pixel is separated from the data line by one sub-pixel. Therefore, when the same data signal is applied to the data line, although the coupling of the two sub-pixels connected to the same data line in the same row is also different, since the sub-pixels with different brightness are not adjacent, the improvement can be improved due to the adjacent sub-pixels. Vertical streaks caused by the different brightness of column sub-pixels.

Description of drawings

1 is a schematic structural diagram of a liquid crystal display panel with a double-gate design in the related art;

FIG. 2 is a timing diagram corresponding to two adjacent grid lines in the liquid crystal display panel shown in FIG. 1;

FIG. 3 is a schematic structural diagram of an array substrate provided by an embodiment of the present invention;

FIG. 4 is a schematic structural diagram of an array substrate provided by another embodiment of the present invention;

FIG. 5 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 6 is a schematic structural diagram of an array substrate provided by another embodiment of the present invention;

FIG. 7 is a schematic structural diagram of an array substrate provided by another embodiment of the present invention;

FIG. 8 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 9 is a schematic structural diagram of an array substrate provided by another embodiment of the present invention;

FIG. 10 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 11 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 12 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 13 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 14 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 15 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 16 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 17 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 18 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

FIG. 19 is a schematic structural diagram of an array substrate provided by another embodiment of the present invention;

FIG. 20 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;

21 is a schematic structural diagram of a liquid crystal display panel according to an embodiment of the present invention;

FIG. 22 is a schematic structural diagram of a display device according to an embodiment of the present invention.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

The shapes and sizes of the components in the drawings do not reflect the actual scale, and are only intended to illustrate the content of the present invention.

An array substrate provided by an embodiment of the present invention includes a base substrate, as shown in FIG. 3 to FIG. 12 , 2N columns of sub-pixels Pix, N+2 data lines and a plurality of gate lines are arranged in a matrix on the base substrate. ; wherein, N is any number greater than or equal to 1, and N=4 is used as an example in the accompanying drawings to illustrate;

A grid line Gm is respectively provided on both sides of each row of sub-pixels Pix, and two grid lines Gm are provided between two adjacent rows of sub-pixels Pix;

Take the 2nth column sub-pixel Pix and the 2n+1 column sub-pixel Pix as a unit group 2P; a data line Di is respectively provided on both sides of each unit group 2P, and a data line is provided between two adjacent unit groups 2P Di; and a data line Di is respectively provided on one side of the first column of sub-pixels Pix close to the base substrate and the last column of sub-pixels Pix close to the other side of the base substrate;

Each sub-pixel Pix is respectively connected with one of the data lines Di in the data lines Di located on both sides thereof, adjacent sub-pixels Pix in the same column are connected to different data lines Di, and two adjacent sub-pixels Pix in the same row are connected. Different data lines Di;

For each row of sub-pixels Pix, the same data line Di connects two sub-pixels Pix that are located on both sides of the data line Di and are not adjacent to each other, and among the two sub-pixels Pix connected to the same data line Di in the same row, one sub-pixel Pix The pixel Pix is adjacent to the data line Di, and the other sub-pixel Pix is separated from the data line Di by a sub-pixel Pix;

The two sub-pixels Pix located in the same row and connected to the same data line Di are respectively connected to different gate lines Gm located on both sides of the sub-pixels Pix in the row.

In the array substrate provided by the embodiment of the present invention, since adjacent sub-pixels in the same column are connected to different data lines, two adjacent sub-pixels in the same row are connected to different data lines; for each row of sub-pixels, the same data line Connect two sub-pixels that are located on both sides of the data line and are not adjacent, and among the two sub-pixels connected to the same data line in the same row, one sub-pixel is adjacent to the data line, and the other sub-pixel is spaced from the data line a subpixel. Therefore, when the same data signal is applied to the data line, although the coupling of the two sub-pixels connected to the same data line in the same row is also different, since the sub-pixels with different brightness are not adjacent, the improvement can be improved due to the adjacent sub-pixels. Vertical streaks caused by the different brightness of column sub-pixels.

In addition, the array substrate provided by the embodiments of the present invention can also implement a dot inversion driving manner, thereby improving the quality of the display panel.

Optionally, in an array substrate provided by an embodiment of the present invention, as shown in FIG. 3 to FIG. 7 , the first data line D1 is connected to the sub-pixels Pix in odd-numbered rows in the first column; the second data line D1 D2 is respectively connected to the even-numbered sub-pixels Pix in the first column, the odd-numbered sub-pixels Pix in the second column and the even-numbered sub-pixels Pix in the third column; the m-th data line Dm is respectively connected with the even-numbered rows in the 2m-4th column The sub-pixels Pix, the odd-numbered sub-pixels Pix in the 2m-3 column, the even-numbered sub-pixels Pix in the 2m-2 column, and the odd-numbered sub-pixels Pix in the 2m-1 column are connected; The odd-numbered sub-pixels Pix of the 2k-4 columns, the even-numbered sub-pixels Pix of the 2k-3 columns, the odd-numbered sub-pixels Pix of the 2k-2 columns and the even-numbered sub-pixels Pix of the 2k-1 columns are connected; m is Any odd number greater than 2 and less than or equal to N, k is any even number greater than 1 and less than or equal to N;

If N is an odd number, the N+1 th data line DN+1 is connected to the odd-numbered sub-pixels Pix in the 2N-2 column, the even-numbered sub-pixels Pix in the 2N-1 column, and the odd-numbered sub-pixels Pix in the 2N-th column. Connection; the N+2th data line DN+2 is connected to the even-numbered sub-pixels Pix in the 2Nth column; if N is an even number, the N+1th data line DN+1 is respectively connected with the even-numbered subpixels in the 2N-2th column. The pixel Pix, the odd-numbered sub-pixels Pix in the 2N-1th column, and the even-numbered sub-pixels Pix in the 2N-th column are connected; the N+2-th data line DN+2 is connected with the odd-numbered sub-pixels Pix in the 2Nth column.

Optionally, in another array substrate provided by the embodiment of the present invention, as shown in FIG. 8 to FIG. 12 , the first data line D1 is connected to the sub-pixels Pix in the even-numbered rows of the first column; the second data line D1 D2 is respectively connected with the odd-numbered sub-pixels Pix in the first column, the even-numbered sub-pixels Pix in the second column, and the odd-numbered sub-pixels Pix in the third column; the m-th data line Dm is respectively connected with the odd-numbered rows in the 2m-4th column. The sub-pixels Pix, the even-numbered sub-pixels Pix in the 2m-3 column, the odd-numbered sub-pixels Pix in the 2m-2 column, and the even-numbered sub-pixels Pix in the 2m-1 column are connected; The even-numbered sub-pixels Pix of the 2k-4 columns, the odd-numbered sub-pixels Pix of the 2k-3 columns, the even-numbered sub-pixels Pix of the 2k-2 columns and the odd-numbered sub-pixels Pix of the 2k-1 columns are connected; m is Any odd number greater than 2 and less than or equal to N, k is any even number greater than 2 and less than or equal to N;

If N is an odd number, the N+1 data line DN+1 is respectively connected to the even-numbered sub-pixels Pix in the 2N-2 column, the odd-numbered sub-pixels Pix in the 2N-1 column, and the even-numbered sub-pixels Pix in the 2N-th column. Connection; the N+2th data line DN+2 is connected to the odd-numbered row sub-pixel Pix in the 2Nth column; if N is an even number, the N+1th data line DN+1 is respectively connected with the odd-numbered row subpixels in the 2N-2th column. The pixels Pix, the sub-pixels Pix of the even rows in the 2N-1th column, and the sub-pixels Pix of the odd rows of the 2Nth column are connected; the N+2-th data line DN+2 is connected to the sub-pixels Pix of the even-numbered rows of the 2Nth column.

In specific implementation, in the array substrate provided by the embodiment of the present invention, for two sub-pixels connected to the same data line in each row, as long as it is ensured that the two sub-pixels are respectively connected to different gate lines located on both sides of the row of sub-pixels, that is Yes, it is not limited here. The present invention will be described in detail below with reference to specific embodiments. It should be noted that this embodiment is for better explanation of the present invention, but does not limit the present invention.

Optionally, in the array substrate provided by the embodiment of the present invention, as shown in FIG. 4 and FIG. 9 , the sub-pixels Pix in the 2x column and the sub-pixels Pix in the 2x-1 column are connected to the odd-numbered row gate lines Gm, and the sub-pixels Pix in the 2y-th column are connected. and the 2y-1 column sub-pixel Pix is connected to the even-numbered row gate line Gm;

Wherein, x is any even number greater than or equal to 2 and less than or equal to N; y is any odd number greater than or equal to 1 and less than or equal to N.

Or, optionally, in the array substrate provided in the embodiment of the present invention, as shown in FIG. 3 and FIG. 8 , the sub-pixels Pix in the 2x column and the sub-pixels Pix in the 2x-1 column are connected to the gate lines Gm in the even-numbered rows, and the sub-pixels in the 2y column are connected to the gate lines Gm in the even rows. The pixel Pix and the 2y-1 column sub-pixel Pix are connected to the odd-numbered row gate lines Gm;

Wherein, x is any even number greater than or equal to 2 and less than or equal to N; y is any odd number greater than or equal to 1 and less than or equal to N.

Optionally, in the array substrate provided by the embodiment of the present invention, as shown in FIG. 7 and FIG. 12 , for the sub-pixels Pix in the same column, in every two adjacent sub-pixels Pix, one sub-pixel Pix is connected to the odd-numbered row gate lines Gm, The other sub-pixels Pix are all connected to the even-numbered row gate lines Gm.

Alternatively, in the array substrate provided by the embodiment of the present invention, for the sub-pixels Pix in the same column, each adjacent a sub-pixels Pix is a group, and in the adjacent two groups, the a sub-pixels Pix in one group are all related to odd-numbered rows. The gate lines Gm are connected, and the a sub-pixels Pix in the other group are all connected with the gate lines Gm in the even-numbered rows. Among them, a is an integer greater than or equal to 2. That is, in each column of sub-pixels, half of the sub-pixels Pix are connected to the odd-numbered row gate lines Gm, and half of the sub-pixels Pix are connected to the even-numbered row gate lines Gm. And the groups connected to the odd-numbered row gate lines Gm and the groups connected to the even-numbered row gate lines Gm are alternately arranged, so that when the alignment dislocation occurs along the data line direction during the preparation of the array substrate, half of the sub-pixels Pix in each column are The distance between the sub-pixels Pix and the gate line Gm becomes smaller, and the distance between half of the sub-pixels Pix and the gate line Gm becomes larger, that is, in each column of the sub-pixels Pix, half of the sub-pixels Pix will be darkened, half of the sub-pixels Pix will be brighter, and the The dark sub-pixels Pix and the brightened sub-pixels Pix are alternately arranged, so the bright and dark vertical stripes caused by the alignment dislocation along the direction of the data lines during the fabrication of the array substrate can be improved.

Optionally, in the array substrate provided by the embodiment of the present invention, as shown in FIG. 5, FIG. 6, FIG. 10 and FIG. 11, for the same column of sub-pixels Pix, each adjacent two sub-pixels Pix are a group, and the In the adjacent two groups, the two sub-pixels Pix in one group are both connected to the odd-numbered row gate lines Gm, and the two sub-pixels Pix in the other group are both connected to the even-numbered row gate lines Gm.

Based on the same inventive concept, an embodiment of the present invention further provides another array substrate, including a base substrate, as shown in FIG. 13 to FIG. 20 , 2N columns of sub-pixels Pix, N+1 sub-pixels arranged in a matrix on the base substrate data line Di and a plurality of gate lines Gm; wherein,

A grid line Gm is respectively provided on both sides of each row of sub-pixels Pix, and two grid lines Gm are provided between two adjacent rows of sub-pixels Pix;

Take the 2n-1 column sub-pixel Pix and the 2n-column sub-pixel Pix sub-pixel Pix as a unit group; a data line Di is respectively provided on both sides of each unit group, and a data line is provided between two adjacent unit groups Di; n is any integer greater than 0 and less than or equal to N;

Each sub-pixel Pix is respectively connected with one of the data lines Di in the data lines Di located on both sides thereof, adjacent sub-pixels Pix in the same column are connected to different data lines Di, and two adjacent sub-pixels Pix in the same row are connected. Different data lines Di;

For each row of sub-pixels, the same data line Di connects two sub-pixels Pix that are located on both sides of the data line Di and are not adjacent to each other, and among the two sub-pixels Pix connected to the same data line Di in the same row, one sub-pixel Pix is adjacent to the data line Di, and another sub-pixel Pix is separated from the data line Di by a sub-pixel Pix;

The two sub-pixels Pix located in the same row and connected to the same data line Di are respectively connected to different gate lines Gm located on both sides of the sub-pixels Pix in the row.

In the array substrate provided by the embodiment of the present invention, since adjacent sub-pixels in the same column are connected to different data lines, two adjacent sub-pixels in the same row are connected to different data lines; for each row of sub-pixels, the same data line Connect two sub-pixels that are located on both sides of the data line and are not adjacent, and among the two sub-pixels connected to the same data line in the same row, one sub-pixel is adjacent to the data line, and the other sub-pixel is spaced from the data line a subpixel. Therefore, when the same data signal is applied to the data line, although the coupling of the two sub-pixels connected to the same data line in the same row is also different, since the sub-pixels with different brightness are not adjacent, the improvement can be improved due to the adjacent sub-pixels. Vertical streaks caused by the different brightness of column sub-pixels.

In addition, the array substrate provided by the embodiments of the present invention can also implement a dot inversion driving manner, thereby improving the quality of the display panel.

Optionally, in an array substrate provided by an embodiment of the present invention, as shown in FIG. 13 to FIG. 16 , the first data line D1 is connected to the sub-pixels Pix in odd-numbered rows in the first column; the kth data line Dk is respectively connected with the even-numbered sub-pixel Pix of the 2k-3 column, the odd-numbered sub-pixel Pix of the 2k-2 column, the even-numbered sub-pixel Pix of the 2k-1 column and the odd-numbered sub-pixel Pix of the 2k column; The m-th data line Dm is respectively connected with the odd-numbered sub-pixels Pix in the 2m-3 column, the even-numbered sub-pixels Pix in the 2m-2 column, the odd-numbered sub-pixels Pix in the 2m-1 column, and the even-numbered rows in the 2m-th column. Sub-pixel Pix connection; k is any even number greater than 1 and less than or equal to N, m is any odd number greater than 2 and less than or equal to N;

If N is an odd number, the N+1 data line DN+1 is respectively connected to the odd-numbered sub-pixels Pix in the 2N-1 column and the even-numbered sub-pixels Pix in the 2N column; if N is an even number, the N+1 line The data line DN+1 is respectively connected to the sub-pixels Pix in the odd-numbered rows of the 2N-1th column and the sub-pixels Pix in the even-numbered rows in the 2N-th column.

Optionally, in another array substrate provided by the embodiment of the present invention, as shown in FIG. 17 to FIG. 20 , the first data line D1 is connected to the sub-pixels Pix in the even-numbered rows of the first column; The lines Dk are respectively connected with the odd-numbered sub-pixels Pix in the 2k-3 columns, the even-numbered sub-pixels Pix in the 2k-2 columns, the odd-numbered sub-pixels Pix in the 2k-1 column, and the even-numbered sub-pixels Pix in the 2k-th column. ; The m-th data line Dm is respectively with the even-numbered sub-pixel Pix of the 2m-3 column, the odd-numbered sub-pixel Pix of the 2m-2 column, the even-numbered sub-pixel Pix of the 2m-1 column and the odd-numbered row of the 2m column The row sub-pixels Pix are connected; k is any even number greater than 1 and less than or equal to N, m is any even number greater than 2 and less than or equal to N;

If N is an odd number, the N+1 data line DN+1 is respectively connected to the even-numbered sub-pixels Pix in the 2N-1 column and the odd-numbered sub-pixels Pix in the 2N column; if N is an even number, the N+1 line The data line D N+1 is respectively connected to the sub-pixels Pix of the even-numbered rows in the 2N-1th column and the sub-pixels Pix of the odd-numbered rows of the 2N-th column.

In specific implementation, in the array substrate provided by the embodiment of the present invention, for two sub-pixels connected to the same data line in each row, as long as it is ensured that the two sub-pixels are respectively connected to different gate lines located on both sides of the row of sub-pixels, that is Yes, it is not limited here. The present invention will be described in detail below with reference to specific embodiments. It should be noted that this embodiment is for better explanation of the present invention, but does not limit the present invention. Optionally, in the array substrate provided in the embodiment of the present invention, as shown in FIG. 13 and FIG. 17 ,

The 2i-th column sub-pixel Pix and the 2i-3th column sub-pixel Pix are connected to the odd-numbered row gate lines Gm, and the 2i-2th column sub-pixel Pix and the 2i-1th column sub-pixel Pix are connected to the even-numbered row gate lines Gm; wherein, i is greater than or Any number equal to 2 and less than or equal to N.

Or, optionally, in the array substrate provided in the embodiment of the present invention, as shown in FIG. 14 and FIG. 18 ,

The sub-pixels Pix in the 2i-th column and the sub-pixels Pix in the 2i-3rd column are connected to the grid lines Gm of the even-numbered rows, and the sub-pixels Pix of the 2i-2th columns and the sub-pixels Pix of the 2i-1th column are connected to the grid lines Gm of the odd-numbered rows; wherein, i is greater than or Any number equal to 2 and less than or equal to N.

In specific implementation, in the array substrate provided by the embodiment of the present invention, for the sub-pixels Pix in the same column, each adjacent a sub-pixels Pix is a group, and in the adjacent two groups, the a sub-pixels Pix in one group are all It is connected to the odd-numbered row gate lines Gm, and the a sub-pixels Pix in the other group are all connected to the even-numbered row gate lines Gm. Among them, a is an integer greater than or equal to 2. That is, in each column of sub-pixels, half of the sub-pixels Pix are connected to the odd-numbered row gate lines Gm, and half of the sub-pixels Pix are connected to the even-numbered row gate lines Gm. And the groups connected to the odd-numbered row gate lines Gm and the groups connected to the even-numbered row gate lines Gm are alternately arranged, so that when the alignment dislocation occurs along the data line direction during the preparation of the array substrate, half of the sub-pixels Pix in each column are The distance between the sub-pixels Pix and the gate line Gm becomes smaller, and the distance between half of the sub-pixels Pix and the gate line Gm becomes larger, that is, in each column of the sub-pixels Pix, half of the sub-pixels Pix will be darkened, half of the sub-pixels Pix will be brighter, and the The dark sub-pixels Pix and the brightened sub-pixels Pix are alternately arranged, so the bright and dark vertical stripes caused by the alignment dislocation along the direction of the data lines during the fabrication of the array substrate can be improved.

Optionally, in the array substrate provided in the embodiment of the present invention, as shown in FIG. 15 , FIG. 16 , FIG. 19 , and FIG. 20 , for the sub-pixels Pix in the same column, each adjacent two sub-pixels Pix is a group, and the In the adjacent two groups, the two sub-pixels Pix in one group are both connected to the odd-numbered row gate lines Gm, and the two sub-pixels Pix in the other group are both connected to the even-numbered row gate lines Gm.

Based on the same inventive concept, an embodiment of the present invention further provides a method for driving the above-mentioned array substrate, including:

When displaying each frame, output the scanning signal to the gate line Gm line by line;

And in a frame of picture, referring to FIG. 3 to FIG. 20, the polarity of the data signal output to the same data line Di is the same, and the polarity of the data signal output to the adjacent data lines Di and Di+1 is opposite;

In two adjacent frames, the polarities of the data signals output to the same data line Di are opposite.

By adopting the above driving method in the embodiments of the present invention, a dot inversion driving manner can be implemented, thereby improving the quality of the display panel.

Based on the same inventive concept, an embodiment of the present invention further provides a liquid crystal display panel, including any one of the array substrates provided in the embodiment of the present invention. Since the principle of solving the problem of the liquid crystal display is similar to that of the aforementioned array substrate, the implementation of the liquid crystal display panel can refer to the implementation of the aforementioned array substrate, and the repetition will not be repeated.

Specifically, as shown in FIG. 21 , in the liquid crystal display panel, the array substrate has a display area AA and a non-display area BB; the gate line Gm, the data line Di and the sub-pixels Pix are located in the display area AA; the non-display area BB includes a gate driving circuit 100 and source driver circuit 200.

In specific implementation, in the implementation of the present invention, the liquid crystal display panel may include two gate driving circuits 100 . Optionally, as shown in FIG. 21 , one output terminal of each gate driving circuit is connected to one gate line in the array substrate, and the output terminals of the same stage in the two gate driving circuits are connected to the same gate line.

In specific implementation, in the implementation of the present invention, the liquid crystal display panel may also include one gate driving circuit.

Based on the same inventive concept, an embodiment of the present invention further provides a display device, including any of the above-mentioned liquid crystal display panels provided by the embodiment of the present invention. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc., as shown in FIG. 22 . For the implementation of the display device, reference may be made to the above-mentioned embodiments of the liquid crystal display panel, and repeated descriptions will not be repeated.

In the above-mentioned array substrate, driving method, liquid crystal display panel, and display device provided by the embodiments of the present invention, since adjacent sub-pixels in the same column are connected to different data lines, and two adjacent sub-pixels in the same row are connected to different data lines ; For each row of sub-pixels, the same data line connects two sub-pixels that are located on both sides of the data line and are not adjacent to each other, and in the two sub-pixels connected to the same data line in the same row, a sub-pixel is in phase with the data line. Adjacent, another sub-pixel is separated from the data line by one sub-pixel. Therefore, when the same data signal is applied to the data line, although the coupling of the two sub-pixels connected to the same data line in the same row is also different, since the sub-pixels with different brightness are not adjacent, the improvement can be improved due to the adjacent sub-pixels. Vertical streaks caused by the different brightness of column sub-pixels.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention. Thus, provided that these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims (9)

1. An array substrate, characterized in that it comprises a base substrate, 2N columns of sub-pixels arranged in a matrix on the base substrate, N+2 data lines and a plurality of gate lines; wherein, One of the grid lines is respectively provided on both sides of each row of sub-pixels, and two of the grid lines are provided between two adjacent rows of sub-pixels; The 2nth column of sub-pixels and the 2n+1 column of sub-pixels are used as a unit group; one of the data lines is respectively provided on both sides of each of the unit groups, and one of the data lines is provided between two adjacent unit groups. a data line; and one side of the first column of sub-pixels close to the base substrate and one side of the last column of sub-pixels close to the other side of the base substrate are respectively provided with one of the data lines; Each of the sub-pixels is respectively connected to one of the data lines located on both sides of the sub-pixel, adjacent sub-pixels in the same column are connected to different data lines, and two adjacent sub-pixels in the same row are connected to different data lines ; For each row of sub-pixels, the same data line connects two sub-pixels that are located on both sides of the data line and are not adjacent to each other, and among the two sub-pixels in the same row that are connected to the same data line, one sub-pixel is connected to the data line. Adjacent, another sub-pixel is separated from the data line by one sub-pixel; Two of the sub-pixels located in the same row and connected to the same data line are respectively connected to different gate lines located on both sides of the row of sub-pixels; For sub-pixels in the same column, each adjacent two sub-pixels are regarded as a group. In two adjacent groups, two sub-pixels in one group are connected to the grid lines of odd-numbered rows, and two sub-pixels in the other group are connected to even-numbered rows. grid connection. 2. The array substrate according to claim 1, wherein, The first data line is connected to the sub-pixels of the odd-numbered rows in the first column; the second data line is connected to the sub-pixels of the even-numbered rows of the first column, the sub-pixels of the odd-numbered rows of the second column, and the sub-pixels of the even-numbered rows of the third column respectively. Connect; the mth data line is respectively connected with the even-numbered sub-pixels in the 2m-4th column, the odd-numbered sub-pixels in the 2m-3 column, the even-numbered sub-pixels in the 2m-2 column and the odd-numbered rows in the 2m-1 column. The sub-pixels are connected; the k-th data line is respectively connected with the odd-numbered sub-pixels in the 2k-4 columns, the even-numbered sub-pixels in the 2k-3 columns, the odd-numbered sub-pixels in the 2k-2 columns and the 2k-1 columns. Even-numbered rows of sub-pixels are connected; m is any odd number greater than 2 and less than or equal to N, and k is any even number greater than 1 and less than or equal to N; If N is an odd number, the N+1 data line is connected to the odd-numbered sub-pixels in the 2N-2 column, the even-numbered sub-pixels in the 2N-1 column, and the odd-numbered sub-pixels in the 2N column; N+2 A data line is connected to the even-numbered sub-pixels in the 2Nth column; if N is an even number, the N+1 data line is connected to the even-numbered sub-pixels in the 2N-2 column, the odd-numbered sub-pixels in the 2N-1 column, and The sub-pixels in the even-numbered rows in the 2Nth column are connected; the N+2-th data line is connected with the sub-pixels in the odd-numbered rows in the 2Nth column. 3. The array substrate according to claim 1, wherein, The first data line is connected to the sub-pixels of the even-numbered rows in the first column; the second data line is respectively connected to the sub-pixels of the odd-numbered rows of the first column, the sub-pixels of the even-numbered rows of the second column, and the sub-pixels of the odd-numbered rows of the third column. Connection; the mth data line is respectively connected with the odd-numbered sub-pixels in the 2m-4th column, the even-numbered sub-pixels in the 2m-3 column, the odd-numbered sub-pixels in the 2m-2 column, and the even-numbered rows in the 2m-1 column. The sub-pixels are connected; the k-th data line is respectively connected with the even-numbered sub-pixels in the 2k-4 columns, the odd-numbered sub-pixels in the 2k-3 columns, the even-numbered sub-pixels in the 2k-2 columns and the 2k-1 columns. Odd row sub-pixel connections; m is any odd number greater than 2 and less than or equal to N, k is any even number greater than 2 and less than or equal to N; If N is an odd number, the N+1 data line is respectively connected to the even-numbered sub-pixels in the 2N-2 column, the odd-numbered sub-pixels in the 2N-1 column, and the even-numbered sub-pixels in the 2N column; N+2 A data line is connected to the odd-numbered sub-pixels in the 2Nth column; if N is an even number, the N+1 data line is connected to the odd-numbered sub-pixels in the 2N-2 column, the even-numbered sub-pixels in the 2N-1 column, and The sub-pixels in the odd-numbered rows in the 2Nth column are connected; the N+2-th data line is connected with the sub-pixels in the even-numbered rows in the 2Nth column. 4. An array substrate, comprising a base substrate, 2N columns of sub-pixels arranged in a matrix on the base substrate, N+1 data lines and a plurality of gate lines; wherein, One grid line is respectively provided on both sides of the sub-pixels in each row, and two grid lines are provided between the sub-pixels in two adjacent rows; Take the 2n-1 column of sub-pixels and the 2n-column sub-pixels as a unit group; one of the data lines is respectively provided on both sides of each of the unit groups, and one of the data lines is provided between two adjacent unit groups. Data line; n is any integer greater than 0 and less than or equal to N; Each of the sub-pixels is respectively connected to one of the data lines located on both sides of the sub-pixel, adjacent sub-pixels in the same column are connected to different data lines, and two adjacent sub-pixels in the same row are connected to different data lines ; For each row of sub-pixels, the same data line connects two sub-pixels that are located on both sides of the data line and are not adjacent to each other, and among the two sub-pixels in the same row that are connected to the same data line, one sub-pixel is connected to the data line. Adjacent, another sub-pixel is separated from the data line by one sub-pixel; Two of the sub-pixels located in the same row and connected to the same data line are respectively connected to different gate lines located on both sides of the row of sub-pixels; For sub-pixels in the same column, each adjacent two sub-pixels are regarded as a group. In two adjacent groups, two sub-pixels in one group are connected to the grid lines of odd-numbered rows, and two sub-pixels in the other group are connected to even-numbered rows. grid connection. 5. The array substrate of claim 4, wherein, The first data line is connected to the sub-pixels of the odd-numbered rows in the first column; the k-th data line is respectively connected to the sub-pixels of the even-numbered rows of the 2k-3 columns, the odd-numbered sub-pixels of the The even-numbered sub-pixels of the column and the odd-numbered sub-pixels of the 2kth column are connected; the m-th data line is respectively connected with the odd-numbered sub-pixels of the 2m-3 column, the even-numbered sub-pixels of the 2m-2 column, and the 2m-1 The odd-numbered sub-pixels of the column and the even-numbered sub-pixels of the 2mth column are connected; k is any even number greater than 1 and less than or equal to N, m is any odd number greater than 2 and less than or equal to N; If N is an odd number, the N+1 data line is respectively connected to the odd-numbered sub-pixels in the 2N-1 column and the even-numbered sub-pixels in the 2N column; if N is an even number, the N+1 data line is connected to the The odd-numbered sub-pixels in the 2N-1 column and the even-numbered sub-pixels in the 2N-th column are connected. 6. The array substrate of claim 4, wherein, The first data line is connected to the sub-pixels of the even-numbered rows in the first column; the k-th data line is connected to the sub-pixels of the odd-numbered rows of the The odd-numbered sub-pixels of the column and the even-numbered sub-pixels of the 2kth column are connected; the m-th data line is respectively connected to the even-numbered sub-pixels of the 2m-3 column, the odd-numbered sub-pixels of the 2m-2 column, and the 2m-1 The even-numbered sub-pixels of the column and the odd-numbered sub-pixels of the 2mth column are connected; k is any even number greater than 1 and less than or equal to N, m is any even number greater than 2 and less than or equal to N; If N is an odd number, the N+1 data line is connected to the sub-pixels in the even rows of the 2N-1 column and the sub-pixels in the odd row of the 2N column respectively; if N is an even number, the N+1 data line is respectively connected to the The even-row sub-pixels in the 2N-1 column and the odd-row sub-pixels in the 2Nth column are connected. 7. A liquid crystal display panel, comprising the array substrate according to any one of claims 1-6. 8. A display device, comprising the liquid crystal display panel according to claim 7. 9. A method for driving an array substrate according to any one of claims 1-6, characterized in that, comprising: When each frame of picture is displayed, the scanning signal is output to the gate line line by line; And in one frame, the polarity of the data signal output to the same data line is the same, and the polarity of the data signal output to the adjacent data line is opposite; in two adjacent frames, the polarity of the data signal output to the same data line is opposite. Sex is the opposite.

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