CN110286537A - Array substrate, driving method thereof, liquid crystal display panel, and display device - Google Patents
Array substrate, driving method thereof, liquid crystal display panel, and display device Download PDFInfo
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- CN110286537A CN110286537A CN201910580640.7A CN201910580640A CN110286537A CN 110286537 A CN110286537 A CN 110286537A CN 201910580640 A CN201910580640 A CN 201910580640A CN 110286537 A CN110286537 A CN 110286537A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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Abstract
The invention discloses an array substrate, a driving method thereof, a liquid crystal display panel and a display device.A plurality of adjacent sub-pixels in the same column are connected with different data lines, and two adjacent sub-pixels in the same row are connected with different data lines; for each row of sub-pixels, the same data line is connected with two sub-pixels which are positioned at two sides of the data line and are not adjacent, and in the two sub-pixels which are connected with the same data line in the same row, one sub-pixel is adjacent to the data line, and the other sub-pixel is separated from the data line by one sub-pixel. Therefore, when the same data signal is applied to the data line, although the coupling of two sub-pixels connected with the same data line in the same row is different, because the sub-pixels with different brightness are not adjacent, the vertical stripes caused by the different brightness of the sub-pixels in adjacent columns can be improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a driving method thereof, a liquid crystal display panel and a display device.
Background
Thin Film Transistor Liquid Crystal Display (TFT-LCD) panels are widely used in mobile products such as mobile phones and tablet computers. At present, in order to realize a full-screen narrow-frame product, a double-gate design as shown in fig. 1 is adopted, two rows of gate lines gate control one row of sub-pixels Pix to be turned on or off, and one data line datan is connected with two columns of sub-pixels Pix, so that the data line datan can be reduced by half.
The liquid crystal display panel has a luminance determined by a pixel voltage (i.e., a voltage difference between the common electrode and the pixel electrode) during display, and the applied common voltage is constant and the voltage of the pixel electrode is applied through the data line during display. However, in the dual-gate design, as shown in fig. 2, after the scanning of the first row gate line gate1 is finished, since the second row gate line gate2 is still scanning, the coupling conditions of the sub-pixels Pix in two adjacent columns by the gate line gate are different, so that the optimal common voltages are different. When the same data signal is applied to two adjacent columns of sub-pixels Pix, the pixel voltages on the final two columns of sub-pixels Pix are different due to different coupling conditions, so that the vertical stripes are generated due to different brightness during display.
Disclosure of Invention
Embodiments of the present invention provide an array substrate, a driving method thereof, a liquid crystal display panel and a display device to alleviate the vertical stripe problem in the prior art.
The array substrate provided by the embodiment of the invention comprises a substrate, 2N rows of sub-pixels arranged on the substrate in a matrix manner, N +2 data lines and a plurality of grid lines, wherein the sub-pixels are arranged on the substrate in a matrix manner; wherein,
two sides of each row of sub-pixels are respectively provided with one grid line, and two grid lines are arranged between two adjacent rows of sub-pixels;
taking the sub-pixels in the 2n th column and the sub-pixels in the 2n +1 th column as a unit group; two sides of each unit group are respectively provided with one data line, and one data line is arranged between two adjacent unit groups; one side of the sub-pixel in the 1 st column close to the substrate base plate and the other side of the sub-pixel in the last column close to the substrate base plate are respectively provided with one data line;
each sub-pixel is respectively connected with one of the data lines positioned at two sides of the sub-pixel, adjacent sub-pixels in the same column are connected with different data lines, and two adjacent sub-pixels in the same row are connected with different data lines;
for each row of sub-pixels, the same data line is connected with two sub-pixels which are positioned at two sides of the data line and are not adjacent, and one sub-pixel is adjacent to the data line in the two sub-pixels which are connected with the same data line in the same row, and the other sub-pixel is separated from the data line by one sub-pixel;
and the two sub-pixels which are positioned in the same row and connected with the same data line are respectively connected with different grid lines positioned at two sides of the sub-pixels in the row.
The array substrate provided by the embodiment of the invention comprises a substrate, 2N rows of sub-pixels arranged on the substrate in a matrix manner, N +1 data lines and a plurality of grid lines, wherein the sub-pixels are arranged on the substrate in a matrix manner; wherein,
two sides of each row of sub-pixels are respectively provided with one grid line, and two grid lines are arranged between two adjacent rows of sub-pixels;
taking the sub-pixels in the 2n-1 th column and the sub-pixels in the 2n column as a unit group; two sides of each unit group are respectively provided with one data line, and one data line is arranged between two adjacent unit groups; n is any integer greater than 0 and less than or equal to N;
each sub-pixel is respectively connected with one of the data lines positioned at two sides of the sub-pixel, adjacent sub-pixels in the same column are connected with different data lines, and two adjacent sub-pixels in the same row are connected with different data lines;
for each row of sub-pixels, the same data line is connected with two sub-pixels which are positioned at two sides of the data line and are not adjacent, and one sub-pixel is adjacent to the data line in the two sub-pixels which are connected with the same data line in the same row, and the other sub-pixel is separated from the data line by one sub-pixel;
and the two sub-pixels which are positioned in the same row and connected with the same data line are respectively connected with different grid lines positioned at two sides of the sub-pixels in the row.
Correspondingly, the embodiment of the invention also provides a liquid crystal display panel which comprises the array substrate provided by the embodiment of the invention.
Correspondingly, the embodiment of the invention also provides a display device which comprises the liquid crystal display panel provided by the embodiment of the invention.
Correspondingly, an embodiment of the present invention further provides a driving method of the array substrate, including:
outputting scanning signals to the grid lines line by line when each frame of picture is displayed;
in one frame of picture, the polarities of the data signals output to the same data line are the same, and the polarities of the data signals output to the adjacent data lines are opposite; in two adjacent frames, the polarities of the data signals output to the same data line are opposite.
The invention has the following beneficial effects:
according to the array substrate, the driving method thereof, the liquid crystal display panel and the display device provided by the embodiment of the invention, as the adjacent sub-pixels in the same column are connected with different data lines, and the adjacent two sub-pixels in the same row are connected with different data lines; for each row of sub-pixels, the same data line is connected with two sub-pixels which are positioned at two sides of the data line and are not adjacent, and in the two sub-pixels which are connected with the same data line in the same row, one sub-pixel is adjacent to the data line, and the other sub-pixel is separated from the data line by one sub-pixel. Therefore, when the same data signal is applied to the data line, although the coupling of two sub-pixels connected with the same data line in the same row is different, because the sub-pixels with different brightness are not adjacent, the vertical stripes caused by the different brightness of the sub-pixels in adjacent columns can be improved.
Drawings
FIG. 1 is a schematic diagram of a dual-gate LCD panel of the related art;
fig. 2 is a timing diagram of two adjacent gate lines in the liquid crystal display panel shown in fig. 1;
fig. 3 is a schematic structural diagram of an array substrate according to an embodiment of the invention;
fig. 4 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;
fig. 5 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;
fig. 6 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 7 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 8 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 9 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 10 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 11 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 12 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 13 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 14 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 15 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 16 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 17 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 18 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 19 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 20 is a schematic structural diagram of an array substrate according to yet another embodiment of the present invention;
fig. 21 is a schematic structural diagram of a liquid crystal display panel according to an embodiment of the invention;
fig. 22 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The shapes and sizes of the various elements in the drawings are not to scale and are merely intended to illustrate the invention.
The array substrate provided by the embodiment of the invention comprises a substrate base plate, as shown in fig. 3 to 12, 2N rows of sub-pixels Pix, N +2 data lines and a plurality of grid lines which are arranged on the substrate base plate in a matrix manner; wherein, N is an arbitrary number which is greater than or equal to 1, and N is taken as an example to be illustrated in the attached drawings;
two sides of each row of sub-pixels Pix are respectively provided with a grid line Gm, and two grid lines Gm are arranged between two adjacent rows of sub-pixels Pix;
taking the sub-pixel Pix in the 2 n-th column and the sub-pixel Pix in the 2n +1 column as a unit group 2P; two sides of each cell group 2P are respectively provided with a data line Di, and a data line Di is arranged between two adjacent cell groups 2P; one side of the 1 st column of sub-pixels Pix close to the substrate base plate and the other side of the last column of sub-pixels Pix close to the substrate base plate are respectively provided with a data line Di;
each sub-pixel Pix is respectively connected with one of the data lines Di on the two sides of the sub-pixel Pix, the adjacent sub-pixels Pix in the same column are connected with different data lines Di, and the adjacent two sub-pixels Pix in the same row are connected with different data lines Di;
for each row of sub-pixels Pix, the same data line Di is connected with two sub-pixels Pix which are positioned at two sides of the data line Di and are not adjacent to each other, and in the two sub-pixels Pix which are connected with the same data line Di in the same row, one sub-pixel Pix is adjacent to the data line Di, and the other sub-pixel Pix is separated from the data line Di by one sub-pixel Pix;
the two subpixels Pix located in the same row and connected to the same data line Di are respectively connected to different gate lines Gm located at two sides of the subpixel Pix in the row.
In the array substrate provided by the embodiment of the invention, because adjacent sub-pixels in the same column are connected with different data lines, two adjacent sub-pixels in the same row are connected with different data lines; for each row of sub-pixels, the same data line is connected with two sub-pixels which are positioned at two sides of the data line and are not adjacent, and in the two sub-pixels which are connected with the same data line in the same row, one sub-pixel is adjacent to the data line, and the other sub-pixel is separated from the data line by one sub-pixel. Therefore, when the same data signal is applied to the data line, although the coupling of two sub-pixels connected with the same data line in the same row is different, because the sub-pixels with different brightness are not adjacent, the vertical stripes caused by the different brightness of the sub-pixels in adjacent columns can be improved.
In addition, the array substrate provided by the embodiment of the invention can also realize a point inversion driving mode, thereby improving the quality of the display panel.
Optionally, in the array substrate according to the embodiment of the present invention, as shown in fig. 3 to fig. 7, the 1 st data line D1 is connected to the subpixels Pix in the odd-numbered rows in the 1 st column; the 2 nd data line D2 is respectively connected to the even row subpixel Pix in the 1 st column, the odd row subpixel Pix in the 2 nd column, and the even row subpixel Pix in the 3 rd column; the mth data line Dm is respectively connected with the even-row sub-pixels Pix of the 2m-4 th column, the odd-row sub-pixels Pix of the 2m-3 th column, the even-row sub-pixels Pix of the 2m-2 th column and the odd-row sub-pixels Pix of the 2m-1 th column; the kth data line Dk is respectively connected with the odd row sub-pixels Pix of the 2k-4 th column, the even row sub-pixels Pix of the 2k-3 rd column, the odd row sub-pixels Pix of the 2k-2 th column and the even row sub-pixels Pix of the 2k-1 th column; m is any odd number greater than 2 and less than or equal to N, and k is any even number greater than 1 and less than or equal to N;
if N is an odd number, the (N + 1) th data line DN +1 is respectively connected with the odd row sub-pixels Pix of the 2N-2 nd column, the even row sub-pixels Pix of the 2N-1 nd column and the odd row sub-pixels Pix of the 2N nd column; the (N + 2) th data line DN +2 is connected with the even-numbered subpixels Pix in the 2N-th column; if N is an even number, the (N + 1) th data line DN +1 is respectively connected with the even-row sub-pixels Pix of the 2N-2 nd column, the odd-row sub-pixels Pix of the 2N-1 nd column and the even-row sub-pixels Pix of the 2N nd column; the (N + 2) th data line DN +2 is connected to the odd-numbered subpixels Pix in the 2N-th column.
Alternatively, in another array substrate provided in the embodiment of the invention, as shown in fig. 8 to 12, the 1 st data line D1 is connected to the subpixels Pix in the even rows of the 1 st column; the 2 nd data line D2 is respectively connected to the odd row subpixel Pix in the 1 st column, the even row subpixel Pix in the 2 nd column, and the odd row subpixel Pix in the 3 rd column; the mth data line Dm is respectively connected with the odd row sub-pixels Pix of the 2m-4 th column, the even row sub-pixels Pix of the 2m-3 th column, the odd row sub-pixels Pix of the 2m-2 th column and the even row sub-pixels Pix of the 2m-1 th column; the kth data line Dk is respectively connected with the even-row sub-pixels Pix of the 2k-4 th column, the odd-row sub-pixels Pix of the 2k-3 rd column, the even-row sub-pixels Pix of the 2k-2 th column and the odd-row sub-pixels Pix of the 2k-1 th column; m is any odd number greater than 2 and less than or equal to N, and k is any even number greater than 2 and less than or equal to N;
if N is an odd number, the (N + 1) th data line DN +1 is respectively connected with the even-row sub-pixels Pix of the 2N-2 nd column, the odd-row sub-pixels Pix of the 2N-1 nd column and the even-row sub-pixels Pix of the 2N nd column; the (N + 2) th data line DN +2 is connected with the odd-numbered sub-pixels Pix in the 2N-th column; if N is an even number, the (N + 1) th data line DN +1 is respectively connected with the odd row sub-pixels Pix of the 2N-2 nd column, the even row sub-pixels Pix of the 2N-1 nd column and the odd row sub-pixels Pix of the 2N nd column; the (N + 2) th data line DN +2 is connected to the even-numbered subpixels Pix in the 2N-th column.
In a specific implementation, in the array substrate provided in the embodiment of the present invention, for two sub-pixels connected to the same data line in each row, as long as the two sub-pixels are respectively connected to different gate lines located at two sides of the sub-pixels in the row, which is not limited herein. The present invention will be described in detail with reference to specific examples. It should be noted that the present embodiment is intended to better explain the present invention, but not to limit the present invention.
Optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 4 and fig. 9, the 2x column of sub-pixels Pix and the 2x-1 column of sub-pixels Pix are connected to the odd-numbered row gate line Gm, and the 2y column of sub-pixels Pix and the 2y-1 column of sub-pixels Pix are connected to the even-numbered row gate line Gm;
wherein x is any even number greater than or equal to 2 and less than or equal to N; y is any odd number greater than or equal to 1 and less than or equal to N.
Or, optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 3 and fig. 8, the 2x column of sub-pixels Pix and the 2x-1 column of sub-pixels Pix are connected to the even-numbered row gate line Gm, and the 2y column of sub-pixels Pix and the 2y-1 column of sub-pixels Pix are connected to the odd-numbered row gate line Gm;
wherein x is any even number greater than or equal to 2 and less than or equal to N; y is any odd number greater than or equal to 1 and less than or equal to N.
Optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 7 and 12, for the same column of subpixels Pix, in every two adjacent subpixels Pix, one subpixel Pix is connected to the odd-numbered row gate line Gm, and the other subpixel Pix is connected to the even-numbered row gate line Gm.
Or, in the array substrate provided in the embodiment of the present invention, for the same column of subpixels Pix, every adjacent a subpixels Pix are taken as a group, in two adjacent groups, a subpixels Pix in one group are all connected to the odd-numbered row gate line Gm, and a subpixels Pix in the other group are all connected to the even-numbered row gate line Gm. Wherein a is an integer greater than or equal to 2. That is, in each row of sub-pixels, half of the sub-pixels Pix are connected to the odd-numbered gate lines Gm, and half of the sub-pixels Pix are connected to the even-numbered gate lines Gm. And the group connected with the odd-numbered grid lines Gm and the group connected with the even-numbered grid lines Gm are alternately arranged, so that when the array substrate is prepared and is subjected to alignment dislocation along the direction of the data lines, the distance between half of the sub-pixels Pix and the grid lines Gm in each row of sub-pixels Pix is reduced, the distance between half of the sub-pixels Pix and the grid lines Gm is increased, namely in each row of sub-pixels Pix, half of the sub-pixels Pix become dark, half of the sub-pixels Pix become bright, and the dark sub-pixels Pix and the bright sub-pixels Pix are alternately arranged, so that bright and dark vertical stripes caused by alignment dislocation along the direction of the data lines in the preparation of the array substrate can be improved.
Optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 5 and 6, and fig. 10 and 11, for the same column of subpixels Pix, every two adjacent subpixels Pix are taken as a group, in two adjacent groups, two subpixels Pix in one group are both connected to the odd-numbered row gate line Gm, and two subpixels Pix in the other group are both connected to the even-numbered row gate line Gm.
Based on the same inventive concept, the embodiment of the present invention further provides another array substrate, which includes a substrate, as shown in fig. 13 to 20, 2N rows of sub-pixels Pix, N +1 data lines Di, and a plurality of gate lines Gm, which are arranged in a matrix on the substrate; wherein,
two sides of each row of sub-pixels Pix are respectively provided with a grid line Gm, and two grid lines Gm are arranged between two adjacent rows of sub-pixels Pix;
taking the sub-pixel Pix in the 2n-1 th column and the sub-pixel Pix in the 2n column as a unit group; two sides of each unit group are respectively provided with a data line Di, and a data line Di is arranged between two adjacent unit groups; n is any integer greater than 0 and less than or equal to N;
each sub-pixel Pix is respectively connected with one of the data lines Di on the two sides of the sub-pixel Pix, the adjacent sub-pixels Pix in the same column are connected with different data lines Di, and the adjacent two sub-pixels Pix in the same row are connected with different data lines Di;
for each row of sub-pixels, the same data line Di is connected with two sub-pixels Pix which are positioned at two sides of the data line Di and are not adjacent to each other, and in the two sub-pixels Pix which are connected with the same data line Di in the same row, one sub-pixel Pix is adjacent to the data line Di, and the other sub-pixel Pix is separated from the data line Di by one sub-pixel Pix;
the two subpixels Pix located in the same row and connected to the same data line Di are respectively connected to different gate lines Gm located at two sides of the subpixel Pix in the row.
In the array substrate provided by the embodiment of the invention, because adjacent sub-pixels in the same column are connected with different data lines, two adjacent sub-pixels in the same row are connected with different data lines; for each row of sub-pixels, the same data line is connected with two sub-pixels which are positioned at two sides of the data line and are not adjacent, and in the two sub-pixels which are connected with the same data line in the same row, one sub-pixel is adjacent to the data line, and the other sub-pixel is separated from the data line by one sub-pixel. Therefore, when the same data signal is applied to the data line, although the coupling of two sub-pixels connected with the same data line in the same row is different, because the sub-pixels with different brightness are not adjacent, the vertical stripes caused by the different brightness of the sub-pixels in adjacent columns can be improved.
In addition, the array substrate provided by the embodiment of the invention can also realize a point inversion driving mode, thereby improving the quality of the display panel.
Alternatively, in the array substrate provided in the embodiment of the invention, as shown in fig. 13 to fig. 16, the 1 st data line D1 is connected to the subpixels Pix in the odd-numbered rows in the 1 st column; the kth data line Dk is respectively connected with the even-row sub-pixels Pix of the 2k-3 column, the odd-row sub-pixels Pix of the 2k-2 column, the even-row sub-pixels Pix of the 2k-1 column and the odd-row sub-pixels Pix of the 2k column; the mth data line Dm is respectively connected with the odd-row sub-pixel Pix of the 2m-3 column, the even-row sub-pixel Pix of the 2m-2 column, the odd-row sub-pixel Pix of the 2m-1 column and the even-row sub-pixel Pix of the 2m column; k is any even number greater than 1 and less than or equal to N, and m is any odd number greater than 2 and less than or equal to N;
if N is an odd number, the (N + 1) th data line DN +1 is respectively connected with the odd row sub-pixels Pix of the 2N-1 th column and the even row sub-pixels Pix of the 2N-1 th column; if N is an even number, the (N + 1) th data line DN +1 is respectively connected with the odd row sub-pixels Pix of the 2N-1 th column and the even row sub-pixels Pix of the 2N-1 th column.
Alternatively, in another array substrate provided in the embodiment of the invention, as shown in fig. 17 to fig. 20, the 1 st data line D1 is connected to the subpixels Pix in the even rows in the 1 st column; the kth data line Dk is respectively connected with the odd row sub-pixel Pix of the 2k-3 column, the even row sub-pixel Pix of the 2k-2 column, the odd row sub-pixel Pix of the 2k-1 column and the even row sub-pixel Pix of the 2k column; the mth data line Dm is respectively connected with the even-row sub-pixel Pix of the 2m-3 column, the odd-row sub-pixel Pix of the 2m-2 column, the even-row sub-pixel Pix of the 2m-1 column and the odd-row sub-pixel Pix of the 2m column; k is any even number greater than 1 and less than or equal to N, and m is any even number greater than 2 and less than or equal to N;
if N is an odd number, the (N + 1) th data line DN +1 is respectively connected with the even-row sub-pixels Pix of the (2N-1) th column and the odd-row sub-pixels Pix of the (2N-1) th column; if N is an even number, the (N + 1) th data line D N +1 is respectively connected to the even row subpixel Pix in the 2N-1 th column and the odd row subpixel Pix in the 2N column.
In a specific implementation, in the array substrate provided in the embodiment of the present invention, for two sub-pixels connected to the same data line in each row, as long as the two sub-pixels are respectively connected to different gate lines located at two sides of the sub-pixels in the row, which is not limited herein. The present invention will be described in detail with reference to specific examples. It should be noted that the present embodiment is intended to better explain the present invention, but not to limit the present invention. Alternatively, in the array substrate provided in the embodiment of the present invention, as shown in fig. 13 and 17,
the 2 i-th column of sub-pixels Pix and the 2i-3 th column of sub-pixels Pix are connected with the odd-numbered row grid lines Gm, and the 2i-2 nd column of sub-pixels Pix and the 2i-1 st column of sub-pixels Pix are connected with the even-numbered row grid lines Gm; wherein i is an arbitrary number greater than or equal to 2 and less than or equal to N.
Or, alternatively, in the array substrate provided by the embodiment of the invention, as shown in fig. 14 and 18,
the 2 i-th column of sub-pixels Pix and the 2i-3 th column of sub-pixels Pix are connected with the even-numbered row grid lines Gm, and the 2i-2 nd column of sub-pixels Pix and the 2i-1 st column of sub-pixels Pix are connected with the odd-numbered row grid lines Gm; wherein i is an arbitrary number greater than or equal to 2 and less than or equal to N.
In specific implementation, in the array substrate provided in the embodiment of the invention, for the same column of subpixels Pix, every adjacent a subpixels Pix are taken as one group, in two adjacent groups, a subpixels Pix in one group are all connected to the odd-numbered row gate line Gm, and a subpixels Pix in the other group are all connected to the even-numbered row gate line Gm. Wherein a is an integer greater than or equal to 2. That is, in each row of sub-pixels, half of the sub-pixels Pix are connected to the odd-numbered gate lines Gm, and half of the sub-pixels Pix are connected to the even-numbered gate lines Gm. And the group connected with the odd-numbered grid lines Gm and the group connected with the even-numbered grid lines Gm are alternately arranged, so that when the array substrate is prepared and is subjected to alignment dislocation along the direction of the data lines, the distance between half of the sub-pixels Pix and the grid lines Gm in each row of sub-pixels Pix is reduced, the distance between half of the sub-pixels Pix and the grid lines Gm is increased, namely in each row of sub-pixels Pix, half of the sub-pixels Pix become dark, half of the sub-pixels Pix become bright, and the dark sub-pixels Pix and the bright sub-pixels Pix are alternately arranged, so that bright and dark vertical stripes caused by alignment dislocation along the direction of the data lines in the preparation of the array substrate can be improved.
Optionally, in the array substrate according to the embodiment of the present invention, as shown in fig. 15, 16, 19, and 20, for the same column of subpixels Pix, every two adjacent subpixels Pix are taken as a group, in two adjacent groups, two subpixels Pix in one group are both connected to the odd-numbered row gate line Gm, and two subpixels Pix in the other group are both connected to the even-numbered row gate line Gm.
Based on the same inventive concept, an embodiment of the present invention further provides a driving method of the array substrate, including:
outputting scanning signals to the grid line Gm line by line when each frame of picture is displayed;
in one frame of picture, referring to fig. 3 to 20, the polarities of the data signals output to the same data line Di are the same, and the polarities of the data signals output to the adjacent data lines Di and Di +1 are opposite;
in two adjacent frames, the polarities of the data signals output to the same data line Di are opposite.
By adopting the driving method, the embodiment of the invention can realize a driving mode of dot inversion, thereby improving the quality of the display panel.
Based on the same inventive concept, the embodiment of the invention also provides a liquid crystal display panel, which comprises any one of the array substrates provided by the embodiment of the invention. Since the principle of solving the problems of the liquid crystal display is similar to that of the array substrate, the implementation of the liquid crystal display panel can be referred to the implementation of the array substrate, and repeated details are not repeated.
Specifically, as shown in fig. 21, in the liquid crystal display panel, the array substrate has a display area AA and a non-display area BB; the grid line Gm, the data line Di and the sub-pixel Pix are positioned in the display area AA; the non-display region BB includes the gate driving circuit 100 and the source driving circuit 200.
In a specific implementation, in the implementation of the present invention, 2 gate driving circuits 100 may be included in the liquid crystal display panel. Optionally, as shown in fig. 21, one output terminal of each gate driving circuit is connected to one gate line of the array substrate, and the output terminals of the same stage of the 2 gate driving circuits are connected to the same gate line.
In the implementation of the present invention, the liquid crystal display panel may also include 1 gate driving circuit.
Based on the same inventive concept, the embodiment of the invention further provides a display device, which comprises any one of the liquid crystal display panels provided by the embodiment of the invention. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like shown in fig. 22. The implementation of the display device can be seen in the above embodiments of the liquid crystal display panel, and repeated descriptions are omitted.
According to the array substrate, the driving method thereof, the liquid crystal display panel and the display device provided by the embodiment of the invention, as the adjacent sub-pixels in the same column are connected with different data lines, and the adjacent two sub-pixels in the same row are connected with different data lines; for each row of sub-pixels, the same data line is connected with two sub-pixels which are positioned at two sides of the data line and are not adjacent, and in the two sub-pixels which are connected with the same data line in the same row, one sub-pixel is adjacent to the data line, and the other sub-pixel is separated from the data line by one sub-pixel. Therefore, when the same data signal is applied to the data line, although the coupling of two sub-pixels connected with the same data line in the same row is different, because the sub-pixels with different brightness are not adjacent, the vertical stripes caused by the different brightness of the sub-pixels in adjacent columns can be improved.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (13)
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