CN104252854A - Array substrate, driving method thereof, display panel and display device - Google Patents

Abstract

An array substrate, a driving method thereof, a display panel and a display device. The array substrate includes multiple rows of gate lines, multiple columns of data lines and multiple pixel units; the pixel unit is arranged between two adjacent columns of data lines, the 2n-1th row of gate lines and the 2nth row of gate lines; n is a positive integer, 2n is less than or equal to the total number of rows of gate lines included in the array substrate; each pixel unit includes a first sub-pixel and a second sub-pixel arranged in a row; the first sub-pixel, through the first transistor and the first sub-pixel The data line adjacent to the side is connected, the gate of the first transistor is connected to the gate line of the 2n-1th row adjacent to the first sub-pixel; the second sub-pixel is connected to the left side of the second sub-pixel through the second transistor Adjacent data lines are connected, and the gate of the second transistor is connected to the gate line of the 2nth row adjacent to the second sub-pixel; in adjacent pixel units, the first sub-pixel and the second sub-pixel are connected along the gate line The directions are arranged in reverse order. The present invention reduces power consumption when the point driving mode needs to be adopted.

Description

Array substrate, driving method thereof, display panel and display device

technical field

The present invention relates to the field of display technology, in particular to an array substrate and a driving method thereof, a display panel and a display device.

Background technique

The existing array substrate includes multiple rows of gate lines, multiple columns of data lines and multiple pixel units; the pixel units are arranged between two adjacent columns of data lines, the 2n-1th row of gate lines and the 2nth row of gate lines; n is a positive integer, and 2n is less than or equal to the total number of rows of gate lines included in the array substrate; each pixel unit includes a first sub-pixel and a second sub-pixel arranged in a row; the first sub-pixel passes through the first The transistor is connected to the data line most adjacent to the first sub-pixel, and the gate of the first transistor is connected to the next row of gate lines adjacent to the first sub-pixel; the second sub-pixel is connected through the second transistor and The data line most adjacent to the second sub-pixel is connected, and the gate of the second transistor is connected to the upper row of gate lines adjacent to the second sub-pixel; in all pixel units, the first sub-pixel It is the same as the arrangement order of the second sub-pixels along the grid line direction and vice versa.

As shown in FIG. 1 , the existing array substrate includes gate lines GN in row N, gate lines GN+1 in row N+1, gate lines GN+2 in row N+2, and gate lines GN+ in row N+3. 3. M-2 column data line DM-2, M-1 column data line DM-1, M column data line DM, M+1 column data line DM+1, M+2 column data line DM +2. The four pixel units arranged between GN, GN+1 and adjacent column data lines, and the four pixel units arranged between GN+2, GN+3 and adjacent data lines, where N is A positive integer, M is a positive integer greater than 2, the first sub-pixel included in each pixel unit is set on the left side, and the second sub-pixel included in each pixel unit is set on the right side, and the red sub-pixel is marked as in Figure 1 R, the green sub-pixel is marked as G, and the blue sub-pixel is marked as B, then if the display panel using the array substrate as shown in Figure 1 needs to adopt the dot driving mode, the data line needs to adopt the row inversion driving mode, that is, in When displaying the same frame, the polarity of the charge on each data line will be reversed when each row of gate lines is turned on, resulting in high power consumption.

Contents of the invention

The main purpose of the present invention is to provide an array substrate and its driving method, a display panel and a display device, so as to solve the large power consumption caused by the need to use the row inversion driving method for the data line when the dot driving method is adopted in the prior art. The problem.

In order to achieve the above object, the present invention provides an array substrate, including multiple rows of gate lines, multiple columns of data lines, and multiple pixel units; and the 2nth row of grid lines; n is a positive integer, and 2n is less than or equal to the total number of rows of grid lines included in the array substrate;

Each pixel unit includes a first sub-pixel and a second sub-pixel arranged in parallel;

The first sub-pixel is connected to the data line adjacent to the right side of the first sub-pixel through a first transistor, and the gate of the first transistor is connected to the gate of the 2n-1th row adjacent to the first sub-pixel. line connection;

The second sub-pixel is connected to the data line adjacent to the left side of the second sub-pixel through a second transistor, and the gate of the second transistor is connected to the gate line of the 2nth row adjacent to the second sub-pixel ;

In adjacent pixel units, the arrangement order of the first sub-pixel and the second sub-pixel along the direction of the gate line is opposite.

The present invention also provides a driving method for an array substrate, which is applied to the above-mentioned array substrate, and the driving method includes:

When displaying each frame, multiple rows of grid lines are turned on in sequence;

When the gate line of the 2n-1th row is turned on, the first transistor whose gate is connected to the gate line of the 2n-1 row is turned on, and the data line connected to the first transistor sends the first polarity to the first sub-pixel connected to it. charge;

When the gate line in the 2nth row is turned on, the second transistor whose gate is connected to the gate line in the 2nth row is turned on, and the data line connected to the second transistor sends charges of the second polarity to the second sub-pixel connected thereto.

Specifically, when the dot driving method needs to be adopted, the first polarity and the second polarity are opposite, and the polarities of the charges output from the same data line in two frames before and after are opposite.

The present invention also provides a display panel, including the above-mentioned array substrate.

The present invention also provides a display device, including the above-mentioned display panel.

Compared with the prior art, when the array substrate and its driving method, display panel and display device according to the present invention need to adopt the dot driving mode, when displaying the same frame picture, the charge polarity on each data line is different. It remains unchanged, that is, the data line needs to be driven by column inversion, and the power consumption is greatly reduced.

Description of drawings

FIG. 1 is a schematic diagram of an existing array substrate;

2 is a schematic diagram of an array substrate according to a specific embodiment of the present invention;

Fig. 3A is a schematic diagram of the positive and negative polarities of each sub-pixel when the array substrate described in this specific embodiment of the present invention displays a frame;

3B is a schematic diagram of the positive and negative polarities of each sub-pixel when the array substrate according to the specific embodiment of the present invention is displaying the next frame of picture.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

The array substrate described in the embodiment of the present invention includes multiple rows of gate lines, multiple columns of data lines, and multiple pixel units; the pixel units are arranged in two adjacent columns of data lines, the 2n-1th row of gate lines, and the 2nth row Between grid lines; n is a positive integer, and 2n is less than or equal to the total number of rows of grid lines included in the array substrate;

Each pixel unit includes a first sub-pixel and a second sub-pixel arranged in parallel;

The first sub-pixel is connected to the data line adjacent to the right side of the first sub-pixel through a first transistor, and the gate of the first transistor is connected to the gate of the 2n-1th row adjacent to the first sub-pixel. line connection;

The second sub-pixel is connected to the data line adjacent to the left side of the second sub-pixel through a second transistor, and the gate of the second transistor is connected to the gate line of the 2nth row adjacent to the second sub-pixel ;

In adjacent pixel units, the arrangement order of the first sub-pixel and the second sub-pixel along the direction of the gate line is opposite.

In the array substrate described in the embodiment of the present invention, adjacent pixel units refer to adjacent pixel units along a gate line direction and adjacent pixel units along a data line direction.

The driving method of the array substrate described in the embodiment of the present invention is applied to the above-mentioned array substrate, and the driving method includes:

When displaying each frame, multiple rows of grid lines are turned on in sequence;

When the gate line of the 2n-1th row is turned on, the first transistor whose gate is connected to the gate line of the 2n-1 row is turned on, and the data line connected to the first transistor sends the first polarity to the first sub-pixel connected to it. charge;

When the gate line in the 2nth row is turned on, the second transistor whose gate is connected to the gate line in the 2nth row is turned on, and the data line connected to the second transistor sends charges of the second polarity to the second sub-pixel connected thereto.

Specifically, when the dot driving method needs to be adopted, the first polarity and the second polarity are opposite, and the polarities of the charges output from the same data line in two frames before and after are opposite.

When the display panel including the array substrate described in this embodiment of the present invention needs to adopt the dot driving method, when displaying the same frame, the polarity of the charge on each data line remains unchanged, that is, the data line needs to use column Compared with the display panel using the existing array substrate, the power consumption of the flipping driving mode is greatly reduced.

The structure of the array substrate described in this embodiment of the present invention will be described below according to a specific embodiment.

As shown in FIG. 2 , the array substrate according to a specific embodiment of the present invention includes gate lines GN in the Nth row, gate lines GN+1 in the N+1th row, GN+2 in the N+2th row, and GN+2 in the N+th row. 3 rows of gate lines GN+3, M-2 column data lines DM-2, M-1 column data lines DM-1, M column data lines DM, M+1 column data lines DM+1, M +2 column data lines DM+2, four pixel units arranged between GN, GN+1 and adjacent data lines, and four pixel units arranged between GN+2, GN+3 and adjacent data lines A pixel unit, wherein N is a positive integer, and M is a positive integer greater than 2;

In Figure 2, the red sub-pixel is marked as R, the green sub-pixel is marked as G, and the blue sub-pixel is marked as B;

In the pixel unit in the first row and the first column, the pixel unit in the first row and the third column, the pixel unit in the second row and the second column, and the pixel unit in the second row and the fourth column in FIG. 2 , the first sub-pixel is located On the left, the second sub-pixel is on the right;

In the pixel unit in the first row and the second column in FIG. 2 , the pixel unit in the first row and the fourth column, the pixel unit in the second row and the first column, and the pixel unit in the second row and the third column, the first sub-pixel is located on the right, with the second sub-pixel on the left;

When displaying a frame, the charge polarity on DM-1 and the charge polarity on DM+1 are positive, the charge polarity on DM-2, the charge polarity on DM and the charge polarity on DM+2 sex is negative;

As shown in Figure 3A, when GN is turned on, DM-1 positively charges the first sub-pixel in the first row, DM negatively charges the fourth sub-pixel in the first row, and DM+1 charges the fifth sub-pixel in the first row. The sub-pixel is positively charged, and DM+2 is negatively charged to the eighth sub-pixel in the first row;

When GN+1 is turned on, DM-2 negatively charges the second sub-pixel in the first row, DM-1 positively charges the third sub-pixel in the first row, and DM negatively charges the sixth sub-pixel in the first row , DM+1 positively charges the seventh sub-pixel in the first row;

When GN+2 is turned on, DM-1 positively charges the second sub-pixel in the second row, DM negatively charges the third sub-pixel in the second row, and DM+1 positively charges the sixth sub-pixel in the second row Electricity, DM+2 negatively charges the seventh sub-pixel in the second row;

When GN+3 is turned on, DM-2 negatively charges the first sub-pixel in the second row, DM-1 positively charges the fourth sub-pixel in the second row, and DM negatively charges the fifth sub-pixel in the second row , DM+1 positively charges the eighth sub-pixel in the first row;

When displaying the next frame, the charge polarity on DM-1 and the charge polarity on DM+1 are negative, the charge polarity on DM-2, the charge polarity on DM and the charge on DM+2 polarity is positive;

As shown in Figure 3B, when GN is turned on, DM-1 negatively charges the first sub-pixel in the first row, DM positively charges the fourth sub-pixel in the first row, and DM+1 charges the fifth sub-pixel in the first row. The sub-pixel is negatively charged, and DM+2 positively charges the eighth sub-pixel in the first row;

When GN+1 is turned on, DM-2 positively charges the second sub-pixel in the first row, DM-1 negatively charges the third sub-pixel in the first row, and DM positively charges the sixth sub-pixel in the first row Electricity, DM+1 negatively charges the seventh sub-pixel in the first row;

When GN+2 is turned on, DM-1 negatively charges the second sub-pixel in the second row, DM positively charges the third sub-pixel in the second row, and DM+1 negatively charges the sixth sub-pixel in the second row , DM+2 positively charges the seventh sub-pixel in the second row;

When GN+3 is turned on, DM-2 positively charges the first sub-pixel in the second row, DM-1 negatively charges the fourth sub-pixel in the second row, and DM positively charges the fifth sub-pixel in the second row Electricity, DM+1 negatively charges the eighth sub-pixel in the first row;

When the next frame is displayed, the charge polarity on DM-1 and the charge polarity on DM+1 are reversed to be positive again, the charge polarity on DM-2, the charge polarity on DM and the charge polarity on DM+2 The polarity of the charge is reversed to negative, and so on.

From the driving process of the array substrate described in this specific embodiment of the present invention, it can be seen that the point driving can be realized only by inverting the polarity of the charge output by the same data line in the two frames before and after, that is, adopting the column inversion driving method.

The display panel described in the embodiment of the present invention includes the above-mentioned array substrate.

The display device described in the embodiment of the present invention includes the above-mentioned display panel.

The display device may include a liquid crystal display device, such as a liquid crystal panel, a liquid crystal television, a mobile phone, and a liquid crystal display. In addition to the liquid crystal display device, the display device may also include an organic light emitting display or other types of display devices, such as an electronic reader.

The above is only the embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications should also be regarded as Be the protection scope of the present invention.

Claims (5)

1. An array substrate, characterized in that it includes multiple rows of gate lines, multiple columns of data lines, and multiple pixel units; the pixel units are arranged on two adjacent columns of data lines, the 2n-1th row of gate lines, and the 2nth Between rows of grid lines; n is a positive integer, and 2n is less than or equal to the total number of rows of grid lines included in the array substrate; Each pixel unit includes a first sub-pixel and a second sub-pixel arranged in parallel; The first sub-pixel is connected to the data line adjacent to the right side of the first sub-pixel through a first transistor, and the gate of the first transistor is connected to the gate of the 2n-1th row adjacent to the first sub-pixel. line connection; The second sub-pixel is connected to the data line adjacent to the left side of the second sub-pixel through a second transistor, and the gate of the second transistor is connected to the gate line of the 2nth row adjacent to the second sub-pixel ; In adjacent pixel units, the arrangement order of the first sub-pixel and the second sub-pixel along the direction of the gate line is opposite. 2. A driving method for an array substrate, applied to the array substrate according to claim 1, wherein the driving method comprises: When displaying each frame, multiple rows of grid lines are turned on in sequence; When the gate line of the 2n-1th row is turned on, the first transistor whose gate is connected to the gate line of the 2n-1 row is turned on, and the data line connected to the first transistor sends the first polarity to the first sub-pixel connected to it. charge; When the gate line in the 2nth row is turned on, the second transistor whose gate is connected to the gate line in the 2nth row is turned on, and the data line connected to the second transistor sends charges of the second polarity to the second sub-pixel connected thereto. 3. The driving method of the array substrate according to claim 2, wherein when the dot driving method needs to be adopted, the first polarity and the second polarity are opposite, and the same data line is output in two frames before and after. The polarity of the charge is opposite. 4. A display panel, comprising the array substrate according to claim 1. 5. A display device, comprising the display panel according to claim 4.