Disclosure of Invention
The invention aims to provide a driving method and a driving circuit of a liquid crystal display and the liquid crystal display, which are used for solving the defect that in the prior art, in the process of writing data signals into the liquid crystal display, the voltage of a load capacitor needs to be frequently switched between positive and negative voltages, so that the power consumption of the written data signals is overlarge.
To solve the above technical problem, an embodiment of the present invention provides a method for driving a liquid crystal display, including: in a line inversion or dot inversion driving method, the time of any one frame is divided into two operation periods; and in one operation time period, sequentially opening odd-numbered rows of scanning lines to write odd-numbered rows of data signals into odd-numbered rows of pixels, and in the other operation time period, sequentially opening even-numbered rows of scanning lines to write even-numbered rows of data signals into even-numbered rows of pixels.
In the method, the sequentially turning on the odd-numbered scanning lines includes: scanning each odd-numbered line of scanning lines in sequence from the top end to the bottom end of the liquid crystal display; opening even row scanning line in proper order includes: and scanning each even-numbered row of scanning lines from the top end to the bottom end of the liquid crystal display in sequence.
In the method, when more than one odd-numbered line scanner is connected with each odd-numbered line scanning line, each odd-numbered line scanner is driven in sequence, and each odd-numbered line scanner sequentially opens the odd-numbered line scanning line connected with the odd-numbered line scanner so as to write the odd-numbered line data signals into the corresponding odd-numbered line pixels; when more than one even-numbered line scanner is connected with each even-numbered line scanning line, each even-numbered line scanner is driven in sequence, and each even-numbered line scanner sequentially opens the even-numbered line scanning lines connected with the even-numbered line scanner so as to write the even-numbered line data signals into the corresponding even-numbered line pixels.
In the method, in one operation time period, a counter is adopted to count the scanning operation executed by each odd-numbered line scanner; and counting the scanning operation performed by each even-numbered line scanner by using the counter in another operation time period.
In the method, in one operation time period, each time the counter counts, the scanning operation is executed corresponding to one odd-numbered line scanner, and all the odd-numbered line scanners execute the scanning operation in the operation time period; in another operation time period, the counter performs a scanning operation corresponding to one even-numbered line scanner every time the counter counts, and all the even-numbered line scanners perform the scanning operation in the operation time period.
A driving circuit for driving a liquid crystal display in a row inversion or a dot inversion manner, the driving circuit comprising: a scan logic unit for dividing a time of one frame into two operation periods; the odd-row scanner is used for sequentially opening odd-row scanning lines and writing odd-row data signals into odd-row pixels in one operation time period; and the even-row scanner is used for sequentially opening the even-row scanning lines and writing the even-row data signals into the even-row pixels in the other operation time period.
In the driving circuit, more than one odd line scanner and/or even line scanner, and the driving circuit further includes: a counter for counting the scanning operations performed by each of the odd-numbered line scanners in one of the operation periods, and for counting the scanning operations performed by each of the even-numbered line scanners in another one of the operation periods.
In the driving circuit, the counter further includes: the frequency doubling module is used for setting the counting of the counter in one operation time period, so that each counting corresponds to one odd-numbered line scanner to execute scanning operation, and all the odd-numbered line scanners execute scanning operation in the operation time period; and in another of the operation periods, the count of the counter is set so that each time the count corresponds to one of the even-numbered line scanners performing a scanning operation, and all of the even-numbered line scanners performing the scanning operation in the operation period.
A liquid crystal display comprising a driving circuit for driving the liquid crystal display in a row inversion or a dot inversion, the driving circuit comprising: a scan logic unit for dividing a time of one frame into two operation periods; the odd-row scanner is used for sequentially opening odd-row scanning lines and writing odd-row data signals into odd-row pixels in one operation time period; and the even-row scanner is used for sequentially opening the even-row scanning lines and writing the even-row data signals into the even-row pixels in the other operation time period.
The technical scheme of the invention has the following beneficial effects: since each driving is performed within about one-half of the time of one frame, the load capacitance of the pixel does not need to frequently perform a transition from a positive voltage to a negative voltage but only a transition between positive voltages or negative voltages (at most, from a positive voltage or a negative voltage to a reference level) within one operation period, and thus it is known from a power consumption formula that the power consumption of the data logic of the liquid crystal display is reduced.
Detailed Description
In order to make the technical problems, technical solutions and advantages of the present invention more apparent, the following detailed description is given with reference to the accompanying drawings and specific embodiments.
As shown in fig. 1, the pixel structure includes a load capacitor 3, a storage capacitor 4, a data line 5, a gate line 6, a common electrode 7, a pixel electrode 8, a thin film transistor 9, and a source electrode 10; it should be understood that the source 10 is merely illustrative and that in practice the source/drain electrodes may be interchanged for the thin film transistor 9.
As shown in fig. 2, the scan lines of the panel are divided into odd-numbered scan lines 1 and even-numbered scan lines 2, each of which is connected to an Integrated Circuit (IC) to separately drive the odd-numbered and even-numbered rows of the panel, and include: the odd-numbered scanning lines 1 are connected to the gate drive IC1, and the even-numbered scanning lines 2 are connected to the gate drive IC 2. The gate driver IC1 is an odd row scanner, and the gate driver IC2 is an even row scanner.
An embodiment of the present invention provides a method for displaying a data signal on a liquid crystal display, as shown in fig. 3, the method includes:
step 301, in a driving mode of row inversion or dot inversion, dividing the time of any frame into two operation time periods;
step 302, in one of the operation time periods, sequentially turning on the odd-numbered scanning lines 1, writing the odd-numbered data signals into the odd-numbered pixels,
and in another of the operation periods, the even-numbered row of scanning lines 2 are sequentially turned on to write the even-numbered row of data signals into the even-numbered row of pixels.
By applying the technical scheme provided, the odd-numbered scanning lines 1 and the even-numbered scanning lines 2 of the liquid crystal display are respectively driven, and because each driving is completed within a half length of one frame time, as shown in fig. 7, the load capacitance 3 of the pixel does not need to complete the conversion from the positive voltage to the negative voltage in one operation time period, but only completes the conversion between the positive voltages or between the negative voltages (at most, from the positive voltage or the negative voltage to the reference level), so that the power consumption of the data logic of the liquid crystal display is reduced according to the power consumption formula. The time of one frame is divided into two equal parts to form two operation time periods of one frame, and after the two equal parts, the odd-numbered row scanning lines 1 and the even-numbered row scanning lines 2 are respectively driven in each operation time period. The odd line data signal or the even line data signal is a pulse scanning signal; wherein the pulsed scanning signal is higher than the reference level or lower than the reference level.
Of course, it will be understood by those skilled in the art that when the total number of scanning lines is odd rather than even, the time of one frame may be divided in proportion to the number of odd and even lines, without requiring exact halving.
In a preferred embodiment, as shown in fig. 4, step 302 specifically includes:
the sequentially opening the odd-numbered scanning lines 1 includes: scanning each odd-numbered line of scanning lines 1 from the top end to the bottom end of the liquid crystal display in sequence;
the sequentially opening the even-numbered rows of scanning lines 2 includes: and scanning each even-numbered row of scanning lines 2 from the top end to the bottom end of the liquid crystal display in sequence.
In other words, the data signal is divided into two parts within one frame time, one part corresponds to the odd-numbered rows of pixel electrodes 8, and the other part corresponds to the even-numbered rows of pixel electrodes 8; and writing corresponding odd line data in the first half frame time, and writing corresponding even line data in the second half frame time.
Power consumption formula P ═ Cf (Δ V) of load capacitor 32Wherein the load capacitance 3 and the signal change frequency are determined. With the technique of the above embodiment, the variation value Δ V of the data signal in the half-frame time is much reduced compared to the dot inversion implementation of the prior art, thereby reducing the power consumption of the data logic.
Applying the provided techniques in an application scenario, comprising:
step 1, dividing the time of a frame into two equal parts to form two operation time periods, wherein each operation time period is half of the frame;
step 2, as shown in fig. 5, for the first half frame, for example, the counter is set to 0, the odd line scanner scans each odd line scanning line 1 connected to itself in turn, the system writes the odd line data signal to the odd line pixel,
and 3, setting the counter to be 1 for the second half frame, scanning each even-row scanning line 2 connected with the even-row scanner by the even-row scanner, and writing the even-row data signals into the even-row pixels by the system.
In other words, whether the data signal is written to the pixels of the odd-numbered rows or the pixels of the even-numbered rows is switched by switching the value of the counter between 0 and 1; this may also be done in a loop for subsequent frames.
As shown in fig. 5, there may be more than one odd line scanner connected to each of the odd line scan lines 1, or there may be more than one even line scanner connected to each of the even line scan lines 2.
In a preferred embodiment, when there are more than one odd line scanners connected to the odd line scanning lines 1, each odd line scanner is sequentially driven, and each odd line scanner sequentially turns on its own connected odd line scanning line 1 to write the odd line data signal to the corresponding odd line pixel;
when more than one even-numbered line scanner connected with each even-numbered line scanning line 2 is used, each even-numbered line scanner is sequentially driven, and each even-numbered line scanner sequentially opens the even-numbered line scanning line 2 connected with the even-numbered line scanner so as to write the even-numbered line data signals into the corresponding even-numbered line pixels.
When the panel of the liquid crystal display is large and the resolution is high, the odd-numbered scanning line 1 and the even-numbered scanning line 2 may be divided again, the odd-numbered scanning line 1 is connected to the plurality of gate drive ICs 1 (odd-numbered line scanner), and the even-numbered scanning line 2 is connected to the plurality of gate drive ICs 2 (even-numbered line scanner); in the scanning process, the scanning lines 1 in the odd rows are still charged in sequence, and then the scanning lines 2 in the even rows are charged.
In a preferred embodiment, during one of the operation time periods, the scanning operation performed by each odd line scanner is counted by using a counter;
and counting the scanning operation performed by each even-numbered line scanner by using the counter in another operation time period.
And in the time of one frame, circularly counting the scanning operation executed by each scanner in each operation time period by using a counter.
The count bits of the counter are set according to the number of odd and even line scanners to multiply count a control signal output from the counter, such as a vertical signal start pulse (STVP), which is a signal of one pin of a logic driver of the TFT LCD.
In a preferred embodiment, during one of the operation time periods, the counter performs a scanning operation corresponding to one of the odd line scanners every time the counter counts, and all of the odd line scanners perform the scanning operation during the operation time period;
in another operation time period, the counter performs a scanning operation corresponding to one even-numbered line scanner every time the counter counts, and all the even-numbered line scanners perform the scanning operation in the operation time period.
As shown in fig. 6, during one operation period, the odd-numbered line scanner performs scanning operation in time sequence, and sequentially sends out the scanning signals SG1,SG3,SG5,.G2n-1;
If the number of the odd line scanners is more than one, namely, the scanning signals are respectively sent out by each odd line scanner to turn on the TFT and receive the data signals from the corresponding data line, all the odd line scanners should finish sending out the scanning signals in one operation time period;
in another operation time period, the even-numbered line scanner executes scanning operation according to time sequence and sends out scanning signals S in sequenceG2,SG4,SG6,.G2n;
If the number of the even-numbered line scanners is more than one, that is, the scanning signals are respectively sent out by each even-numbered line scanner to turn on the TFT and receive the data signals from the corresponding data line, all the even-numbered line scanners should finish sending out the scanning signals in the other operation time period. By applying the provided technology, in an application scene, more than one odd line scanner and more than one even line scanner are arranged; taking a liquid crystal display with a resolution of 1024 × 768 as an example, 768/2=384 scanning lines 1 in the odd rows and 768/2=384 scanning lines 2 in the even rows.
Without loss of generality, if one scanner is set to be connected with 32 scanning lines, there are 12 odd-line scanners and 12 even-line scanners.
Equally dividing the time of one frame into 2 operation time periods, wherein each operation time period is divided into 12 sub-operation time periods, and each sub-operation time period is 1/24 times of the time of one frame and is distributed to one scanner;
the counter can record a total of 12+12=24 numbers.
The method comprises the following steps:
and step 1, in the process that the counting of the counter is 0-11, the counter drives each odd-numbered line scanner in sequence, and each odd-numbered line scanner drives the odd-numbered line scanning line 1 connected with the counter in sequence. Wherein,
when the count is 0, writing a data signal into the pixels in the odd rows connected to the 1 st odd row scan line 1;
when the count is 1, writing a data signal into the pixels in the odd rows connected to the 2 nd odd row scan line 1;
and so on, until when the count is 11, writing a data signal into the pixels in the odd rows connected to the 12 th odd-row scanning line 1;
the first half of the time of one frame ends.
And 2, in the process that the counting of the counter is 12-23, the counter sequentially drives each even-numbered line scanner, and each even-numbered line scanner sequentially drives the even-numbered line scanning line 2 connected with the counter. Wherein,
writing a data signal to the 1 st even-numbered row pixels when the count is 12;
when the count is 13, writing a data signal to the 2 nd even-numbered row pixels;
and so on until, at a count of 23, writing a data signal to the 12 th even-row pixel;
the second half of the time of one frame ends.
An embodiment of the present invention also provides a driving circuit that drives a liquid crystal display in a row inversion or a dot inversion manner, the driving circuit including:
a scan logic unit for dividing a time of one frame into two operation periods;
the odd-row scanner is used for sequentially opening the odd-row scanning lines 1 in one operation time period and writing odd-row data signals into odd-row pixels;
and the even-row scanner is used for sequentially opening the even-row scanning lines 2 in another operation time period and writing the even-row data signals into the even-row pixels.
In a preferred embodiment, there is more than one odd line scanner and/or even line scanner, and the driving circuit further includes:
a counter for counting the scanning operations performed by each of the odd-numbered line scanners in one of the operation periods, and for counting the scanning operations performed by each of the even-numbered line scanners in another one of the operation periods.
In a preferred embodiment, the counter further comprises:
the frequency doubling module is used for setting the counting of the counter in one operation time period, so that each counting corresponds to one odd-numbered line scanner to execute scanning operation, and all the odd-numbered line scanners execute scanning operation in the operation time period; and is
In another of the operation periods, the count of the counter is set so that each time the count corresponds to one of the even-numbered line scanners performing a scanning operation, and all of the even-numbered line scanners performing the scanning operation in the operation period.
An embodiment of the present invention also provides a liquid crystal display, as shown in fig. 2, including a driving circuit, the driving circuit including:
a scan logic unit for dividing a time of one frame into two operation periods;
the odd-row scanner is used for sequentially opening the odd-row scanning lines 1 in one operation time period and writing odd-row data signals into odd-row pixels;
and the even-row scanner is used for sequentially opening the even-row scanning lines 2 in another operation time period and writing the even-row data signals into the even-row pixels.
In a preferred embodiment, further comprising:
a counter for counting the scanning operations performed by each of the odd-numbered line scanners in one of the operation periods, and for counting the scanning operations performed by each of the even-numbered line scanners in another one of the operation periods.
In a preferred embodiment, the counter further comprises:
the frequency doubling module is used for setting the counting of the counter in one operation time period, so that each counting corresponds to one odd-numbered line scanner to execute scanning operation, and all the odd-numbered line scanners execute scanning operation in the operation time period; and is
In another of the operation periods, the count of the counter is set so that each time the count corresponds to one of the even-numbered line scanners performing a scanning operation, and all of the even-numbered line scanners performing the scanning operation in the operation period.
The advantages after adopting this scheme are: the odd-numbered row scanning lines 1 or the even-numbered row scanning lines 2 of the liquid crystal display are turned on within a half length of the time of one frame, and since each turn-on is completed within a half length of the time of one frame, the load capacitance 3 of the pixel does not need to complete the conversion from the positive voltage to the negative voltage within one operation period, but only needs to complete the conversion from the positive voltage or the negative voltage to the reference level, so that the power consumption of the data logic of the liquid crystal display can be reduced.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.