CN101295112A - Liquid crystal display panel and pixel circuit of liquid crystal display and driving method thereof - Google Patents

Abstract

The invention discloses a liquid crystal display panel, a pixel circuit of a liquid crystal display and a driving method thereof. The pixel circuit and the driving method thereof of the invention add a selection line in the pixel circuit, thereby providing a selection signal to the selection line when the pixel circuit is in a voltage holding state to pull up the voltage potential of the pixel electrode, so as to achieve the effect of inserting the image frame into the black frame within a frame time.

Description

Liquid crystal display panel and pixel circuit of liquid crystal display and driving method thereof

technical field

The present invention relates to a pixel circuit for inserting a black screen into a liquid crystal display panel and an image picture of a liquid crystal display and a driving method thereof, and particularly relates to a method for sending a black state signal between a liquid crystal display panel and a liquid crystal display without display data. A pixel circuit and a driving method thereof for achieving the insertion of a black frame into an image frame.

Background technique

Thin Film Transistor Liquid Crystal Display (TFT-LCD) has been widely used recently, and has replaced Cathode Ray Tube (CRT) as one of the mainstream displays of the next generation. With the improvement of semiconductor technology, TFT-LCD has the advantages of low power consumption, thin and light weight, high resolution, high color saturation, and long life, so it is widely used in computer LCD screens and LCD TVs (LCD TVs) ) and other electronic products that are closely related to life.

Generally speaking, TFT-LCD under the fast dynamic picture, because the liquid crystal (Liquid Crystal, LC) response speed is not fast enough (generally 1ms ~ 16ms), and the backlight system adopts the steady state (holding type) In this way, there will be a problem of image afterimage due to the persistence of human vision, and this is the so-called motion blur (motion blur) phenomenon. Therefore, in order to make the TFT-LCD have a better display picture quality in the state of playing fast and dynamic pictures, as far as the current solution technology is concerned, it will use the black picture insertion (block insertion) technology, so as to reduce the TFT-LCD Image sticking caused by playing fast and dynamic images.

FIG. 1A and FIG. 1B are respectively schematic diagrams illustrating techniques of black frame insertion that are more commonly used at present. Please refer to FIG. 1A first. The black screen insertion technology disclosed in FIG. 1A adopts the method of data block insertion, which sends the display data into the signal DBI of the black state at a transmission frequency of 60 Hz, and scans Insert a black frame in a certain area of the image frame by means of this method, and in this way, all display data will be inserted into black after N frames. However, the technique of inserting a black frame into an image frame using a transmission frequency of 60 Hz will complete the black insertion of all display data after N frames, so the required processing time will be lengthened. , and it will also show a poor effect on the visual experience of the human eye.

Next, please refer to FIG. 1B again. The technology of black screen insertion disclosed in FIG. 1B still adopts the method of display data block insertion (data block insertion), which sends the display data into the black state signal DBI with a transmission frequency of 120Hz , and the purpose of using 120Hz transmission frequency to insert black screen into video screen is that 120Hz can be cut into 60Hz to display normal video screen, and the other 60Hz can insert black screen into full video screen, so it is the same as 60Hz transmission Compared with the technology of inserting the black frame into the image frame of high frequency frequency, it can be known that the required processing time will be shortened, and the visual experience of the human eye will also be better.

However, in the state where the 120Hz image frame is inserted into a black frame, the charging time of the pixel circuit in the display panel is half that of the state where a 60Hz image frame is inserted into a black frame, so the pixel circuit must be enlarged. The size of the internal thin film transistor is used to improve the charging capability of the pixel circuit. In addition, it is necessary to use related technologies (such as providing scanning signals at both ends of the scanning line) to reduce the data line (data line) and scanning line (scan line) in the display panel. ) of the RC loading (RCloading) effect, and this will lead to an increase in the production cost of the TFT-LCD.

In addition, regardless of whether a 60Hz or 120Hz video frame is inserted into a black frame, it can only use one frame as a basic unit, and when a 120Hz video frame is inserted into a black frame, TFT -LCD is prone to flicker when it presents a brighter video screen (most obvious in white screen). Therefore, although the user can increase the update frequency of the TFT-LCD driver IC (data IC) to reduce the above-mentioned flicker phenomenon, the power consumption of the driver IC will also increase accordingly, and such a solution Technology will not only reduce the service life of the driver IC, but also increase the overall power consumption of the TFT-LCD.

Contents of the invention

In view of this, the object of the present invention is to provide a pixel circuit and its driving method, which provides a selection line when the pixel circuit is in the voltage holding state (holding state) by adding a selection line in the pixel circuit. The signal is sent to the selection line to pull up the charging voltage potential required by the pixel circuit, so that the effect of inserting the image frame into a black frame can be achieved within one frame time.

Another object of the present invention is to provide a liquid crystal display panel and a liquid crystal display thereof. By applying the above-mentioned pixel circuit and its driving method provided by the present invention to it, not only can the image be completed within one frame time The picture inserts the effect of black picture, and can solve many shortcomings described in the prior art.

Based on the above and other objectives, the present invention provides a pixel circuit, which includes a selection line, an active element (such as a thin film transistor), a liquid crystal capacitor, a first storage capacitor, and a second storage capacitor. The gate of the active device is electrically connected to the scan line, the first drain/source of the active device is electrically connected to the data line, and the second drain/source of the active device is electrically connected to the pixel electrode. Both the liquid crystal capacitor and the second storage capacitor are electrically connected between the pixel electrode and the common electrode, and the first storage capacitor is electrically connected between the selection line and the pixel electrode.

From another point of view, the present invention provides a liquid crystal display panel, which includes at least one data line, at least one scan line, and at least one pixel circuit, and the pixel circuit includes a selection line, an active element (such as a thin film transistor) , a liquid crystal capacitor, a first storage capacitor, and a second storage capacitor. The gate of the active device is electrically connected to the scan line, the first drain/source of the active device is electrically connected to the data line, and the second drain/source of the active device is electrically connected to the pixel electrode. Both the liquid crystal capacitor and the second storage capacitor are electrically connected between the pixel electrode and the common electrode, and the first storage capacitor is electrically connected between the selection line and the pixel electrode.

From another point of view, the present invention provides a liquid crystal display panel, which includes at least one scan line, at least one first data line, at least one second data line, at least one first pixel circuit, and at least one second pixel circuit. pixel circuit. Wherein, the first pixel circuit includes a first selection line, a first active element (such as a thin film transistor), a first liquid crystal capacitor, a first storage capacitor, and a second storage capacitor. The gate of the first active device is electrically connected to the scan line, the first drain/source of the first active device is electrically connected to the first data line, and the second drain/source of the first active device is electrically connected to the pixel electrodes. Both the first liquid crystal capacitor and the second storage capacitor are electrically connected between the pixel electrode and the common electrode, and the first storage capacitor is electrically connected between the first selection line and the pixel electrode.

The second pixel circuit includes a second selection line, a second active element (such as a thin film transistor), a second liquid crystal capacitor, a third storage capacitor, and a fourth storage capacitor. The gate of the second active device is electrically connected to the scan line, the first drain/source of the second active device is electrically connected to the second data line, and the second drain/source of the second active device is electrically connected to the pixel electrodes. Both the second liquid crystal capacitor and the fourth storage capacitor are electrically connected between the pixel electrode and the common electrode, and the third storage capacitor is electrically connected between the second selection line and the pixel electrode.

From another point of view, the present invention provides a liquid crystal display including a gate driver, a source driver, and a liquid crystal display panel. Wherein, the gate driver has at least one gate wiring, and the gate driver is used to output a scanning signal through the gate wiring according to a basic timing. The source driver has at least one source wiring, and the source driver is used to receive an image data and output a data signal through the source wiring.

The liquid crystal display panel includes at least one data line, at least one scan line, and at least one pixel circuit, and the pixel circuit includes a selection line, an active element (such as a thin film transistor), a liquid crystal capacitor, a first storage capacitor, and a second storage capacitor . The gate of the active device is electrically connected to the scan line, the first drain/source of the active device is electrically connected to the data line, and the second drain/source of the active device is electrically connected to the pixel electrode. Both the liquid crystal capacitor and the second storage capacitor are electrically connected between the pixel electrode and the common electrode, and the first storage capacitor is electrically connected between the selection line and the pixel electrode.

In the present invention, the liquid crystal display further includes a selection signal generating unit for providing a selection signal to the selection line.

From another point of view, the present invention provides a liquid crystal display including a gate driver, a source driver, and a liquid crystal display panel. Wherein, the gate driver has at least one gate wiring, and the gate driver is used to output a scanning signal through the gate wiring according to a basic timing. The source driver has at least one first source wiring and at least one second source wiring. The source driver is used to receive an image data and output the first source wiring and the second source wiring respectively. A data signal and a second data signal.

The liquid crystal display panel includes at least one scan line, at least one first data line, at least one second data line, at least one first pixel circuit, and at least one second pixel circuit. Wherein, the first pixel circuit includes a first selection line, a first active element (such as a thin film transistor), a first liquid crystal capacitor, a first storage capacitor, and a second storage capacitor. The gate of the first active device is electrically connected to the scan line, the first drain/source of the first active device is electrically connected to the first data line, and the second drain/source of the first active device is electrically connected to the pixel electrodes. Both the first liquid crystal capacitor and the second storage capacitor are electrically connected between the pixel electrode and the common electrode, and the first storage capacitor is electrically connected between the first selection line and the pixel electrode.

The second pixel circuit includes a second selection line, a second active element (such as a thin film transistor), a second liquid crystal capacitor, a third storage capacitor, and a fourth storage capacitor. The gate of the second active device is electrically connected to the scan line, the first drain/source of the second active device is electrically connected to the second data line, and the second drain/source of the second active device is electrically connected to the pixel electrodes. Both the second liquid crystal capacitor and the fourth storage capacitor are electrically connected between the pixel electrode and the common electrode, and the third storage capacitor is electrically connected between the second selection line and the pixel electrode.

In the present invention, the liquid crystal display further includes a selection signal generating unit for providing a first selection signal and a second selection signal to the first selection line and the second selection line respectively.

From another point of view, the present invention provides a pixel circuit driving method, which is suitable for the above-mentioned pixel circuit provided by the present invention, and the pixel circuit driving method includes the following steps: first, when the pixel circuit is in the voltage write When entering the charging state, that is, when the gate of the active element receives a high-potential scanning signal, the above-mentioned pixel electrode will receive a high-potential data signal through the data line, so as to charge the liquid crystal capacitor, the first storage capacitor and The second storage capacitor is charged. Then, when the pixel circuit is in the voltage holding state (holding state), that is, when the gate of the active element receives a low-potential scanning signal, a selection signal is provided to the selection line to change the voltage potential of the above-mentioned pixel electrode to pull up.

In the pixel circuit and its driving method provided by the present invention, a selection line is added in the pixel circuit to generate a storage capacitor between the selection line and the pixel electrode, so that when the pixel circuit is in a voltage holding state (holding state) According to the principle of charge conservation, a selection signal is provided to the selection line to increase the charging voltage potential required by the pixel circuit, so as to achieve the effect of inserting the image frame into a black frame within one frame time.

In addition, the liquid crystal display panel and liquid crystal display provided by the present invention apply the pixel circuit provided by the present invention to it, thereby not only achieving the technical effects that the pixel circuit of the present invention can achieve, but also Furthermore, when the liquid crystal display is playing a fast dynamic picture, the displayed picture will not have the phenomenon of motion blur (motion blur) described in the prior art, so as to improve the picture quality it presents.

Description of drawings

In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

FIG. 1A and FIG. 1B are respectively schematic diagrams of black frame insertion techniques commonly used at present.

FIG. 2 is a block diagram of a liquid crystal display according to a preferred embodiment of the present invention.

FIG. 3 is a circuit diagram of a pixel circuit in a preferred embodiment of the present invention.

FIG. 4 is a flowchart of a driving method of a pixel circuit according to a preferred embodiment of the present invention.

FIG. 5 is a driving simulation waveform diagram of a pixel circuit in a preferred embodiment of the present invention

FIG. 6A is a timing waveform diagram of a selection line of one of the exemplary embodiments of the present invention.

FIG. 6B is a schematic diagram of inserting a black frame into the image frame of FIG. 6A .

FIG. 7A is another timing waveform diagram of a selection line according to an exemplary embodiment of the present invention.

FIG. 7B is a schematic diagram of inserting a black frame into the image frame of FIG. 7A .

FIG. 8 is a block diagram of a liquid crystal display according to another embodiment of the present invention.

FIG. 9 is a circuit diagram of some pixel circuits in the pixel array of the liquid crystal display panel in FIG. 8 .

Detailed ways

The technical effect that the present invention intends to achieve is to solve the problem of the motion blur (motion blur) phenomenon that the current TFT-LCD will produce when playing fast dynamic pictures, and the following content will list several liquid crystal types of normal white The embodiment of the formula (Normally White) is described in detail with regard to the technical characteristics and the desired effect of this case, so as to provide reference for those skilled in the art related to the invention.

FIG. 2 is a block diagram of a liquid crystal display 200 according to a preferred embodiment of the present invention. Please refer to Fig. 2, liquid crystal display (such as thin film transistor liquid crystal display, TFT-LCD) 200 includes gate driver (gate driver) 201, source driver (source driver) 203, liquid crystal display panel (LCD panel) 205, and select Signal generating unit 207 . Wherein, the gate driver 201 has a plurality of gate wirings G1-Gm, and the gate driver 201 sequentially passes through the gate wirings according to the basic timing CPV provided by the timing controller (T-con, not shown). G1˜Gm output a scan signal (scan signal) Vg to corresponding scan lines (scan lines) SL1˜SLm in the liquid crystal display panel 205 .

The source driver 203 has a plurality of source wirings S1-Sn, and the source driver 203 outputs a data signal (datasignal) Vd through the source wirings S1-Sn to A plurality of data lines (data lines) DL1˜DLn in the liquid crystal display panel 205 . There are a plurality of pixel circuits (pixel circuit) P in the liquid crystal display panel 205, and each pixel circuit P will correspondingly receive the scanning signal sequentially output by the gate driver 201 and enable (enable), thereby according to the source The data signal output by the driver 203 is used for charging.

FIG. 3 is a circuit diagram of the pixel circuit P of this embodiment. Please refer to FIG. 2 and FIG. 3 together. The pixel circuit P of this embodiment includes a selection line C1, an active element (such as a thin film transistor) T, a liquid crystal capacitor Clc, and a first storage capacitor Cst1 and a second storage capacitor Cst2. Wherein, the gate of the active device T is electrically connected to the scan line SL (for example, the scan line SL1 ) for receiving the scan signal Vg output by the gate driver 201 to enable, and the drain of the active device T is electrically connected to the The data line DL (for example, the data line DL1 ) is used to receive the data signal Vd output from the source driver 203 to charge the liquid crystal capacitor Clc, the first storage capacitor Cst1 and the second storage capacitor Cst2 .

In this embodiment, the liquid crystal capacitor Clc and the second storage capacitor Cst2 are formed between the pixel electrode (not shown) and the common electrode (common electrode) Vcom, and the first storage capacitor Cst1 is formed between the pixel electrode and the selection electrode. between line C1.

What is worth mentioning here is that the pixel array structure of the liquid crystal display panel 205 is designed in a driving manner of line inversion and frame inversion. And in order to explain more clearly how the pixel circuit P of this embodiment achieves the effect of inserting a black screen (block insertion) into an image picture, the driving method of the pixel circuit P is enumerated below again, and a liquid crystal (LC) is used as a normal display White (normally white), but not limited thereto, it can also be explained under the condition of normally displaying black driving mode), so that those skilled in the art related to the invention can better understand.

FIG. 4 is a flow chart of the driving method of the pixel circuit P in this embodiment. FIG. 5 is a driving simulation waveform diagram of the pixel circuit P in this embodiment, the horizontal axis represents the time uS, and the vertical axis represents the voltage V. Please refer to FIGS. 2 to 5 together. The driving method of the pixel circuit P includes the following steps: First, as described in step S401, when the pixel circuit P is in the voltage writing state (charging state), the pixel electrode will pass through the data line DL1 The high potential data signal Vdh is received to charge the liquid crystal capacitor Clc, the first storage capacitor Cst1 and the second storage capacitor Cst2. The voltage writing state mentioned in this step means: when the gate of the active element T receives the high-potential scanning signal Vgh, the pixel circuit P will be in the voltage writing state.

Next, as described in step S403, when the pixel circuit P is in the voltage holding state (holding state), the selection signal generation unit 207 will provide a selection signal Vslt to the selection line C (for example, the selection line C1), so that the pixel The voltage potential Vp of the electrode is pulled up. The voltage holding state mentioned in this step means: when the gate of the active element T receives the low-potential scanning signal Vg1, the pixel circuit P will be in the voltage holding state.

Therefore, based on the above and referring to FIGS. 2 to 5 again, it can be seen from the analog waveform diagram disclosed in FIG. 5 that the area where the high-potential scanning signal Vgh and the high-potential data signal Vdh overlap is the above-mentioned voltage writing state. CHST, at this time, the pixel circuit P will be in the voltage writing time CHST, and the voltage Vp of the pixel electrode will be transferred to the liquid crystal capacitor Clc, the first storage capacitor Cst1 and the second The storage capacitor Cst2 is charged.

Next, when the scanning signal Vg changes to a low-potential scanning signal Vg1, the pixel circuit P will be in the voltage holding state HDST, and at this time, the selection signal generating unit 207 will provide a high-potential selection signal Vslth to the selection line C1, so the pixel The voltage Vp of the electrode will be pulled up to the voltage potential Vp' due to the coupling effect of the first storage capacitor Cst1. When Vslt becomes the selection signal Vslti of the original voltage potential, the voltage potential of the pixel electrode voltage Vp will be pulled back to the voltage potential when it is not pulled up, so that the pixel circuit P returns to the normal state NOST and waits for the next scan When the signal Vg becomes the scanning signal Vgh with a high potential, the above-mentioned operations are repeated.

In this embodiment, the duty cycle width W of the selection signal Vslt output by the selection signal generation unit 207 will present the effect of inserting different image frames into black frames. FIG. 6A is a timing waveform diagram of one of the selection lines C1 -Cm in this embodiment. FIG. 6B is a schematic diagram of inserting a black frame into the image frame of FIG. 6A . Please refer to FIG. 6A and FIG. 6B at the same time. In this embodiment, the odd number of selection lines C1, C3...is initially preset to drive Vslth with positive polarity, and the even number of selection lines C2, C4...is to drive Vslt1 with negative polarity. , and the duty cycle width W of the selection signal Vslt of each of the selection lines C1-Cm differs for a period of time t, so the duty cycle width W of the selection signal Vslt of each selection line C1-Cm has an overlapping area.

Therefore, based on the above, in this embodiment, the action of inserting a video frame into a black frame (as shown in FIG. 6B ) can be completed in a scanning manner (transmission frequency is 60 Hz) within one frame time (as shown in FIG. 6B ), where FIG. The "T" in 6B is based on the condition of 768 scanning lines SL (WXGA), which represents the time allocated to each selection line C1-Cm, and FF represents the first frame. For example, 48T represents the elapsed time of 48 selection lines C1-C48.

In addition, since the time for inserting a black image into a black image is determined by the duty cycle width W of the selection signal Vslt of each selection line C1~Cm, it is only necessary to adjust its width or change the scanning direction of the black image inserted into a black image. , you can achieve the effect of inserting black screen into different image screens.

FIG. 7A is a timing waveform diagram of another selection line C1 -Cm of the present embodiment. FIG. 7B is a schematic diagram of inserting a black frame into the image frame of FIG. 7A . Please refer to FIG. 7A and FIG. 7B together. FIG. 7A also increases the duty cycle width W of the selection signal Vslt of each selection line C1-Cm, so that the area where the image screen is inserted into the black screen overlapping area can cover the selected lines C1-Cm. Cm, in this way, the action of inserting the video frame into the black frame (as shown in Figure 7B) can be achieved within one frame time, and then the transmission frequency can be changed to 120 Hz to achieve the transmission at 120 Hz as in the prior art The display of frequency is equivalent to the action of data block insertion.

Therefore, based on the above, it can be seen that when this embodiment performs the action of inserting a black screen into a video frame, it is not related to the driver IC (data driver), so the power consumption of the driver IC in this embodiment will not increase, and its service life will also be reduced. will not be shortened.

FIG. 8 is a block diagram of a liquid crystal display 800 according to another embodiment of the present invention. Please refer to FIG. 2 and FIG. 8 together. The biggest difference between the liquid crystal displays 800 and 200 is that the pixel array structures of the liquid crystal display panel 801 and the liquid crystal display panel 205 are different. Wherein, the pixel array structure of the liquid crystal display panel 801 is designed in a dot inversion driving manner.

FIG. 9 is a circuit diagram of some pixel circuits P in the pixel array of the liquid crystal display panel 801 of the present embodiment. Please refer to FIG. 8 and FIG. 9 together. The pixel circuit P1 includes a selection line C1, a first active element (such as a thin film transistor) T1, a first liquid crystal capacitor Clc1, and a first storage capacitor Cst1 and a second storage capacitor Cst2. Wherein, the gate of the active device T1 is electrically connected to the scan line SL (for example, the scan line SL1 ) for receiving the scan signal Vg output by the gate driver 201 to enable, and the drain of the active device T is electrically connected to the The data line DL (such as the data line DL1 ) is used to receive the data signal Vd output from the source driver 203 to charge the first liquid crystal capacitor Clc1 , the first storage capacitor Cst1 and the second storage capacitor Cst2 .

The pixel circuit P2 includes a selection line C1', a second active element (such as a thin film transistor) T2, a second liquid crystal capacitor Clc2, and a third storage capacitor Cst3 and a fourth storage capacitor Cst4. Wherein, the gate of the active element T2 is electrically connected to the scan line SL (for example, the scan line SL1 ) for receiving the scan signal Vg output by the gate driver 201 to enable, and the drain of the active element T2 is electrically connected to the The data line DL (for example, the data line DL1 ) is used to receive the data signal Vd output from the source driver 203 to charge the second liquid crystal capacitor Clc2 , the third storage capacitor Cst3 and the fourth storage capacitor Cst4 .

In this embodiment, the first liquid crystal capacitor Clc1, the second liquid crystal capacitor Clc2, the second storage capacitor Cst2, and the fourth storage capacitor Cst4 are formed between the pixel electrode (not shown) and the common electrode Vcom, and the second A storage capacitor Cst1 and a third storage capacitor Cst3 are respectively formed between the pixel electrode and the selection line C1 and the selection line C1 ′.

Therefore, according to the above, the pixel array of the display panel 801 needs to add more selection lines C1 ′˜Cm’ to electrically connect to an even number of pixel circuits P in each row of pixel circuits P in the liquid crystal display panel 801 . The driving method of the liquid crystal display 800 under this type of pixel array structure is similar to the driving method of the liquid crystal display 200, and the spirit of achieving the image frame insertion black frame (block insertion) has also been described in the above-mentioned embodiments, so here No more details.

To sum up, the present invention provides a pixel circuit and a liquid crystal display panel and a liquid crystal display in which it is applied. And according to the spirit of the present invention, there are following advantages to describe:

1. Because a selection line is added to the pixel circuit to generate a storage capacitor between the selection line and the pixel electrode, so that when the pixel circuit is in a voltage holding state (holding state), a selection signal is provided according to the principle of charge conservation To the selection line to increase the charging voltage potential required by the pixel circuit, so as to achieve the effect of inserting the image frame into a black frame within one frame time, and it will also be visually perceived by the human eye. Show better results.

2. The liquid crystal display panel provided by the present invention and the liquid crystal display thereof, because the above-mentioned pixel circuit provided by the present invention is added to it, thereby not only can achieve the technical effect that the pixel circuit of the present invention can achieve, but also can make When the liquid crystal display is playing a fast dynamic picture, the display picture presented by it will not have the phenomenon of motion blur (motion blur) described in the previous technology, so as to improve the picture quality presented by it, and its overall power consumption is also reduced. will not increase.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any technical skill in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, this The protection scope of the invention should be defined by the claims.

Claims (22)

1. A pixel circuit, characterized in that, comprising: a selection line; An active element, the gate of the active element is electrically connected to a scan line, the first drain/source of the active element is electrically connected to a data line, and the second drain/source of the active element is electrically connected to the a pixel electrode; a liquid crystal capacitor electrically connected between the pixel electrode and a common electrode; and A first storage capacitor is electrically connected between the selection line and the pixel electrode. 2. The pixel circuit according to claim 1, further comprising a second storage capacitor electrically connected between the pixel electrode and the common electrode. 3. The pixel circuit as claimed in claim 1, wherein the active device comprises a thin film transistor. 4. A liquid crystal display panel, characterized in that, comprising: at least one data line and at least one scan line; and At least one pixel circuit comprising: a selection line; An active element, the gate of the active element is electrically connected to the scan line, the first drain/source of the active element is electrically connected to the data line, and the second drain/source of the active element is electrically connected to a pixel electrode; a liquid crystal capacitor electrically connected between the pixel electrode and a common electrode; and A first storage capacitor is electrically connected between the selection line and the pixel electrode. 5. The liquid crystal display panel as claimed in claim 4, wherein the pixel circuit further comprises a second storage capacitor electrically connected between the pixel electrode and the common electrode. 6. The liquid crystal display panel as claimed in claim 4, wherein the active device comprises a thin film transistor. 7. A liquid crystal display panel, characterized in that, comprising: at least one scan line; at least one first data line and at least one second data line; A first pixel circuit, comprising: a first selection line; A first active element, the gate of the first active element is electrically connected to the scan line, the first drain/source of the first active element is electrically connected to the first data line, and the first active element of the first active element is electrically connected to the scanning line. The second drain/source are electrically connected to a pixel electrode; a first liquid crystal capacitor electrically connected between the pixel electrode and a common electrode; and a first storage capacitor electrically connected between the first selection line and the pixel electrode; and A second pixel circuit, comprising: a second selection line; A second active element, the gate of the second active element is electrically connected to the scanning line, the first drain/source of the second active element is electrically connected to the second data line, and the first drain of the second active element is electrically connected to the second data line. The second drain/source are electrically connected to the pixel electrode; a second liquid crystal capacitor electrically connected between the pixel electrode and the common electrode; and A third storage capacitor is electrically connected between the second selection line and the pixel electrode. 8. The liquid crystal display panel as claimed in claim 7, wherein the first pixel circuit further comprises a second storage capacitor electrically connected between the pixel electrode and the common electrode. 9. The liquid crystal display panel as claimed in claim 7, wherein the second pixel circuit further comprises a fourth storage capacitor electrically connected between the pixel electrode and the common electrode. 10. The liquid crystal display panel as claimed in claim 7, wherein the first active device and the second active device comprise a thin film transistor. 11. A liquid crystal display, characterized in that it comprises: A gate driver having at least one gate wiring for outputting a scanning signal through the gate wiring according to a basic timing; a source driver having at least one source wiring for receiving an image data and outputting a data signal through the source wiring; and A liquid crystal display panel, comprising: at least one data line electrically connected to the source wiring; at least one scan line electrically connected to the gate wiring; and At least one pixel circuit comprising: a selection line; An active element, the gate of the active element is electrically connected to the scan line, the first drain/source of the active element is electrically connected to the data line, and the second drain/source of the active element is electrically connected to a pixel electrode; a liquid crystal capacitor electrically connected between the pixel electrode and a common electrode; and A first storage capacitor is electrically connected between the selection line and the pixel electrode. 12. The liquid crystal display as claimed in claim 11, further comprising a selection signal generating unit coupled to the selection line for providing a selection signal to the selection line. 13. The liquid crystal display as claimed in claim 11, wherein the pixel circuit further comprises a second storage capacitor electrically connected between the pixel electrode and the common electrode. 14. The liquid crystal display as claimed in claim 11, wherein the active device comprises a thin film transistor. 15. A liquid crystal display, characterized in that it comprises: A gate driver having at least one gate wiring for outputting a scanning signal through the gate wiring according to a basic timing; A source driver, having at least one first source wiring and at least one second source wiring, used to receive an image data and respectively output a a first data signal and a second data signal; and A liquid crystal display panel, comprising: at least one scan line electrically connected to the gate wiring; at least one first data line electrically connected to the first source wiring; at least one second data line electrically connected to the second source wiring; At least one first pixel circuit, including: a first selection line; A first active element, the gate of the first active element is electrically connected to the scan line, the first drain/source of the first active element is electrically connected to the first data line, and the first active element of the first active element is electrically connected to the scanning line. Two drain/source electrodes are electrically connected to a pixel electrode; a first liquid crystal capacitor electrically connected between the pixel electrode and a common electrode; and a first storage capacitor electrically connected between the first selection line and the pixel electrode; and At least one second pixel circuit, including: a second selection line; A second active element, the gate of the second active element is electrically connected to the scanning line, the first drain/source of the second active element is electrically connected to the second data line, and the first drain of the second active element is electrically connected to the second data line. The second drain/source are electrically connected to the pixel electrode; a second liquid crystal capacitor electrically connected between the pixel electrode and the common electrode; and A third storage capacitor is electrically connected between the second selection line and the pixel electrode. 16. The liquid crystal display as claimed in claim 15 , further comprising a selection signal generating unit coupled to the first selection line and the second selection line for providing a selection signal to the first selection line respectively. line with this second selection line. 17. The liquid crystal display as claimed in claim 15, wherein the first pixel circuit further comprises a second storage capacitor electrically connected between the pixel electrode and the common electrode. 18. The liquid crystal display as claimed in claim 15, wherein the second pixel circuit further comprises a fourth storage capacitor electrically connected between the pixel electrode and the common electrode. 19. The liquid crystal display as claimed in claim 15, wherein the first active device and the second active device comprise a thin film transistor. 20. A pixel circuit driving method, suitable for the pixel circuit as claimed in claim 2, comprising the following steps: When the pixel circuit is in a voltage writing state, the pixel electrode receives a high potential data signal through the data line to charge the liquid crystal capacitor, the first storage capacitor and the second storage capacitor; and When the pixel circuit is in a voltage holding state, a selection signal is provided to the selection line to pull up the voltage potential of the pixel electrode. 21 . The pixel circuit driving method according to claim 20 , wherein when the gate of the active element receives a scanning signal with a high potential, the pixel circuit is in the voltage writing state. 22. The pixel circuit driving method according to claim 20, wherein when the gate of the active device receives a scan signal with a low potential, the pixel circuit is in the voltage holding state.

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