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v3.23.8 revision
v3.23.8 revision
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CHANGELOG.md

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,16 @@ All notable version changes will be recorded in this file.
66

77
***
88

9-
### [v3.23.7] revision
9+
### [v3.23.8] revision
1010

1111
**Improve**:
1212
- `GNU Arm Toolchain`: Support new mcpu: `cortex-m52, cortex-m55, cortex-m85`.
1313
- `unify_builder`: Optimize builder speed.
1414

15+
- `File Options`: Add memory assignment feature for `AC5`, `AC6` toolchain. Thanks the contributor [Deadline039](https://github.com/Deadline039)
16+
- `File Options GUI`: Update the translation text. Optimize layout.
17+
- `DebugConfig Generator GUI`: Change gui element width. Sort the option result list.
18+
1519
***
1620

1721
### [v3.23.6] revision

README.md

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@@ -12,9 +12,9 @@
1212

1313
## Summary 📑
1414

15-
A mcu development environment for `8051/AVR/STM8/Cortex-M/MIPS/RISC-V/Universal-Gcc` on VsCode.
15+
A mcu development environment for `8051/STM8/Cortex-M/MIPS/RISC-V` on VsCode.
1616

17-
Provide `8051/AVR/STM8/Cortex-M/MIPS/RISC-V` project development, compilation, program flash and other functions.
17+
Provide `8051/STM8/Cortex-M/MIPS/RISC-V` project development, compilation, program flash and other functions.
1818

1919
Supported Platforms:
2020
- **Windows x64 (>= Windows 10)**
@@ -27,7 +27,7 @@ Supported Platforms:
2727

2828
## Features 🎉
2929

30-
* Support 8051, AVR, STM8, Cortex-M, MIPS MTI, RISC-V, Universal-Gcc projects.
30+
* Support 8051, STM8, Cortex-M, MIPS MTI, RISC-V, GCC projects.
3131
* Support to import KEIL5/IAR/Eclipse projects, support to import 'IAR-STM8, IAR-ARM, Segger Embedded Studio' project source file resource tree.
3232
* Support for installing standard KEIL chip support packs (only for Cortex-M projects).
3333
* Provides many project templates for quick start a project.

README_ZH-CN.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@
1212

1313
一款适用于 8051/STM8/Cortex-M/MIPS/RISC-V 的单片机开发环境。
1414

15-
在 vscode 上提供 **8051**, **AVR**, **STM8**, **Cortex-M**, **MIPS MTI**, **RISC-V** ... 项目的 开发, 编译, 烧录 等功能。
15+
在 vscode 上提供 **8051**, **STM8**, **Cortex-M**, **MIPS MTI**, **RISC-V** ... 项目的 开发, 编译, 烧录 等功能。
1616

1717
支持的平台:
1818
- **Windows x64 (>= Windows 10)**
@@ -25,7 +25,7 @@
2525

2626
## 功能特性 🎉
2727

28-
* 支持开发 8051,STM8,AVR,Cortex-M,MIPS MTI, RISC-V, AnyGcc 项目。
28+
* 支持开发 8051,STM8,Cortex-M,MIPS MTI, RISC-V, GCC 项目。
2929
* 支持导入 KEIL5/IAR/Eclipse 项目,支持导入 `IAR-STM8, IAR-ARM, Segger Embedded Studio` 项目源文件资源树。
3030
* 支持安装标准的 KEIL 芯片支持包 (仅用于 Cortex-M 项目)。
3131
* 提供丰富的项目模板方便快速开始项目。

package.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@
3636
"homepage": "https://em-ide.com",
3737
"license": "MIT",
3838
"description": "A mcu development environment for 8051/AVR/STM8/Cortex-M/MIPS/RISC-V",
39-
"version": "3.23.7",
39+
"version": "3.23.8",
4040
"preview": false,
4141
"engines": {
4242
"vscode": "^1.67.0"

res/html/simple_config_ui/js/app.js

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src/CodeBuilder.ts

Lines changed: 105 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,8 @@ import { BuilderOptions, ProjectConfigData, ProjectConfiguration } from "./EIDET
3838
import {
3939
ArmBaseCompileData,
4040
Memory, ARMStorageLayout,
41-
FloatingHardwareOption, C51BaseCompileData, RiscvCompileData, AnyGccCompileData, MipsCompileData
41+
FloatingHardwareOption, C51BaseCompileData, RiscvCompileData, AnyGccCompileData, MipsCompileData,
42+
getRamRomName
4243
} from './EIDEProjectModules';
4344
import { SettingManager } from "./SettingManager";
4445
import { GlobalEvent } from "./GlobalEvents";
@@ -561,12 +562,18 @@ interface MemorySize {
561562
interface RomItem {
562563
memInfo: Memory;
563564
selected: boolean;
565+
name: string;
566+
roFiles: string[];
564567
}
565568

566569
interface RamItem {
567570
memInfo: Memory;
568571
selected: boolean;
569572
noInit: boolean;
573+
name: string;
574+
roFiles: string[];
575+
rwFiles: string[];
576+
ziFiles: string[];
570577
}
571578

572579
interface MemoryScatter {
@@ -601,15 +608,21 @@ export class ARMCodeBuilder extends CodeBuilder {
601608
startAddr: '0x00000000',
602609
size: '0x00000000'
603610
},
604-
selected: false
611+
selected: false,
612+
name: '',
613+
roFiles: [],
605614
});
606615
memScatter.ramList.push({
607616
memInfo: {
608617
startAddr: '0x00000000',
609618
size: '0x00000000'
610619
},
611620
selected: false,
612-
noInit: false
621+
noInit: false,
622+
name: '',
623+
roFiles: [],
624+
ziFiles: [],
625+
rwFiles: []
613626
});
614627
}
615628

@@ -653,6 +666,7 @@ export class ARMCodeBuilder extends CodeBuilder {
653666
memScatter.ramList[index].memInfo.size = this.FillHexNumber(storageLayout.RAM[i].mem.size);
654667
memScatter.ramList[index].selected = storageLayout.RAM[i].isChecked;
655668
memScatter.ramList[index].noInit = storageLayout.RAM[i].noInit;
669+
memScatter.ramList[index].name = getRamRomName(storageLayout.RAM[i]);
656670
}
657671

658672
for (let i = 0; i < storageLayout.ROM.length; i++) {
@@ -672,6 +686,7 @@ export class ARMCodeBuilder extends CodeBuilder {
672686
memScatter.romList[index].memInfo.startAddr = this.FillHexNumber(storageLayout.ROM[i].mem.startAddr);
673687
memScatter.romList[index].memInfo.size = this.FillHexNumber(storageLayout.ROM[i].mem.size);
674688
memScatter.romList[index].selected = storageLayout.ROM[i].isChecked;
689+
memScatter.romList[index].name = getRamRomName(storageLayout.ROM[i]);
675690
memScatter.startUpIndex = storageLayout.ROM[i].isStartup ? index : memScatter.startUpIndex;
676691
}
677692

@@ -723,30 +738,115 @@ export class ARMCodeBuilder extends CodeBuilder {
723738
child: []
724739
});
725740

741+
// Extra memory assign.
742+
const assignFileToMemory = (fileName: string, memoryName: string, memoryList: RomItem[] | RamItem[], attr: string) => {
743+
memoryList.forEach((item) => {
744+
if (item.name === memoryName && attr === 'RO') {
745+
item.roFiles.push(fileName);
746+
return;
747+
}
748+
749+
if (item.name === memoryName && attr === 'RW') {
750+
(item as RamItem).rwFiles.push(fileName);
751+
return;
752+
}
753+
754+
if (item.name === memoryName && attr === 'ZI') {
755+
(item as RamItem).ziFiles.push(fileName);
756+
return;
757+
}
758+
});
759+
}
760+
761+
const options = this.project.getSourceExtraArgsCfg();
762+
if (options && options.memoryAssign) {
763+
const memoryAssign = options.memoryAssign;
764+
Object.keys(memoryAssign).forEach((key) => {
765+
const fileName = NodePath.basename(key).replace(/\.[^/.]+$/, '.o');
766+
const item = memoryAssign[key];
767+
if (item.RO) {
768+
assignFileToMemory(fileName, item.RO, memScatter.romList, 'RO');
769+
assignFileToMemory(fileName, item.RO, memScatter.ramList, 'RO');
770+
}
771+
if (item.RW) {
772+
assignFileToMemory(fileName, item.RW, memScatter.ramList, 'RW');
773+
}
774+
if (item.ZI) {
775+
assignFileToMemory(fileName, item.ZI, memScatter.ramList, 'ZI');
776+
}
777+
});
778+
}
779+
780+
const InsertFileToScatter = (fileName: string, content: string, attr: string): string => {
781+
if (content.search(fileName) === -1) {
782+
content += `${fileName} (+${attr}) \r\n`;
783+
} else {
784+
// Insert the attribute only. e.g. "file.o (+RO)" => "file.o (+RO +RW)"
785+
const regex = new RegExp(`(${fileName} \\(([^)]*)\\))`);
786+
content = content.replace(regex, (match, p1, p2) => {
787+
// Don't add the same attribute again
788+
if (p2.includes(`+${attr}`)) return match;
789+
return `${fileName} (${p2} +${attr})`;
790+
});
791+
}
792+
793+
return content;
794+
}
726795
//RAM
727796
memScatter.ramList.forEach((item, index) => {
797+
let content = ''
798+
if (item.roFiles.length > 0) {
799+
item.roFiles.forEach((fileName) => {
800+
content = InsertFileToScatter(fileName, content, 'RO');
801+
});
802+
}
803+
if (item.rwFiles.length > 0) {
804+
item.rwFiles.forEach((fileName) => {
805+
content = InsertFileToScatter(fileName, content, 'RW');
806+
});
807+
}
808+
if (item.ziFiles.length > 0) {
809+
item.ziFiles.forEach((fileName) => {
810+
content = InsertFileToScatter(fileName, content, 'ZI');
811+
});
812+
}
728813
if (item.selected) {
814+
content += '.ANY (+RW +ZI) \r\n';
815+
}
816+
817+
if (content !== '') {
729818
staUpTxt.child.push({
730819
name: getRamName(index),
731820
addr: ' ' + item.memInfo.startAddr + (item.noInit ? ' UNINIT ' : ' ') + item.memInfo.size + ' ',
732-
content: '.ANY (+RW +ZI) \r\n',
821+
content: content,
733822
child: []
734823
});
735824
}
736825
});
737826

738827
memTxt.push(staUpTxt);
739828

829+
//ROM
740830
memScatter.romList.forEach((item, index) => {
831+
let content = ''
832+
if (item.roFiles.length > 0) {
833+
item.roFiles.forEach((fileName) => {
834+
content = InsertFileToScatter(fileName, content, 'RO');
835+
});
836+
}
741837
if (item.selected && index !== memScatter.startUpIndex) {
838+
content += '.ANY (+RO) \r\n';
839+
}
840+
841+
if (content !== '') {
742842
memTxt.push({
743843
name: getRomName(index, false),
744844
addr: ' ' + item.memInfo.startAddr + ' ' + item.memInfo.size + ' ',
745845
content: '',
746846
child: [{
747847
name: getRomName(index, true),
748848
addr: ' ' + item.memInfo.startAddr + ' ' + item.memInfo.size + ' ',
749-
content: '.ANY (+RO) \r\n',
849+
content: content,
750850
child: []
751851
}]
752852
});

src/EIDEProject.ts

Lines changed: 32 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ import { ExeCmd } from '../lib/node-utility/Executable';
7676
import { jsonc } from 'jsonc';
7777
import * as iconv from 'iconv-lite';
7878
import * as globmatch from 'micromatch'
79-
import { EventData, CurrentDevice, ArmBaseCompileConfigModel } from './EIDEProjectModules';
79+
import { EventData, CurrentDevice, ArmBaseCompileConfigModel, ArmBaseCompileData } from './EIDEProjectModules';
8080
import * as FileLock from '../lib/node-utility/FileLock';
8181
import { CompilerCommandsDatabaseItem, CodeBuilder } from './CodeBuilder';
8282
import { xpackRequireDevTools } from './XpackDevTools';
@@ -778,10 +778,17 @@ export interface BaseProjectInfo {
778778
prjConfig: ProjectConfiguration<any>;
779779
}
780780

781+
export interface SourceExtraMemoryAssignCfg {
782+
RO?: string;
783+
RW?: string;
784+
ZI?: string;
785+
}
786+
781787
export interface SourceExtraCompilerOptionsCfg {
782788
files?: { [key: string]: string };
783789
virtualPathFiles?: { [key: string]: string };
784790
alwaysBuildSourceFiles?: string[];
791+
memoryAssign?: { [key: string]: SourceExtraMemoryAssignCfg };
785792
}
786793

787794
export interface SourceFileOptions {
@@ -790,6 +797,7 @@ export interface SourceFileOptions {
790797
};
791798

792799
export type DataChangeType = 'pack' | 'dependence' | 'compiler' | 'uploader' | 'files';
800+
export const EIDE_FILE_OPTION_VERSION = '2.1'
793801

794802
export abstract class AbstractProject implements CustomConfigurationProvider, ProjectBaseApi {
795803

@@ -1907,6 +1915,15 @@ export abstract class AbstractProject implements CustomConfigurationProvider, Pr
19071915

19081916
//-------------------- other ------------------
19091917

1918+
supportArmccMemeoryAssignment(): boolean {
1919+
let isUseCustomScatterFile = false;
1920+
if (this.getProjectType() == 'ARM')
1921+
isUseCustomScatterFile = this.GetConfiguration<ArmBaseCompileData>().config
1922+
.compileConfig.useCustomScatterFile;
1923+
const toolchainName = this.getToolchain().name;
1924+
return (toolchainName === 'AC5' || toolchainName === 'AC6') && !isUseCustomScatterFile;
1925+
}
1926+
19101927
getLibsGeneratorCfgFile(notCreate: boolean = false): File {
19111928

19121929
const target = this.getCurrentTarget().toLowerCase();
@@ -2235,8 +2252,8 @@ $(OUT_DIR):
22352252

22362253
const optFile = File.fromArray([this.getEideDir().path, `files.options.yml`]);
22372254
if (!optFile.IsFile() && !notCreate) {
2238-
const optsObj = <SourceFileOptions>{ version: '2.0', options: {} };
2239-
optsObj.version = '2.0';
2255+
const optsObj = <SourceFileOptions>{ version: EIDE_FILE_OPTION_VERSION, options: {} };
2256+
optsObj.version = EIDE_FILE_OPTION_VERSION;
22402257
optsObj.options[this.getCurrentTarget()] = { files: {}, virtualPathFiles: {} };
22412258
optFile.Write(view_str$prompt$filesOptionsComment + yaml.stringify(optsObj, { indent: 4 }));
22422259
}
@@ -2262,7 +2279,7 @@ $(OUT_DIR):
22622279
try {
22632280
const optFile = this.getSourceExtraArgsCfgFile();
22642281
const optsObj = <SourceFileOptions>yaml.parse(optFile.Read());
2265-
optsObj.version = '2.0';
2282+
optsObj.version = EIDE_FILE_OPTION_VERSION;
22662283
optsObj.options[targetName || this.getCurrentTarget()] = cfg;
22672284
optFile.Write(view_str$prompt$filesOptionsComment + yaml.stringify(optsObj, { indent: 4 }));
22682285
} catch (error) {
@@ -2317,6 +2334,16 @@ $(OUT_DIR):
23172334
}
23182335
}
23192336

2337+
if (cfg.memoryAssign && this.supportArmccMemeoryAssignment()) {
2338+
for (const filePath in cfg.memoryAssign) {
2339+
if (virtpath && this.comparePath(filePath, <string>virtpath)) {
2340+
return true;
2341+
} else if (this.comparePath(filePath, <string>fspath)) {
2342+
return true;
2343+
}
2344+
}
2345+
}
2346+
23202347
return false;
23212348
}
23222349

@@ -2786,7 +2813,7 @@ $(OUT_DIR):
27862813
}
27872814
// merge all files options
27882815
if (allFileOptions.length > 0) {
2789-
const optionsObj: SourceFileOptions = { 'version': '2.0', options: {} };
2816+
const optionsObj: SourceFileOptions = { 'version': EIDE_FILE_OPTION_VERSION, options: {} };
27902817
allFileOptions.forEach(opts => {
27912818
const obj = opts.fileOptions;
27922819
obj.version = undefined;

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