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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIoptimization
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I have seen below pattern in generated code for framework libraries. We can eliminate the ldr
if it is loading the value into same register that was used to store in previous instruction in same memory location.
Example of ARM64 code:
B90023A0 str w0, [fp,#32] // [V04 loc1]
B94023A0 ldr w0, [fp,#32] // [V04 loc1]
Example of x64 code:
48894C2430 mov gword ptr [rsp+30H], rcx
488B4C2430 mov rcx, gword ptr [rsp+30H]
There are approx. 2500 such patterns in 1500 methods. Details in str-ldr.txt.
category:cq
theme:basic-cq
skill-level:intermediate
cost:medium
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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIoptimization